From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2 6/7] drm/i915: Init DDI outputs based on port_mask on skl+
Date: Fri, 02 Jun 2023 17:41:50 +0300 [thread overview]
Message-ID: <87edmudiz5.fsf@intel.com> (raw)
In-Reply-To: <20230531134806.23065-7-ville.syrjala@linux.intel.com>
On Wed, 31 May 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Instead of listing every platform's possible DDI outputs
> in intel_setup_outputs() just loop over the new port_mask
> to achieve the same thing.
For posterity, I think I rejected a patch from Lucas generalizing the
initialization in the past. I think that used the VBT child device list
directly, and I wanted to preserve a clear way to check what the
supported ports for a platform were. I think having the ports in runtime
info now covers that concern. And with this, I'm open to using the child
device list as it can now be cross-checked against the runtime info.
>
> HSW/BDW were left as is since they still look at the straps
> as well.
>
> DSI is still a mess. For now just check for the relevant
> platforms explicitly.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 80 ++++----------------
> 1 file changed, 13 insertions(+), 67 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d3fc498c82c1..12f2e3897595 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7387,73 +7387,19 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
> if (!HAS_DISPLAY(dev_priv))
> return;
>
> - if (IS_METEORLAKE(dev_priv)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_TC1);
> - intel_ddi_init(dev_priv, PORT_TC2);
> - intel_ddi_init(dev_priv, PORT_TC3);
> - intel_ddi_init(dev_priv, PORT_TC4);
> - } else if (IS_DG2(dev_priv)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_C);
> - intel_ddi_init(dev_priv, PORT_D_XELPD);
> - intel_ddi_init(dev_priv, PORT_TC1);
> - } else if (IS_ALDERLAKE_P(dev_priv)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_TC1);
> - intel_ddi_init(dev_priv, PORT_TC2);
> - intel_ddi_init(dev_priv, PORT_TC3);
> - intel_ddi_init(dev_priv, PORT_TC4);
> - icl_dsi_init(dev_priv);
> - } else if (IS_ALDERLAKE_S(dev_priv)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_TC1);
> - intel_ddi_init(dev_priv, PORT_TC2);
> - intel_ddi_init(dev_priv, PORT_TC3);
> - intel_ddi_init(dev_priv, PORT_TC4);
> - } else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_TC1);
> - intel_ddi_init(dev_priv, PORT_TC2);
> - } else if (DISPLAY_VER(dev_priv) >= 12) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_TC1);
> - intel_ddi_init(dev_priv, PORT_TC2);
> - intel_ddi_init(dev_priv, PORT_TC3);
> - intel_ddi_init(dev_priv, PORT_TC4);
> - intel_ddi_init(dev_priv, PORT_TC5);
> - intel_ddi_init(dev_priv, PORT_TC6);
> - icl_dsi_init(dev_priv);
> - } else if (IS_JSL_EHL(dev_priv)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_C);
> - intel_ddi_init(dev_priv, PORT_D);
> - icl_dsi_init(dev_priv);
> - } else if (DISPLAY_VER(dev_priv) == 11) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_C);
> - intel_ddi_init(dev_priv, PORT_D);
> - intel_ddi_init(dev_priv, PORT_E);
> - intel_ddi_init(dev_priv, PORT_F);
> - icl_dsi_init(dev_priv);
> - } else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_C);
> - vlv_dsi_init(dev_priv);
> - } else if (DISPLAY_VER(dev_priv) >= 9) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_C);
> - intel_ddi_init(dev_priv, PORT_D);
> - intel_ddi_init(dev_priv, PORT_E);
> + if (DISPLAY_VER(dev_priv) >= 9) {
> + enum port port;
> +
> + for_each_port_masked(port, DISPLAY_RUNTIME_INFO(dev_priv)->port_mask)
> + intel_ddi_init(dev_priv, port);
> +
> + /* FIXME do something about DSI */
> + if (IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv) ||
> + DISPLAY_VER(dev_priv) == 11)
> + icl_dsi_init(dev_priv);
This reflects current code, but apparently commit e341c618acde
("drm/i915/adl_s: Initialize display for ADL-S") stopped initializing
DSI for ADL-S. It does support DSI.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> +
> + if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> + vlv_dsi_init(dev_priv);
> } else if (HAS_DDI(dev_priv)) {
> u32 found;
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-06-02 14:41 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-31 13:47 [Intel-gfx] [PATCH v2 0/7] drm/i915: Init DDI ports based on port_mask Ville Syrjala
2023-05-31 13:48 ` [Intel-gfx] [PATCH v2 1/7] drm/i915: Remove bogus DDI-F from hsw/bdw output init Ville Syrjala
2023-05-31 13:48 ` [Intel-gfx] [PATCH v2 2/7] drm/i915: Introduce device info port_mask Ville Syrjala
2023-06-02 14:11 ` Jani Nikula
2023-06-08 19:36 ` Ville Syrjälä
2023-06-15 12:02 ` Shankar, Uma
2023-05-31 13:48 ` [Intel-gfx] [PATCH v2 3/7] drm/i915: Assert that device info bitmasks have enough bits Ville Syrjala
2023-06-02 14:13 ` Jani Nikula
2023-06-02 14:16 ` Jani Nikula
2023-05-31 13:48 ` [Intel-gfx] [PATCH v2 4/7] drm/i915: Assert that the port being initialized is valid Ville Syrjala
2023-06-02 14:19 ` Jani Nikula
2023-05-31 13:48 ` [Intel-gfx] [PATCH v2 5/7] drm/i915: Beef up SDVO/HDMI port checks Ville Syrjala
2023-06-02 14:23 ` Jani Nikula
2023-05-31 13:48 ` [Intel-gfx] [PATCH v2 6/7] drm/i915: Init DDI outputs based on port_mask on skl+ Ville Syrjala
2023-06-02 14:41 ` Jani Nikula [this message]
2023-06-08 19:48 ` Ville Syrjälä
2023-06-09 9:19 ` Jani Nikula
2023-05-31 13:48 ` [Intel-gfx] [PATCH v2 7/7] drm/i915: Convert HSW/BDW to use port_mask for DDI probe Ville Syrjala
2023-06-02 14:51 ` Jani Nikula
2023-06-08 19:54 ` Ville Syrjälä
2023-06-02 10:31 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Init DDI ports based on port_mask (rev3) Patchwork
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