Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Sanitycheck PCI BARs

[Jani Nikula <jani.nikula@linux.intel.com>]

On Fri, 05 Aug 2022, "Piorkowski, Piotr" <piotr.piorkowski@intel.com> wrote:
> From: Piotr Piórkowski <piotr.piorkowski@intel.com>
>
> For proper operation of i915 we need usable PCI GTTMMADDR BAR 0
> (1 for GEN2). In most cases we also need usable PCI GFXMEM BAR 2.
> Let's add functions to check if BARs are set, and that it have
> a size greater than 0.
> In case GTTMMADDR BAR, let's validate at the beginning of i915
> initialization.
> For other BARs, let's validate before first use.
>
> Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_stolen.c  |  4 ++++
>  drivers/gpu/drm/i915/gt/intel_ggtt.c        |  7 ++++++
>  drivers/gpu/drm/i915/gt/intel_region_lmem.c |  4 ++++
>  drivers/gpu/drm/i915/i915_pci.c             | 25 +++++++++++++++++++++
>  drivers/gpu/drm/i915/i915_pci.h             |  6 +++++
>  5 files changed, 46 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index c369cfd185bc..4f4c9461a23b 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -18,6 +18,7 @@
>  #include "gt/intel_region_lmem.h"
>  #include "i915_drv.h"
>  #include "i915_gem_stolen.h"
> +#include "i915_pci.h"
>  #include "i915_reg.h"
>  #include "i915_utils.h"
>  #include "i915_vgpu.h"
> @@ -828,6 +829,9 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
>  	if (WARN_ON_ONCE(instance))
>  		return ERR_PTR(-ENODEV);
>  
> +	if (!i915_pci_resource_valid(pdev, GEN12_LMEM_BAR))
> +		return ERR_PTR(-ENXIO);
> +
>  	/* Use DSM base address instead for stolen memory */
>  	dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE);
>  	if (IS_DG1(uncore->i915)) {
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 8214e07a0f5b..30cf5c3369d9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -18,6 +18,7 @@
>  #include "intel_gt_regs.h"
>  #include "intel_pci_config.h"
>  #include "i915_drv.h"
> +#include "i915_pci.h"
>  #include "i915_scatterlist.h"
>  #include "i915_utils.h"
>  #include "i915_vgpu.h"
> @@ -931,6 +932,9 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
>  	u16 snb_gmch_ctl;
>  
>  	if (!HAS_LMEM(i915)) {
> +		if (!i915_pci_resource_valid(pdev, GTT_APERTURE_BAR))
> +			return -ENXIO;
> +
>  		ggtt->gmadr = pci_resource(pdev, GTT_APERTURE_BAR);
>  		ggtt->mappable_end = resource_size(&ggtt->gmadr);
>  	}
> @@ -1085,6 +1089,9 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
>  	unsigned int size;
>  	u16 snb_gmch_ctl;
>  
> +	if (!i915_pci_resource_valid(pdev, GTT_APERTURE_BAR))
> +		return -ENXIO;
> +
>  	ggtt->gmadr = pci_resource(pdev, GTT_APERTURE_BAR);
>  	ggtt->mappable_end = resource_size(&ggtt->gmadr);
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> index 1e79d3c8b126..f3ad93db0b21 100644
> --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include "i915_drv.h"
> +#include "i915_pci.h"
>  #include "i915_reg.h"
>  #include "intel_memory_region.h"
>  #include "intel_pci_config.h"
> @@ -201,6 +202,9 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
>  	if (!IS_DGFX(i915))
>  		return ERR_PTR(-ENODEV);
>  
> +	if (!i915_pci_resource_valid(pdev, GEN12_LMEM_BAR))
> +		return ERR_PTR(-ENXIO);
> +
>  	if (HAS_FLAT_CCS(i915)) {
>  		resource_size_t lmem_range;
>  		u64 tile_stolen, flat_ccs_base;
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index aacc10f2e73f..9fd788e147a3 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -30,6 +30,7 @@
>  #include "i915_drv.h"
>  #include "i915_pci.h"
>  #include "i915_reg.h"
> +#include "intel_pci_config.h"
>  
>  #define PLATFORM(x) .platform = (x)
>  #define GEN(x) \
> @@ -1262,6 +1263,27 @@ static bool force_probe(u16 device_id, const char *devices)
>  	return ret;
>  }
>  
> +bool i915_pci_resource_valid(struct pci_dev *pdev, int bar)
> +{
> +	if (!pci_resource_flags(pdev, bar))
> +		return false;
> +
> +	if (pci_resource_flags(pdev, bar) & IORESOURCE_UNSET)
> +		return false;
> +
> +	if (!pci_resource_len(pdev, bar))
> +		return false;
> +
> +	return true;
> +}
> +
> +static bool intel_mmio_bar_valid(struct pci_dev *pdev, struct intel_device_info *intel_info)
> +{
> +	int gttmmaddr_bar = intel_info->graphics.ver == 2 ? GEN2_GTTMMADR_BAR : GTTMMADR_BAR;
> +
> +	return i915_pci_resource_valid(pdev, gttmmaddr_bar);
> +}
> +
>  static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
>  {
>  	struct intel_device_info *intel_info =
> @@ -1287,6 +1309,9 @@ static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
>  	if (PCI_FUNC(pdev->devfn))
>  		return -ENODEV;
>  
> +	if (!intel_mmio_bar_valid(pdev, intel_info))
> +		return -ENXIO;
> +
>  	/* Detect if we need to wait for other drivers early on */
>  	if (intel_modeset_probe_defer(pdev))
>  		return -EPROBE_DEFER;
> diff --git a/drivers/gpu/drm/i915/i915_pci.h b/drivers/gpu/drm/i915/i915_pci.h
> index ee048c238174..8dfe19f9a775 100644
> --- a/drivers/gpu/drm/i915/i915_pci.h
> +++ b/drivers/gpu/drm/i915/i915_pci.h
> @@ -6,7 +6,13 @@
>  #ifndef __I915_PCI_H__
>  #define __I915_PCI_H__
>  
> +#include <linux/types.h>

I've pushed the series, thanks for the patches. Realized after pushing
that this include is unnecessary.

BR,
Jani.


> +
> +struct pci_dev;
> +
>  int i915_pci_register_driver(void);
>  void i915_pci_unregister_driver(void);
>  
> +bool i915_pci_resource_valid(struct pci_dev *pdev, int bar);
> +
>  #endif /* __I915_PCI_H__ */

-- 
Jani Nikula, Intel Open Source Graphics Center