Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Eric Anholt <eric@anholt.net>
To: Eugeni Dodonov <eugeni@dodonov.net>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Add support for resetting the SO write pointers on gen7.
Date: Tue, 03 Jan 2012 17:56:09 -0800	[thread overview]
Message-ID: <87hb0cmds6.fsf@eliezer.anholt.net> (raw)
In-Reply-To: <CAC7LmnsduLA3DL67BgndUsZCE9ojdtyapqt2W9ARkY7tDyEy5A@mail.gmail.com>


[-- Attachment #1.1: Type: text/plain, Size: 1898 bytes --]

On Mon, 2 Jan 2012 13:04:37 -0200, Eugeni Dodonov <eugeni@dodonov.net> wrote:
> On Thu, Dec 29, 2011 at 23:52, Eric Anholt <eric@anholt.net> wrote:
> 
> > These registers are automatically incremented by the hardware during
> > transform feedback to track where the next streamed vertex output
> > should go.  Unlike the previous generation, which had a packet for
> > setting the corresponding registers to a defined value, gen7 only has
> > MI_LOAD_REGISTER_IMM to do so.  That's a secure packet (since it loads
> > an arbitrary register), so we need to do it from the kernel, and it
> > needs to be settable atomically with the batchbuffer execution so that
> > two clients doing transform feedback don't stomp on each others'
> > state.
> >
> > Instead of building a more complicated interface involcing setting the
> > registers to a specific value, just set them to 0 when asked and
> > userland can tweak its pointers accordingly.

> > diff --git a/drivers/gpu/drm/i915/i915_dma.c
> > b/drivers/gpu/drm/i915/i915_dma.c
> > index a9ae374..1add685 100644
> > --- a/drivers/gpu/drm/i915/i915_dma.c
> > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > @@ -781,6 +781,9 @@ static int i915_getparam(struct drm_device *dev, void
> > *data,
> >        case I915_PARAM_HAS_RELAXED_DELTA:
> >                value = 1;
> >                break;
> > +       case I915_PARAM_HAS_GEN7_SOL_RESET:
> > +               value = 1;
> >
> 
> Wouldn't it be better to have:
>                    value = IS_GEN7(dev);
> 
> as it is gen7+-specific item. This way, userspace could check for this
> support early, and avoid setting the flag on the batchbuffer in vain on
> pre-gen7 architectures.
> 
> Either way, it will work, so:
> 
> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>

The flag only gets set by userland in the gen7 code, so it wouldn't
change anything.

[-- Attachment #1.2: Type: application/pgp-signature, Size: 197 bytes --]

[-- Attachment #2: Type: text/plain, Size: 159 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2012-01-04  1:56 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-30  1:52 [PATCH] drm/i915: Add support for resetting the SO write pointers on gen7 Eric Anholt
2012-01-02 15:04 ` Eugeni Dodonov
2012-01-04  1:56   ` Eric Anholt [this message]
2012-01-02 19:51 ` Kenneth Graunke
2012-01-04  3:40 ` Ben Widawsky
2012-01-04  8:34   ` Eric Anholt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87hb0cmds6.fsf@eliezer.anholt.net \
    --to=eric@anholt.net \
    --cc=eugeni@dodonov.net \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox