[PATCH 0/6] drm/i915: Sanitize MBUS joining

[PATCH 0/6] drm/i915: Sanitize MBUS joining

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sanitize MBUS joining in case the BIOS enabled it with
not active pipes, or we disabled the only active pipe
eg. due to intel_crtc_needs_link_reset().

Ville Syrjälä (6):
  drm/i915: Relocate the SKL wm sanitation code
  drm/i915: Extract pipe_mbus_dbox_ctl()
  drm/i915: Extract pipe_mbus_dbox_ctl_update()
  drm/i915: Extract mbus_ctl_join_update()
  drm/i915: Sanitize MBUS joining
  drm/i915: Simplify xelpdp_is_only_pipe_per_dbuf_bank()

 drivers/gpu/drm/i915/display/skl_watermark.c | 561 ++++++++++---------
 1 file changed, 303 insertions(+), 258 deletions(-)

-- 
2.45.2

[PATCH 1/6] drm/i915: Relocate the SKL wm sanitation code

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

In order to add more MBUS sanitation into the code we'll want
to reuse a bunch of the code that performs the MBUS/related
hardware programming. Currently that code comes after the
main skl_wm_get_hw_state_and_sanitize() entrypoint. In order
to avoid annoying forward declarations relocate the
skl_wm_get_hw_state_and_sanitize() and related stuff nearer to
the end of the file.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 420 +++++++++----------
 1 file changed, 210 insertions(+), 210 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 3b0e87edbacf..92794dfbd3bd 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3048,202 +3048,6 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)
 	dbuf_state->enabled_slices = i915->display.dbuf.enabled_slices;
 }
 
-static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
-{
-	const struct intel_dbuf_state *dbuf_state =
-		to_intel_dbuf_state(i915->display.dbuf.obj.state);
-	struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
-	struct intel_crtc *crtc;
-
-	for_each_intel_crtc(&i915->drm, crtc) {
-		const struct intel_crtc_state *crtc_state =
-			to_intel_crtc_state(crtc->base.state);
-
-		entries[crtc->pipe] = crtc_state->wm.skl.ddb;
-	}
-
-	for_each_intel_crtc(&i915->drm, crtc) {
-		const struct intel_crtc_state *crtc_state =
-			to_intel_crtc_state(crtc->base.state);
-		u8 slices;
-
-		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,
-						 dbuf_state->joined_mbus);
-		if (dbuf_state->slices[crtc->pipe] & ~slices)
-			return true;
-
-		if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.ddb, entries,
-						I915_MAX_PIPES, crtc->pipe))
-			return true;
-	}
-
-	return false;
-}
-
-static void skl_wm_sanitize(struct drm_i915_private *i915)
-{
-	struct intel_crtc *crtc;
-
-	/*
-	 * On TGL/RKL (at least) the BIOS likes to assign the planes
-	 * to the wrong DBUF slices. This will cause an infinite loop
-	 * in skl_commit_modeset_enables() as it can't find a way to
-	 * transition between the old bogus DBUF layout to the new
-	 * proper DBUF layout without DBUF allocation overlaps between
-	 * the planes (which cannot be allowed or else the hardware
-	 * may hang). If we detect a bogus DBUF layout just turn off
-	 * all the planes so that skl_commit_modeset_enables() can
-	 * simply ignore them.
-	 */
-	if (!skl_dbuf_is_misconfigured(i915))
-		return;
-
-	drm_dbg_kms(&i915->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
-
-	for_each_intel_crtc(&i915->drm, crtc) {
-		struct intel_plane *plane = to_intel_plane(crtc->base.primary);
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(plane->base.state);
-		struct intel_crtc_state *crtc_state =
-			to_intel_crtc_state(crtc->base.state);
-
-		if (plane_state->uapi.visible)
-			intel_plane_disable_noatomic(crtc, plane);
-
-		drm_WARN_ON(&i915->drm, crtc_state->active_planes != 0);
-
-		memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
-	}
-}
-
-static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
-{
-	skl_wm_get_hw_state(i915);
-	skl_wm_sanitize(i915);
-}
-
-void intel_wm_state_verify(struct intel_atomic_state *state,
-			   struct intel_crtc *crtc)
-{
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
-	const struct intel_crtc_state *new_crtc_state =
-		intel_atomic_get_new_crtc_state(state, crtc);
-	struct skl_hw_state {
-		struct skl_ddb_entry ddb[I915_MAX_PLANES];
-		struct skl_ddb_entry ddb_y[I915_MAX_PLANES];
-		struct skl_pipe_wm wm;
-	} *hw;
-	const struct skl_pipe_wm *sw_wm = &new_crtc_state->wm.skl.optimal;
-	struct intel_plane *plane;
-	u8 hw_enabled_slices;
-	int level;
-
-	if (DISPLAY_VER(i915) < 9 || !new_crtc_state->hw.active)
-		return;
-
-	hw = kzalloc(sizeof(*hw), GFP_KERNEL);
-	if (!hw)
-		return;
-
-	skl_pipe_wm_get_hw_state(crtc, &hw->wm);
-
-	skl_pipe_ddb_get_hw_state(crtc, hw->ddb, hw->ddb_y);
-
-	hw_enabled_slices = intel_enabled_dbuf_slices_mask(i915);
-
-	if (DISPLAY_VER(i915) >= 11 &&
-	    hw_enabled_slices != i915->display.dbuf.enabled_slices)
-		drm_err(&i915->drm,
-			"mismatch in DBUF Slices (expected 0x%x, got 0x%x)\n",
-			i915->display.dbuf.enabled_slices,
-			hw_enabled_slices);
-
-	for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
-		const struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
-		const struct skl_wm_level *hw_wm_level, *sw_wm_level;
-
-		/* Watermarks */
-		for (level = 0; level < i915->display.wm.num_levels; level++) {
-			hw_wm_level = &hw->wm.planes[plane->id].wm[level];
-			sw_wm_level = skl_plane_wm_level(sw_wm, plane->id, level);
-
-			if (skl_wm_level_equals(hw_wm_level, sw_wm_level))
-				continue;
-
-			drm_err(&i915->drm,
-				"[PLANE:%d:%s] mismatch in WM%d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				plane->base.base.id, plane->base.name, level,
-				sw_wm_level->enable,
-				sw_wm_level->blocks,
-				sw_wm_level->lines,
-				hw_wm_level->enable,
-				hw_wm_level->blocks,
-				hw_wm_level->lines);
-		}
-
-		hw_wm_level = &hw->wm.planes[plane->id].trans_wm;
-		sw_wm_level = skl_plane_trans_wm(sw_wm, plane->id);
-
-		if (!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
-			drm_err(&i915->drm,
-				"[PLANE:%d:%s] mismatch in trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				plane->base.base.id, plane->base.name,
-				sw_wm_level->enable,
-				sw_wm_level->blocks,
-				sw_wm_level->lines,
-				hw_wm_level->enable,
-				hw_wm_level->blocks,
-				hw_wm_level->lines);
-		}
-
-		hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0;
-		sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0;
-
-		if (HAS_HW_SAGV_WM(i915) &&
-		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
-			drm_err(&i915->drm,
-				"[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				plane->base.base.id, plane->base.name,
-				sw_wm_level->enable,
-				sw_wm_level->blocks,
-				sw_wm_level->lines,
-				hw_wm_level->enable,
-				hw_wm_level->blocks,
-				hw_wm_level->lines);
-		}
-
-		hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm;
-		sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm;
-
-		if (HAS_HW_SAGV_WM(i915) &&
-		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
-			drm_err(&i915->drm,
-				"[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
-				plane->base.base.id, plane->base.name,
-				sw_wm_level->enable,
-				sw_wm_level->blocks,
-				sw_wm_level->lines,
-				hw_wm_level->enable,
-				hw_wm_level->blocks,
-				hw_wm_level->lines);
-		}
-
-		/* DDB */
-		hw_ddb_entry = &hw->ddb[PLANE_CURSOR];
-		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
-
-		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
-			drm_err(&i915->drm,
-				"[PLANE:%d:%s] mismatch in DDB (expected (%u,%u), found (%u,%u))\n",
-				plane->base.base.id, plane->base.name,
-				sw_ddb_entry->start, sw_ddb_entry->end,
-				hw_ddb_entry->start, hw_ddb_entry->end);
-		}
-	}
-
-	kfree(hw);
-}
-
 bool skl_watermark_ipc_enabled(struct drm_i915_private *i915)
 {
 	return i915->display.wm.ipc_enabled;
@@ -3399,20 +3203,6 @@ static void skl_setup_wm_latency(struct drm_i915_private *i915)
 	intel_print_wm_latency(i915, "Gen9 Plane", i915->display.wm.skl_latency);
 }
 
-static const struct intel_wm_funcs skl_wm_funcs = {
-	.compute_global_watermarks = skl_compute_wm,
-	.get_hw_state = skl_wm_get_hw_state_and_sanitize,
-};
-
-void skl_wm_init(struct drm_i915_private *i915)
-{
-	intel_sagv_init(i915);
-
-	skl_setup_wm_latency(i915);
-
-	i915->display.funcs.wm = &skl_wm_funcs;
-}
-
 static struct intel_global_state *intel_dbuf_duplicate_state(struct intel_global_obj *obj)
 {
 	struct intel_dbuf_state *dbuf_state;
@@ -3757,6 +3547,216 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
 	gen9_dbuf_slices_update(i915, new_slices);
 }
 
+static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
+{
+	const struct intel_dbuf_state *dbuf_state =
+		to_intel_dbuf_state(i915->display.dbuf.obj.state);
+	struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
+	struct intel_crtc *crtc;
+
+	for_each_intel_crtc(&i915->drm, crtc) {
+		const struct intel_crtc_state *crtc_state =
+			to_intel_crtc_state(crtc->base.state);
+
+		entries[crtc->pipe] = crtc_state->wm.skl.ddb;
+	}
+
+	for_each_intel_crtc(&i915->drm, crtc) {
+		const struct intel_crtc_state *crtc_state =
+			to_intel_crtc_state(crtc->base.state);
+		u8 slices;
+
+		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,
+						 dbuf_state->joined_mbus);
+		if (dbuf_state->slices[crtc->pipe] & ~slices)
+			return true;
+
+		if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.ddb, entries,
+						I915_MAX_PIPES, crtc->pipe))
+			return true;
+	}
+
+	return false;
+}
+
+static void skl_wm_sanitize(struct drm_i915_private *i915)
+{
+	struct intel_crtc *crtc;
+
+	/*
+	 * On TGL/RKL (at least) the BIOS likes to assign the planes
+	 * to the wrong DBUF slices. This will cause an infinite loop
+	 * in skl_commit_modeset_enables() as it can't find a way to
+	 * transition between the old bogus DBUF layout to the new
+	 * proper DBUF layout without DBUF allocation overlaps between
+	 * the planes (which cannot be allowed or else the hardware
+	 * may hang). If we detect a bogus DBUF layout just turn off
+	 * all the planes so that skl_commit_modeset_enables() can
+	 * simply ignore them.
+	 */
+	if (!skl_dbuf_is_misconfigured(i915))
+		return;
+
+	drm_dbg_kms(&i915->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
+
+	for_each_intel_crtc(&i915->drm, crtc) {
+		struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+		const struct intel_plane_state *plane_state =
+			to_intel_plane_state(plane->base.state);
+		struct intel_crtc_state *crtc_state =
+			to_intel_crtc_state(crtc->base.state);
+
+		if (plane_state->uapi.visible)
+			intel_plane_disable_noatomic(crtc, plane);
+
+		drm_WARN_ON(&i915->drm, crtc_state->active_planes != 0);
+
+		memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
+	}
+}
+
+static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
+{
+	skl_wm_get_hw_state(i915);
+	skl_wm_sanitize(i915);
+}
+
+void intel_wm_state_verify(struct intel_atomic_state *state,
+			   struct intel_crtc *crtc)
+{
+	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	const struct intel_crtc_state *new_crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	struct skl_hw_state {
+		struct skl_ddb_entry ddb[I915_MAX_PLANES];
+		struct skl_ddb_entry ddb_y[I915_MAX_PLANES];
+		struct skl_pipe_wm wm;
+	} *hw;
+	const struct skl_pipe_wm *sw_wm = &new_crtc_state->wm.skl.optimal;
+	struct intel_plane *plane;
+	u8 hw_enabled_slices;
+	int level;
+
+	if (DISPLAY_VER(i915) < 9 || !new_crtc_state->hw.active)
+		return;
+
+	hw = kzalloc(sizeof(*hw), GFP_KERNEL);
+	if (!hw)
+		return;
+
+	skl_pipe_wm_get_hw_state(crtc, &hw->wm);
+
+	skl_pipe_ddb_get_hw_state(crtc, hw->ddb, hw->ddb_y);
+
+	hw_enabled_slices = intel_enabled_dbuf_slices_mask(i915);
+
+	if (DISPLAY_VER(i915) >= 11 &&
+	    hw_enabled_slices != i915->display.dbuf.enabled_slices)
+		drm_err(&i915->drm,
+			"mismatch in DBUF Slices (expected 0x%x, got 0x%x)\n",
+			i915->display.dbuf.enabled_slices,
+			hw_enabled_slices);
+
+	for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
+		const struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
+		const struct skl_wm_level *hw_wm_level, *sw_wm_level;
+
+		/* Watermarks */
+		for (level = 0; level < i915->display.wm.num_levels; level++) {
+			hw_wm_level = &hw->wm.planes[plane->id].wm[level];
+			sw_wm_level = skl_plane_wm_level(sw_wm, plane->id, level);
+
+			if (skl_wm_level_equals(hw_wm_level, sw_wm_level))
+				continue;
+
+			drm_err(&i915->drm,
+				"[PLANE:%d:%s] mismatch in WM%d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
+				plane->base.base.id, plane->base.name, level,
+				sw_wm_level->enable,
+				sw_wm_level->blocks,
+				sw_wm_level->lines,
+				hw_wm_level->enable,
+				hw_wm_level->blocks,
+				hw_wm_level->lines);
+		}
+
+		hw_wm_level = &hw->wm.planes[plane->id].trans_wm;
+		sw_wm_level = skl_plane_trans_wm(sw_wm, plane->id);
+
+		if (!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
+			drm_err(&i915->drm,
+				"[PLANE:%d:%s] mismatch in trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
+				plane->base.base.id, plane->base.name,
+				sw_wm_level->enable,
+				sw_wm_level->blocks,
+				sw_wm_level->lines,
+				hw_wm_level->enable,
+				hw_wm_level->blocks,
+				hw_wm_level->lines);
+		}
+
+		hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0;
+		sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0;
+
+		if (HAS_HW_SAGV_WM(i915) &&
+		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
+			drm_err(&i915->drm,
+				"[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
+				plane->base.base.id, plane->base.name,
+				sw_wm_level->enable,
+				sw_wm_level->blocks,
+				sw_wm_level->lines,
+				hw_wm_level->enable,
+				hw_wm_level->blocks,
+				hw_wm_level->lines);
+		}
+
+		hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm;
+		sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm;
+
+		if (HAS_HW_SAGV_WM(i915) &&
+		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
+			drm_err(&i915->drm,
+				"[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
+				plane->base.base.id, plane->base.name,
+				sw_wm_level->enable,
+				sw_wm_level->blocks,
+				sw_wm_level->lines,
+				hw_wm_level->enable,
+				hw_wm_level->blocks,
+				hw_wm_level->lines);
+		}
+
+		/* DDB */
+		hw_ddb_entry = &hw->ddb[PLANE_CURSOR];
+		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
+
+		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
+			drm_err(&i915->drm,
+				"[PLANE:%d:%s] mismatch in DDB (expected (%u,%u), found (%u,%u))\n",
+				plane->base.base.id, plane->base.name,
+				sw_ddb_entry->start, sw_ddb_entry->end,
+				hw_ddb_entry->start, hw_ddb_entry->end);
+		}
+	}
+
+	kfree(hw);
+}
+
+static const struct intel_wm_funcs skl_wm_funcs = {
+	.compute_global_watermarks = skl_compute_wm,
+	.get_hw_state = skl_wm_get_hw_state_and_sanitize,
+};
+
+void skl_wm_init(struct drm_i915_private *i915)
+{
+	intel_sagv_init(i915);
+
+	skl_setup_wm_latency(i915);
+
+	i915->display.funcs.wm = &skl_wm_funcs;
+}
+
 static int skl_watermark_ipc_status_show(struct seq_file *m, void *data)
 {
 	struct drm_i915_private *i915 = m->private;
-- 
2.45.2

Re: [PATCH 1/6] drm/i915: Relocate the SKL wm sanitation code

[Jani Nikula]

On Thu, 31 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> In order to add more MBUS sanitation into the code we'll want
> to reuse a bunch of the code that performs the MBUS/related
> hardware programming. Currently that code comes after the
> main skl_wm_get_hw_state_and_sanitize() entrypoint. In order
> to avoid annoying forward declarations relocate the
> skl_wm_get_hw_state_and_sanitize() and related stuff nearer to
> the end of the file.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 420 +++++++++----------
>  1 file changed, 210 insertions(+), 210 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 3b0e87edbacf..92794dfbd3bd 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3048,202 +3048,6 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)
>  	dbuf_state->enabled_slices = i915->display.dbuf.enabled_slices;
>  }
>  
> -static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
> -{
> -	const struct intel_dbuf_state *dbuf_state =
> -		to_intel_dbuf_state(i915->display.dbuf.obj.state);
> -	struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
> -	struct intel_crtc *crtc;
> -
> -	for_each_intel_crtc(&i915->drm, crtc) {
> -		const struct intel_crtc_state *crtc_state =
> -			to_intel_crtc_state(crtc->base.state);
> -
> -		entries[crtc->pipe] = crtc_state->wm.skl.ddb;
> -	}
> -
> -	for_each_intel_crtc(&i915->drm, crtc) {
> -		const struct intel_crtc_state *crtc_state =
> -			to_intel_crtc_state(crtc->base.state);
> -		u8 slices;
> -
> -		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,
> -						 dbuf_state->joined_mbus);
> -		if (dbuf_state->slices[crtc->pipe] & ~slices)
> -			return true;
> -
> -		if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.ddb, entries,
> -						I915_MAX_PIPES, crtc->pipe))
> -			return true;
> -	}
> -
> -	return false;
> -}
> -
> -static void skl_wm_sanitize(struct drm_i915_private *i915)
> -{
> -	struct intel_crtc *crtc;
> -
> -	/*
> -	 * On TGL/RKL (at least) the BIOS likes to assign the planes
> -	 * to the wrong DBUF slices. This will cause an infinite loop
> -	 * in skl_commit_modeset_enables() as it can't find a way to
> -	 * transition between the old bogus DBUF layout to the new
> -	 * proper DBUF layout without DBUF allocation overlaps between
> -	 * the planes (which cannot be allowed or else the hardware
> -	 * may hang). If we detect a bogus DBUF layout just turn off
> -	 * all the planes so that skl_commit_modeset_enables() can
> -	 * simply ignore them.
> -	 */
> -	if (!skl_dbuf_is_misconfigured(i915))
> -		return;
> -
> -	drm_dbg_kms(&i915->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
> -
> -	for_each_intel_crtc(&i915->drm, crtc) {
> -		struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> -		const struct intel_plane_state *plane_state =
> -			to_intel_plane_state(plane->base.state);
> -		struct intel_crtc_state *crtc_state =
> -			to_intel_crtc_state(crtc->base.state);
> -
> -		if (plane_state->uapi.visible)
> -			intel_plane_disable_noatomic(crtc, plane);
> -
> -		drm_WARN_ON(&i915->drm, crtc_state->active_planes != 0);
> -
> -		memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
> -	}
> -}
> -
> -static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
> -{
> -	skl_wm_get_hw_state(i915);
> -	skl_wm_sanitize(i915);
> -}
> -
> -void intel_wm_state_verify(struct intel_atomic_state *state,
> -			   struct intel_crtc *crtc)
> -{
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> -	const struct intel_crtc_state *new_crtc_state =
> -		intel_atomic_get_new_crtc_state(state, crtc);
> -	struct skl_hw_state {
> -		struct skl_ddb_entry ddb[I915_MAX_PLANES];
> -		struct skl_ddb_entry ddb_y[I915_MAX_PLANES];
> -		struct skl_pipe_wm wm;
> -	} *hw;
> -	const struct skl_pipe_wm *sw_wm = &new_crtc_state->wm.skl.optimal;
> -	struct intel_plane *plane;
> -	u8 hw_enabled_slices;
> -	int level;
> -
> -	if (DISPLAY_VER(i915) < 9 || !new_crtc_state->hw.active)
> -		return;
> -
> -	hw = kzalloc(sizeof(*hw), GFP_KERNEL);
> -	if (!hw)
> -		return;
> -
> -	skl_pipe_wm_get_hw_state(crtc, &hw->wm);
> -
> -	skl_pipe_ddb_get_hw_state(crtc, hw->ddb, hw->ddb_y);
> -
> -	hw_enabled_slices = intel_enabled_dbuf_slices_mask(i915);
> -
> -	if (DISPLAY_VER(i915) >= 11 &&
> -	    hw_enabled_slices != i915->display.dbuf.enabled_slices)
> -		drm_err(&i915->drm,
> -			"mismatch in DBUF Slices (expected 0x%x, got 0x%x)\n",
> -			i915->display.dbuf.enabled_slices,
> -			hw_enabled_slices);
> -
> -	for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
> -		const struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
> -		const struct skl_wm_level *hw_wm_level, *sw_wm_level;
> -
> -		/* Watermarks */
> -		for (level = 0; level < i915->display.wm.num_levels; level++) {
> -			hw_wm_level = &hw->wm.planes[plane->id].wm[level];
> -			sw_wm_level = skl_plane_wm_level(sw_wm, plane->id, level);
> -
> -			if (skl_wm_level_equals(hw_wm_level, sw_wm_level))
> -				continue;
> -
> -			drm_err(&i915->drm,
> -				"[PLANE:%d:%s] mismatch in WM%d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				plane->base.base.id, plane->base.name, level,
> -				sw_wm_level->enable,
> -				sw_wm_level->blocks,
> -				sw_wm_level->lines,
> -				hw_wm_level->enable,
> -				hw_wm_level->blocks,
> -				hw_wm_level->lines);
> -		}
> -
> -		hw_wm_level = &hw->wm.planes[plane->id].trans_wm;
> -		sw_wm_level = skl_plane_trans_wm(sw_wm, plane->id);
> -
> -		if (!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> -			drm_err(&i915->drm,
> -				"[PLANE:%d:%s] mismatch in trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				plane->base.base.id, plane->base.name,
> -				sw_wm_level->enable,
> -				sw_wm_level->blocks,
> -				sw_wm_level->lines,
> -				hw_wm_level->enable,
> -				hw_wm_level->blocks,
> -				hw_wm_level->lines);
> -		}
> -
> -		hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0;
> -		sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0;
> -
> -		if (HAS_HW_SAGV_WM(i915) &&
> -		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> -			drm_err(&i915->drm,
> -				"[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				plane->base.base.id, plane->base.name,
> -				sw_wm_level->enable,
> -				sw_wm_level->blocks,
> -				sw_wm_level->lines,
> -				hw_wm_level->enable,
> -				hw_wm_level->blocks,
> -				hw_wm_level->lines);
> -		}
> -
> -		hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm;
> -		sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm;
> -
> -		if (HAS_HW_SAGV_WM(i915) &&
> -		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> -			drm_err(&i915->drm,
> -				"[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> -				plane->base.base.id, plane->base.name,
> -				sw_wm_level->enable,
> -				sw_wm_level->blocks,
> -				sw_wm_level->lines,
> -				hw_wm_level->enable,
> -				hw_wm_level->blocks,
> -				hw_wm_level->lines);
> -		}
> -
> -		/* DDB */
> -		hw_ddb_entry = &hw->ddb[PLANE_CURSOR];
> -		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
> -
> -		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
> -			drm_err(&i915->drm,
> -				"[PLANE:%d:%s] mismatch in DDB (expected (%u,%u), found (%u,%u))\n",
> -				plane->base.base.id, plane->base.name,
> -				sw_ddb_entry->start, sw_ddb_entry->end,
> -				hw_ddb_entry->start, hw_ddb_entry->end);
> -		}
> -	}
> -
> -	kfree(hw);
> -}
> -
>  bool skl_watermark_ipc_enabled(struct drm_i915_private *i915)
>  {
>  	return i915->display.wm.ipc_enabled;
> @@ -3399,20 +3203,6 @@ static void skl_setup_wm_latency(struct drm_i915_private *i915)
>  	intel_print_wm_latency(i915, "Gen9 Plane", i915->display.wm.skl_latency);
>  }
>  
> -static const struct intel_wm_funcs skl_wm_funcs = {
> -	.compute_global_watermarks = skl_compute_wm,
> -	.get_hw_state = skl_wm_get_hw_state_and_sanitize,
> -};
> -
> -void skl_wm_init(struct drm_i915_private *i915)
> -{
> -	intel_sagv_init(i915);
> -
> -	skl_setup_wm_latency(i915);
> -
> -	i915->display.funcs.wm = &skl_wm_funcs;
> -}
> -
>  static struct intel_global_state *intel_dbuf_duplicate_state(struct intel_global_obj *obj)
>  {
>  	struct intel_dbuf_state *dbuf_state;
> @@ -3757,6 +3547,216 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
>  	gen9_dbuf_slices_update(i915, new_slices);
>  }
>  
> +static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
> +{
> +	const struct intel_dbuf_state *dbuf_state =
> +		to_intel_dbuf_state(i915->display.dbuf.obj.state);
> +	struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
> +	struct intel_crtc *crtc;
> +
> +	for_each_intel_crtc(&i915->drm, crtc) {
> +		const struct intel_crtc_state *crtc_state =
> +			to_intel_crtc_state(crtc->base.state);
> +
> +		entries[crtc->pipe] = crtc_state->wm.skl.ddb;
> +	}
> +
> +	for_each_intel_crtc(&i915->drm, crtc) {
> +		const struct intel_crtc_state *crtc_state =
> +			to_intel_crtc_state(crtc->base.state);
> +		u8 slices;
> +
> +		slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,
> +						 dbuf_state->joined_mbus);
> +		if (dbuf_state->slices[crtc->pipe] & ~slices)
> +			return true;
> +
> +		if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.ddb, entries,
> +						I915_MAX_PIPES, crtc->pipe))
> +			return true;
> +	}
> +
> +	return false;
> +}
> +
> +static void skl_wm_sanitize(struct drm_i915_private *i915)
> +{
> +	struct intel_crtc *crtc;
> +
> +	/*
> +	 * On TGL/RKL (at least) the BIOS likes to assign the planes
> +	 * to the wrong DBUF slices. This will cause an infinite loop
> +	 * in skl_commit_modeset_enables() as it can't find a way to
> +	 * transition between the old bogus DBUF layout to the new
> +	 * proper DBUF layout without DBUF allocation overlaps between
> +	 * the planes (which cannot be allowed or else the hardware
> +	 * may hang). If we detect a bogus DBUF layout just turn off
> +	 * all the planes so that skl_commit_modeset_enables() can
> +	 * simply ignore them.
> +	 */
> +	if (!skl_dbuf_is_misconfigured(i915))
> +		return;
> +
> +	drm_dbg_kms(&i915->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
> +
> +	for_each_intel_crtc(&i915->drm, crtc) {
> +		struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> +		const struct intel_plane_state *plane_state =
> +			to_intel_plane_state(plane->base.state);
> +		struct intel_crtc_state *crtc_state =
> +			to_intel_crtc_state(crtc->base.state);
> +
> +		if (plane_state->uapi.visible)
> +			intel_plane_disable_noatomic(crtc, plane);
> +
> +		drm_WARN_ON(&i915->drm, crtc_state->active_planes != 0);
> +
> +		memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
> +	}
> +}
> +
> +static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
> +{
> +	skl_wm_get_hw_state(i915);
> +	skl_wm_sanitize(i915);
> +}
> +
> +void intel_wm_state_verify(struct intel_atomic_state *state,
> +			   struct intel_crtc *crtc)
> +{
> +	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	const struct intel_crtc_state *new_crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	struct skl_hw_state {
> +		struct skl_ddb_entry ddb[I915_MAX_PLANES];
> +		struct skl_ddb_entry ddb_y[I915_MAX_PLANES];
> +		struct skl_pipe_wm wm;
> +	} *hw;
> +	const struct skl_pipe_wm *sw_wm = &new_crtc_state->wm.skl.optimal;
> +	struct intel_plane *plane;
> +	u8 hw_enabled_slices;
> +	int level;
> +
> +	if (DISPLAY_VER(i915) < 9 || !new_crtc_state->hw.active)
> +		return;
> +
> +	hw = kzalloc(sizeof(*hw), GFP_KERNEL);
> +	if (!hw)
> +		return;
> +
> +	skl_pipe_wm_get_hw_state(crtc, &hw->wm);
> +
> +	skl_pipe_ddb_get_hw_state(crtc, hw->ddb, hw->ddb_y);
> +
> +	hw_enabled_slices = intel_enabled_dbuf_slices_mask(i915);
> +
> +	if (DISPLAY_VER(i915) >= 11 &&
> +	    hw_enabled_slices != i915->display.dbuf.enabled_slices)
> +		drm_err(&i915->drm,
> +			"mismatch in DBUF Slices (expected 0x%x, got 0x%x)\n",
> +			i915->display.dbuf.enabled_slices,
> +			hw_enabled_slices);
> +
> +	for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
> +		const struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
> +		const struct skl_wm_level *hw_wm_level, *sw_wm_level;
> +
> +		/* Watermarks */
> +		for (level = 0; level < i915->display.wm.num_levels; level++) {
> +			hw_wm_level = &hw->wm.planes[plane->id].wm[level];
> +			sw_wm_level = skl_plane_wm_level(sw_wm, plane->id, level);
> +
> +			if (skl_wm_level_equals(hw_wm_level, sw_wm_level))
> +				continue;
> +
> +			drm_err(&i915->drm,
> +				"[PLANE:%d:%s] mismatch in WM%d (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> +				plane->base.base.id, plane->base.name, level,
> +				sw_wm_level->enable,
> +				sw_wm_level->blocks,
> +				sw_wm_level->lines,
> +				hw_wm_level->enable,
> +				hw_wm_level->blocks,
> +				hw_wm_level->lines);
> +		}
> +
> +		hw_wm_level = &hw->wm.planes[plane->id].trans_wm;
> +		sw_wm_level = skl_plane_trans_wm(sw_wm, plane->id);
> +
> +		if (!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> +			drm_err(&i915->drm,
> +				"[PLANE:%d:%s] mismatch in trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> +				plane->base.base.id, plane->base.name,
> +				sw_wm_level->enable,
> +				sw_wm_level->blocks,
> +				sw_wm_level->lines,
> +				hw_wm_level->enable,
> +				hw_wm_level->blocks,
> +				hw_wm_level->lines);
> +		}
> +
> +		hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0;
> +		sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0;
> +
> +		if (HAS_HW_SAGV_WM(i915) &&
> +		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> +			drm_err(&i915->drm,
> +				"[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> +				plane->base.base.id, plane->base.name,
> +				sw_wm_level->enable,
> +				sw_wm_level->blocks,
> +				sw_wm_level->lines,
> +				hw_wm_level->enable,
> +				hw_wm_level->blocks,
> +				hw_wm_level->lines);
> +		}
> +
> +		hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm;
> +		sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm;
> +
> +		if (HAS_HW_SAGV_WM(i915) &&
> +		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> +			drm_err(&i915->drm,
> +				"[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> +				plane->base.base.id, plane->base.name,
> +				sw_wm_level->enable,
> +				sw_wm_level->blocks,
> +				sw_wm_level->lines,
> +				hw_wm_level->enable,
> +				hw_wm_level->blocks,
> +				hw_wm_level->lines);
> +		}
> +
> +		/* DDB */
> +		hw_ddb_entry = &hw->ddb[PLANE_CURSOR];
> +		sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
> +
> +		if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
> +			drm_err(&i915->drm,
> +				"[PLANE:%d:%s] mismatch in DDB (expected (%u,%u), found (%u,%u))\n",
> +				plane->base.base.id, plane->base.name,
> +				sw_ddb_entry->start, sw_ddb_entry->end,
> +				hw_ddb_entry->start, hw_ddb_entry->end);
> +		}
> +	}
> +
> +	kfree(hw);
> +}
> +
> +static const struct intel_wm_funcs skl_wm_funcs = {
> +	.compute_global_watermarks = skl_compute_wm,
> +	.get_hw_state = skl_wm_get_hw_state_and_sanitize,
> +};
> +
> +void skl_wm_init(struct drm_i915_private *i915)
> +{
> +	intel_sagv_init(i915);
> +
> +	skl_setup_wm_latency(i915);
> +
> +	i915->display.funcs.wm = &skl_wm_funcs;
> +}
> +
>  static int skl_watermark_ipc_status_show(struct seq_file *m, void *data)
>  {
>  	struct drm_i915_private *i915 = m->private;

-- 
Jani Nikula, Intel

[PATCH 2/6] drm/i915: Extract pipe_mbus_dbox_ctl()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We'll be wanting reprogram the PIPE_MBUS_DBOX_CTL registers
during an upcoming MBUS sanitation stage. To make that easier
extract a helper that computes the full register value for us.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 63 +++++++++++---------
 1 file changed, 34 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 92794dfbd3bd..7a7caaf7e87d 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3271,23 +3271,12 @@ static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)
 	return false;
 }
 
-static void intel_mbus_dbox_update(struct intel_atomic_state *state)
+static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
+			      const struct intel_dbuf_state *dbuf_state)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
-	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
-	const struct intel_crtc *crtc;
+	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 	u32 val = 0;
 
-	if (DISPLAY_VER(i915) < 11)
-		return;
-
-	new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
-	old_dbuf_state = intel_atomic_get_old_dbuf_state(state);
-	if (!new_dbuf_state ||
-	    (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus &&
-	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
-		return;
-
 	if (DISPLAY_VER(i915) >= 14)
 		val |= MBUS_DBOX_I_CREDIT(2);
 
@@ -3298,12 +3287,12 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
 	}
 
 	if (DISPLAY_VER(i915) >= 14)
-		val |= new_dbuf_state->joined_mbus ? MBUS_DBOX_A_CREDIT(12) :
-						     MBUS_DBOX_A_CREDIT(8);
+		val |= dbuf_state->joined_mbus ?
+			MBUS_DBOX_A_CREDIT(12) : MBUS_DBOX_A_CREDIT(8);
 	else if (IS_ALDERLAKE_P(i915))
 		/* Wa_22010947358:adl-p */
-		val |= new_dbuf_state->joined_mbus ? MBUS_DBOX_A_CREDIT(6) :
-						     MBUS_DBOX_A_CREDIT(4);
+		val |= dbuf_state->joined_mbus ?
+			MBUS_DBOX_A_CREDIT(6) : MBUS_DBOX_A_CREDIT(4);
 	else
 		val |= MBUS_DBOX_A_CREDIT(2);
 
@@ -3320,19 +3309,35 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
 		val |= MBUS_DBOX_B_CREDIT(8);
 	}
 
-	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, new_dbuf_state->active_pipes) {
-		u32 pipe_val = val;
+	if (DISPLAY_VERx100(i915) == 1400) {
+		if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe, dbuf_state->active_pipes))
+			val |= MBUS_DBOX_BW_8CREDITS_MTL;
+		else
+			val |= MBUS_DBOX_BW_4CREDITS_MTL;
+	}
 
-		if (DISPLAY_VERx100(i915) == 1400) {
-			if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe,
-							      new_dbuf_state->active_pipes))
-				pipe_val |= MBUS_DBOX_BW_8CREDITS_MTL;
-			else
-				pipe_val |= MBUS_DBOX_BW_4CREDITS_MTL;
-		}
+	return val;
+}
 
-		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe), pipe_val);
-	}
+static void intel_mbus_dbox_update(struct intel_atomic_state *state)
+{
+	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
+	const struct intel_crtc *crtc;
+
+	if (DISPLAY_VER(i915) < 11)
+		return;
+
+	new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
+	old_dbuf_state = intel_atomic_get_old_dbuf_state(state);
+	if (!new_dbuf_state ||
+	    (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus &&
+	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
+		return;
+
+	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, new_dbuf_state->active_pipes)
+		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
+			       pipe_mbus_dbox_ctl(crtc, new_dbuf_state));
 }
 
 int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
-- 
2.45.2

Re: [PATCH 2/6] drm/i915: Extract pipe_mbus_dbox_ctl()

[Jani Nikula]

On Thu, 31 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We'll be wanting reprogram the PIPE_MBUS_DBOX_CTL registers

wanting *to* reprogram

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> during an upcoming MBUS sanitation stage. To make that easier
> extract a helper that computes the full register value for us.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 63 +++++++++++---------
>  1 file changed, 34 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 92794dfbd3bd..7a7caaf7e87d 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3271,23 +3271,12 @@ static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)
>  	return false;
>  }
>  
> -static void intel_mbus_dbox_update(struct intel_atomic_state *state)
> +static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
> +			      const struct intel_dbuf_state *dbuf_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> -	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
> -	const struct intel_crtc *crtc;
> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>  	u32 val = 0;
>  
> -	if (DISPLAY_VER(i915) < 11)
> -		return;
> -
> -	new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
> -	old_dbuf_state = intel_atomic_get_old_dbuf_state(state);
> -	if (!new_dbuf_state ||
> -	    (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus &&
> -	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
> -		return;
> -
>  	if (DISPLAY_VER(i915) >= 14)
>  		val |= MBUS_DBOX_I_CREDIT(2);
>  
> @@ -3298,12 +3287,12 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
>  	}
>  
>  	if (DISPLAY_VER(i915) >= 14)
> -		val |= new_dbuf_state->joined_mbus ? MBUS_DBOX_A_CREDIT(12) :
> -						     MBUS_DBOX_A_CREDIT(8);
> +		val |= dbuf_state->joined_mbus ?
> +			MBUS_DBOX_A_CREDIT(12) : MBUS_DBOX_A_CREDIT(8);
>  	else if (IS_ALDERLAKE_P(i915))
>  		/* Wa_22010947358:adl-p */
> -		val |= new_dbuf_state->joined_mbus ? MBUS_DBOX_A_CREDIT(6) :
> -						     MBUS_DBOX_A_CREDIT(4);
> +		val |= dbuf_state->joined_mbus ?
> +			MBUS_DBOX_A_CREDIT(6) : MBUS_DBOX_A_CREDIT(4);
>  	else
>  		val |= MBUS_DBOX_A_CREDIT(2);
>  
> @@ -3320,19 +3309,35 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
>  		val |= MBUS_DBOX_B_CREDIT(8);
>  	}
>  
> -	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, new_dbuf_state->active_pipes) {
> -		u32 pipe_val = val;
> +	if (DISPLAY_VERx100(i915) == 1400) {
> +		if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe, dbuf_state->active_pipes))
> +			val |= MBUS_DBOX_BW_8CREDITS_MTL;
> +		else
> +			val |= MBUS_DBOX_BW_4CREDITS_MTL;
> +	}
>  
> -		if (DISPLAY_VERx100(i915) == 1400) {
> -			if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe,
> -							      new_dbuf_state->active_pipes))
> -				pipe_val |= MBUS_DBOX_BW_8CREDITS_MTL;
> -			else
> -				pipe_val |= MBUS_DBOX_BW_4CREDITS_MTL;
> -		}
> +	return val;
> +}
>  
> -		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe), pipe_val);
> -	}
> +static void intel_mbus_dbox_update(struct intel_atomic_state *state)
> +{
> +	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
> +	const struct intel_crtc *crtc;
> +
> +	if (DISPLAY_VER(i915) < 11)
> +		return;
> +
> +	new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
> +	old_dbuf_state = intel_atomic_get_old_dbuf_state(state);
> +	if (!new_dbuf_state ||
> +	    (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus &&
> +	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
> +		return;
> +
> +	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, new_dbuf_state->active_pipes)
> +		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
> +			       pipe_mbus_dbox_ctl(crtc, new_dbuf_state));
>  }
>  
>  int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,

-- 
Jani Nikula, Intel

[PATCH 3/6] drm/i915: Extract pipe_mbus_dbox_ctl_update()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We'll be wanting reprogram the PIPE_MBUS_DBOX_CTL registers
during an upcoming MBUS sanitation stage. Extract the reprogramming
loop into a helper that doesn't depend on the full atomic state
so that it can be reused.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 7a7caaf7e87d..8a31508f94bb 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3319,11 +3319,20 @@ static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
 	return val;
 }
 
+static void pipe_mbus_dbox_ctl_update(struct drm_i915_private *i915,
+				      const struct intel_dbuf_state *dbuf_state)
+{
+	struct intel_crtc *crtc;
+
+	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, dbuf_state->active_pipes)
+		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
+			       pipe_mbus_dbox_ctl(crtc, dbuf_state));
+}
+
 static void intel_mbus_dbox_update(struct intel_atomic_state *state)
 {
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
-	const struct intel_crtc *crtc;
 
 	if (DISPLAY_VER(i915) < 11)
 		return;
@@ -3335,9 +3344,7 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
 	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
 		return;
 
-	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, new_dbuf_state->active_pipes)
-		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
-			       pipe_mbus_dbox_ctl(crtc, new_dbuf_state));
+	pipe_mbus_dbox_ctl_update(i915, new_dbuf_state);
 }
 
 int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
-- 
2.45.2

Re: [PATCH 3/6] drm/i915: Extract pipe_mbus_dbox_ctl_update()

[Jani Nikula]

On Thu, 31 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We'll be wanting reprogram the PIPE_MBUS_DBOX_CTL registers

wanting *to* reprogram

I would've wanted to see conversion to struct intel_display here too, or
at least a mention we're keeping it this way for backports, or
something. A patch on top changing everything in one go is fine too.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> during an upcoming MBUS sanitation stage. Extract the reprogramming
> loop into a helper that doesn't depend on the full atomic state
> so that it can be reused.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 7a7caaf7e87d..8a31508f94bb 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3319,11 +3319,20 @@ static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
>  	return val;
>  }
>  
> +static void pipe_mbus_dbox_ctl_update(struct drm_i915_private *i915,
> +				      const struct intel_dbuf_state *dbuf_state)
> +{
> +	struct intel_crtc *crtc;
> +
> +	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, dbuf_state->active_pipes)
> +		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
> +			       pipe_mbus_dbox_ctl(crtc, dbuf_state));
> +}
> +
>  static void intel_mbus_dbox_update(struct intel_atomic_state *state)
>  {
>  	struct drm_i915_private *i915 = to_i915(state->base.dev);
>  	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
> -	const struct intel_crtc *crtc;
>  
>  	if (DISPLAY_VER(i915) < 11)
>  		return;
> @@ -3335,9 +3344,7 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
>  	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
>  		return;
>  
> -	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, new_dbuf_state->active_pipes)
> -		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
> -			       pipe_mbus_dbox_ctl(crtc, new_dbuf_state));
> +	pipe_mbus_dbox_ctl_update(i915, new_dbuf_state);
>  }
>  
>  int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,

-- 
Jani Nikula, Intel

Re: [PATCH 3/6] drm/i915: Extract pipe_mbus_dbox_ctl_update()

[Ville Syrjälä]

On Fri, Nov 01, 2024 at 12:29:03PM +0200, Jani Nikula wrote:
> On Thu, 31 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We'll be wanting reprogram the PIPE_MBUS_DBOX_CTL registers
> 
> wanting *to* reprogram
> 
> I would've wanted to see conversion to struct intel_display here too, or
> at least a mention we're keeping it this way for backports, or
> something. A patch on top changing everything in one go is fine too.

Yeah, IIRC I did it with intel_display originally but changed it
in case we need to backport this. I can toss in a note stating
as much.

I think I tried to do a full conversion of skl_watermark.c at some
point but at the time there were still so many depedencies left that
it looked rather pointless. I can have another look at it now that
we've progressed a bit further.

> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Ta.

> 
> > during an upcoming MBUS sanitation stage. Extract the reprogramming
> > loop into a helper that doesn't depend on the full atomic state
> > so that it can be reused.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/skl_watermark.c | 15 +++++++++++----
> >  1 file changed, 11 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index 7a7caaf7e87d..8a31508f94bb 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -3319,11 +3319,20 @@ static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
> >  	return val;
> >  }
> >  
> > +static void pipe_mbus_dbox_ctl_update(struct drm_i915_private *i915,
> > +				      const struct intel_dbuf_state *dbuf_state)
> > +{
> > +	struct intel_crtc *crtc;
> > +
> > +	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, dbuf_state->active_pipes)
> > +		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
> > +			       pipe_mbus_dbox_ctl(crtc, dbuf_state));
> > +}
> > +
> >  static void intel_mbus_dbox_update(struct intel_atomic_state *state)
> >  {
> >  	struct drm_i915_private *i915 = to_i915(state->base.dev);
> >  	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
> > -	const struct intel_crtc *crtc;
> >  
> >  	if (DISPLAY_VER(i915) < 11)
> >  		return;
> > @@ -3335,9 +3344,7 @@ static void intel_mbus_dbox_update(struct intel_atomic_state *state)
> >  	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
> >  		return;
> >  
> > -	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, new_dbuf_state->active_pipes)
> > -		intel_de_write(i915, PIPE_MBUS_DBOX_CTL(crtc->pipe),
> > -			       pipe_mbus_dbox_ctl(crtc, new_dbuf_state));
> > +	pipe_mbus_dbox_ctl_update(i915, new_dbuf_state);
> >  }
> >  
> >  int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
> 
> -- 
> Jani Nikula, Intel

-- 
Ville Syrjälä
Intel

[PATCH 4/6] drm/i915: Extract mbus_ctl_join_update()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We'll be wanting reprogram the MBUS_CTL register during an
upcoming MBUS sanitation stage. Extract the reprogramming
into a helper that doesn't depend on the full atomic state
so that it can be reused.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 34 ++++++++++++--------
 1 file changed, 21 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 8a31508f94bb..2eefeff6693a 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3427,22 +3427,13 @@ static enum pipe intel_mbus_joined_pipe(struct intel_atomic_state *state,
 		return INVALID_PIPE;
 }
 
-static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,
-					enum pipe pipe)
+static void mbus_ctl_join_update(struct drm_i915_private *i915,
+				 const struct intel_dbuf_state *dbuf_state,
+				 enum pipe pipe)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
-	const struct intel_dbuf_state *old_dbuf_state =
-		intel_atomic_get_old_dbuf_state(state);
-	const struct intel_dbuf_state *new_dbuf_state =
-		intel_atomic_get_new_dbuf_state(state);
 	u32 mbus_ctl;
 
-	drm_dbg_kms(&i915->drm, "Changing mbus joined: %s -> %s (pipe: %c)\n",
-		    str_yes_no(old_dbuf_state->joined_mbus),
-		    str_yes_no(new_dbuf_state->joined_mbus),
-		    pipe != INVALID_PIPE ? pipe_name(pipe) : '*');
-
-	if (new_dbuf_state->joined_mbus)
+	if (dbuf_state->joined_mbus)
 		mbus_ctl = MBUS_HASHING_MODE_1x4 | MBUS_JOIN;
 	else
 		mbus_ctl = MBUS_HASHING_MODE_2x2;
@@ -3457,6 +3448,23 @@ static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,
 		     MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl);
 }
 
+static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,
+					enum pipe pipe)
+{
+	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	const struct intel_dbuf_state *old_dbuf_state =
+		intel_atomic_get_old_dbuf_state(state);
+	const struct intel_dbuf_state *new_dbuf_state =
+		intel_atomic_get_new_dbuf_state(state);
+
+	drm_dbg_kms(&i915->drm, "Changing mbus joined: %s -> %s (pipe: %c)\n",
+		    str_yes_no(old_dbuf_state->joined_mbus),
+		    str_yes_no(new_dbuf_state->joined_mbus),
+		    pipe != INVALID_PIPE ? pipe_name(pipe) : '*');
+
+	mbus_ctl_join_update(i915, new_dbuf_state, pipe);
+}
+
 void intel_dbuf_mbus_pre_ddb_update(struct intel_atomic_state *state)
 {
 	const struct intel_dbuf_state *new_dbuf_state =
-- 
2.45.2

Re: [PATCH 4/6] drm/i915: Extract mbus_ctl_join_update()

[Jani Nikula]

On Thu, 31 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We'll be wanting reprogram the MBUS_CTL register during an

*to* :)

And the same nitpick about intel_display.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> upcoming MBUS sanitation stage. Extract the reprogramming
> into a helper that doesn't depend on the full atomic state
> so that it can be reused.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 34 ++++++++++++--------
>  1 file changed, 21 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 8a31508f94bb..2eefeff6693a 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3427,22 +3427,13 @@ static enum pipe intel_mbus_joined_pipe(struct intel_atomic_state *state,
>  		return INVALID_PIPE;
>  }
>  
> -static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,
> -					enum pipe pipe)
> +static void mbus_ctl_join_update(struct drm_i915_private *i915,
> +				 const struct intel_dbuf_state *dbuf_state,
> +				 enum pipe pipe)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> -	const struct intel_dbuf_state *old_dbuf_state =
> -		intel_atomic_get_old_dbuf_state(state);
> -	const struct intel_dbuf_state *new_dbuf_state =
> -		intel_atomic_get_new_dbuf_state(state);
>  	u32 mbus_ctl;
>  
> -	drm_dbg_kms(&i915->drm, "Changing mbus joined: %s -> %s (pipe: %c)\n",
> -		    str_yes_no(old_dbuf_state->joined_mbus),
> -		    str_yes_no(new_dbuf_state->joined_mbus),
> -		    pipe != INVALID_PIPE ? pipe_name(pipe) : '*');
> -
> -	if (new_dbuf_state->joined_mbus)
> +	if (dbuf_state->joined_mbus)
>  		mbus_ctl = MBUS_HASHING_MODE_1x4 | MBUS_JOIN;
>  	else
>  		mbus_ctl = MBUS_HASHING_MODE_2x2;
> @@ -3457,6 +3448,23 @@ static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,
>  		     MBUS_JOIN_PIPE_SELECT_MASK, mbus_ctl);
>  }
>  
> +static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state,
> +					enum pipe pipe)
> +{
> +	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	const struct intel_dbuf_state *old_dbuf_state =
> +		intel_atomic_get_old_dbuf_state(state);
> +	const struct intel_dbuf_state *new_dbuf_state =
> +		intel_atomic_get_new_dbuf_state(state);
> +
> +	drm_dbg_kms(&i915->drm, "Changing mbus joined: %s -> %s (pipe: %c)\n",
> +		    str_yes_no(old_dbuf_state->joined_mbus),
> +		    str_yes_no(new_dbuf_state->joined_mbus),
> +		    pipe != INVALID_PIPE ? pipe_name(pipe) : '*');
> +
> +	mbus_ctl_join_update(i915, new_dbuf_state, pipe);
> +}
> +
>  void intel_dbuf_mbus_pre_ddb_update(struct intel_atomic_state *state)
>  {
>  	const struct intel_dbuf_state *new_dbuf_state =

-- 
Jani Nikula, Intel

[PATCH 5/6] drm/i915: Sanitize MBUS joining

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

If the system boots with MBUS joining enabled but we disable
the relevant pipe during sanitaion we later get into trouble
as the rest of the code doesn't expect MBUS joining to be
enabled unless the set of active pipes is in agreement.

We could relax some of the MBUS joining related checks during
normal atomic commits to let this slide, but that might also
let some real bugs through. So let's sanitize the MBUS joining
instead. And in order to keep things more or less in sync we'll
do the related credit, cdclk/mdclk ratio, etc. updates as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 29 ++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 2eefeff6693a..98f9e01b2a1c 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3567,6 +3567,29 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
 	gen9_dbuf_slices_update(i915, new_slices);
 }
 
+static void skl_mbus_sanitize(struct drm_i915_private *i915)
+{
+	struct intel_dbuf_state *dbuf_state =
+		to_intel_dbuf_state(i915->display.dbuf.obj.state);
+
+	if (!HAS_MBUS_JOINING(i915))
+		return;
+
+	if (!dbuf_state->joined_mbus ||
+	    adlp_check_mbus_joined(dbuf_state->active_pipes))
+		return;
+
+	drm_dbg_kms(&i915->drm, "Disabling redundant MBUS joining (active pipes 0x%x)\n",
+		    dbuf_state->active_pipes);
+
+	dbuf_state->joined_mbus = false;
+	intel_dbuf_mdclk_cdclk_ratio_update(i915,
+					    dbuf_state->mdclk_cdclk_ratio,
+					    dbuf_state->joined_mbus);
+	pipe_mbus_dbox_ctl_update(i915, dbuf_state);
+	mbus_ctl_join_update(i915, dbuf_state, INVALID_PIPE);
+}
+
 static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
 {
 	const struct intel_dbuf_state *dbuf_state =
@@ -3599,7 +3622,7 @@ static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
 	return false;
 }
 
-static void skl_wm_sanitize(struct drm_i915_private *i915)
+static void skl_dbuf_sanitize(struct drm_i915_private *i915)
 {
 	struct intel_crtc *crtc;
 
@@ -3638,7 +3661,9 @@ static void skl_wm_sanitize(struct drm_i915_private *i915)
 static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
 {
 	skl_wm_get_hw_state(i915);
-	skl_wm_sanitize(i915);
+
+	skl_mbus_sanitize(i915);
+	skl_dbuf_sanitize(i915);
 }
 
 void intel_wm_state_verify(struct intel_atomic_state *state,
-- 
2.45.2

Re: [PATCH 5/6] drm/i915: Sanitize MBUS joining

[Jani Nikula]

On Thu, 31 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> If the system boots with MBUS joining enabled but we disable
> the relevant pipe during sanitaion we later get into trouble

*sanitation

> as the rest of the code doesn't expect MBUS joining to be
> enabled unless the set of active pipes is in agreement.
>
> We could relax some of the MBUS joining related checks during
> normal atomic commits to let this slide, but that might also
> let some real bugs through. So let's sanitize the MBUS joining
> instead. And in order to keep things more or less in sync we'll
> do the related credit, cdclk/mdclk ratio, etc. updates as well.

Okay, I'm a bit lacking on confidence with this part of the driver, but
it looks sensible. Fingers crossed.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

And the same nitpick about i915 usage.

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 29 ++++++++++++++++++--
>  1 file changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 2eefeff6693a..98f9e01b2a1c 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3567,6 +3567,29 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
>  	gen9_dbuf_slices_update(i915, new_slices);
>  }
>  
> +static void skl_mbus_sanitize(struct drm_i915_private *i915)
> +{
> +	struct intel_dbuf_state *dbuf_state =
> +		to_intel_dbuf_state(i915->display.dbuf.obj.state);
> +
> +	if (!HAS_MBUS_JOINING(i915))
> +		return;
> +
> +	if (!dbuf_state->joined_mbus ||
> +	    adlp_check_mbus_joined(dbuf_state->active_pipes))
> +		return;
> +
> +	drm_dbg_kms(&i915->drm, "Disabling redundant MBUS joining (active pipes 0x%x)\n",
> +		    dbuf_state->active_pipes);
> +
> +	dbuf_state->joined_mbus = false;
> +	intel_dbuf_mdclk_cdclk_ratio_update(i915,
> +					    dbuf_state->mdclk_cdclk_ratio,
> +					    dbuf_state->joined_mbus);
> +	pipe_mbus_dbox_ctl_update(i915, dbuf_state);
> +	mbus_ctl_join_update(i915, dbuf_state, INVALID_PIPE);
> +}
> +
>  static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
>  {
>  	const struct intel_dbuf_state *dbuf_state =
> @@ -3599,7 +3622,7 @@ static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
>  	return false;
>  }
>  
> -static void skl_wm_sanitize(struct drm_i915_private *i915)
> +static void skl_dbuf_sanitize(struct drm_i915_private *i915)
>  {
>  	struct intel_crtc *crtc;
>  
> @@ -3638,7 +3661,9 @@ static void skl_wm_sanitize(struct drm_i915_private *i915)
>  static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
>  {
>  	skl_wm_get_hw_state(i915);
> -	skl_wm_sanitize(i915);
> +
> +	skl_mbus_sanitize(i915);
> +	skl_dbuf_sanitize(i915);
>  }
>  
>  void intel_wm_state_verify(struct intel_atomic_state *state,

-- 
Jani Nikula, Intel

[PATCH 6/6] drm/i915: Simplify xelpdp_is_only_pipe_per_dbuf_bank()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Implement xelpdp_is_only_pipe_per_dbuf_bank() in a slightly
more straightforward way.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 98f9e01b2a1c..d3bbf335c749 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3256,19 +3256,19 @@ static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)
 {
 	switch (pipe) {
 	case PIPE_A:
-		return !(active_pipes & BIT(PIPE_D));
 	case PIPE_D:
-		return !(active_pipes & BIT(PIPE_A));
+		active_pipes &= BIT(PIPE_A) | BIT(PIPE_D);
+		break;
 	case PIPE_B:
-		return !(active_pipes & BIT(PIPE_C));
 	case PIPE_C:
-		return !(active_pipes & BIT(PIPE_B));
+		active_pipes &= BIT(PIPE_B) | BIT(PIPE_C);
+		break;
 	default: /* to suppress compiler warning */
 		MISSING_CASE(pipe);
-		break;
+		return false;
 	}
 
-	return false;
+	return is_power_of_2(active_pipes);
 }
 
 static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,
-- 
2.45.2

Re: [PATCH 6/6] drm/i915: Simplify xelpdp_is_only_pipe_per_dbuf_bank()

[Jani Nikula]

On Thu, 31 Oct 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Implement xelpdp_is_only_pipe_per_dbuf_bank() in a slightly
> more straightforward way.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Matter of taste, but at least this is less repetitive.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 98f9e01b2a1c..d3bbf335c749 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3256,19 +3256,19 @@ static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)
>  {
>  	switch (pipe) {
>  	case PIPE_A:
> -		return !(active_pipes & BIT(PIPE_D));
>  	case PIPE_D:
> -		return !(active_pipes & BIT(PIPE_A));
> +		active_pipes &= BIT(PIPE_A) | BIT(PIPE_D);
> +		break;
>  	case PIPE_B:
> -		return !(active_pipes & BIT(PIPE_C));
>  	case PIPE_C:
> -		return !(active_pipes & BIT(PIPE_B));
> +		active_pipes &= BIT(PIPE_B) | BIT(PIPE_C);
> +		break;
>  	default: /* to suppress compiler warning */
>  		MISSING_CASE(pipe);
> -		break;
> +		return false;
>  	}
>  
> -	return false;
> +	return is_power_of_2(active_pipes);
>  }
>  
>  static u32 pipe_mbus_dbox_ctl(const struct intel_crtc *crtc,

-- 
Jani Nikula, Intel

✓ Fi.CI.BAT: success for drm/i915: Sanitize MBUS joining

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4648 bytes --]

== Series Details ==

Series: drm/i915: Sanitize MBUS joining
URL   : https://patchwork.freedesktop.org/series/140779/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15620 -> Patchwork_140779v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/index.html

Participating hosts (45 -> 44)
------------------------------

  Missing    (1): fi-snb-2520m 

New tests
---------

  New tests have been introduced between CI_DRM_15620 and Patchwork_140779v1:

### New IGT tests (1) ###

  * igt@debugfs_test@basic-hwmon:
    - Statuses : 7 pass(s) 36 skip(s)
    - Exec time: [0.0, 0.00] s

  

Known issues
------------

  Here are the changes found in Patchwork_140779v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live:
    - bat-arlh-3:         [PASS][1] -> [ABORT][2] ([i915#12133])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/bat-arlh-3/igt@i915_selftest@live.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/bat-arlh-3/igt@i915_selftest@live.html
    - bat-adlp-9:         [PASS][3] -> [INCOMPLETE][4] ([i915#12133])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/bat-adlp-9/igt@i915_selftest@live.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/bat-adlp-9/igt@i915_selftest@live.html

  * igt@i915_selftest@live@hangcheck:
    - bat-adlp-9:         [PASS][5] -> [INCOMPLETE][6] ([i915#9413])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/bat-adlp-9/igt@i915_selftest@live@hangcheck.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/bat-adlp-9/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-3:         [PASS][7] -> [ABORT][8] ([i915#12061])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/bat-arlh-3/igt@i915_selftest@live@workarounds.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html

  
#### Possible fixes ####

  * igt@i915_selftest@live:
    - fi-ivb-3770:        [INCOMPLETE][9] ([i915#12133]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/fi-ivb-3770/igt@i915_selftest@live.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/fi-ivb-3770/igt@i915_selftest@live.html
    - bat-mtlp-8:         [ABORT][11] ([i915#12133] / [i915#12216]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/bat-mtlp-8/igt@i915_selftest@live.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/bat-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@hangcheck:
    - fi-ivb-3770:        [INCOMPLETE][13] ([i915#12445]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@late_gt_pm:
    - bat-atsm-1:         [ABORT][15] ([i915#12133]) -> [PASS][16] +1 other test pass
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/bat-atsm-1/igt@i915_selftest@live@late_gt_pm.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/bat-atsm-1/igt@i915_selftest@live@late_gt_pm.html

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-8:         [ABORT][17] ([i915#12216]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/bat-mtlp-8/igt@i915_selftest@live@workarounds.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/bat-mtlp-8/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
  [i915#12216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12216
  [i915#12445]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12445
  [i915#9413]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9413


Build changes
-------------

  * Linux: CI_DRM_15620 -> Patchwork_140779v1

  CI-20190529: 20190529
  CI_DRM_15620: 9c4962db90300e1d8daca8ed54195bc31d0ee932 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8091: 8091
  Patchwork_140779v1: 9c4962db90300e1d8daca8ed54195bc31d0ee932 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/index.html

[-- Attachment #2: Type: text/html, Size: 5823 bytes --]

✓ Fi.CI.IGT: success for drm/i915: Sanitize MBUS joining

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 85986 bytes --]

== Series Details ==

Series: drm/i915: Sanitize MBUS joining
URL   : https://patchwork.freedesktop.org/series/140779/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15620_full -> Patchwork_140779v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_140779v1_full:

### CI changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * boot:
    - {shard-dg2-9}:      ([PASS][1], [PASS][2]) -> ([PASS][3], [PASS][4], [FAIL][5])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-9/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-9/boot.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-9/boot.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-9/boot.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-9/boot.html

  

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_hdr@brightness-with-hdr@pipe-a-dp-4:
    - {shard-dg2-9}:      NOTRUN -> [FAIL][6] +1 other test fail
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-9/igt@kms_hdr@brightness-with-hdr@pipe-a-dp-4.html

  
New tests
---------

  New tests have been introduced between CI_DRM_15620_full and Patchwork_140779v1_full:

### New IGT tests (5) ###

  * igt@api_intel_bb@misplaced-blitter:
    - Statuses : 6 pass(s)
    - Exec time: [0.00, 0.02] s

  * igt@debugfs_test@basic-hwmon:
    - Statuses : 2 pass(s) 5 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@fbdev@pan:
    - Statuses : 7 pass(s)
    - Exec time: [0.02, 0.05] s

  * igt@kms_pm_lpsp@kms-lpsp@pipe-a-edp-1:
    - Statuses : 1 pass(s)
    - Exec time: [0.12] s

  * igt@kms_pm_lpsp@kms-lpsp@pipe-a-hdmi-a-1:
    - Statuses : 1 pass(s)
    - Exec time: [0.21] s

  

Known issues
------------

  Here are the changes found in Patchwork_140779v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-noreloc-purge-cache:
    - shard-snb:          NOTRUN -> [SKIP][7] +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-snb1/igt@api_intel_bb@blit-noreloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
    - shard-tglu:         NOTRUN -> [SKIP][8] ([i915#11078])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@device_reset@cold-reset-bound.html
    - shard-dg2:          NOTRUN -> [SKIP][9] ([i915#11078])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@device_reset@cold-reset-bound.html

  * igt@gem_basic@multigpu-create-close:
    - shard-tglu:         NOTRUN -> [SKIP][10] ([i915#7697])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@gem_basic@multigpu-create-close.html

  * igt@gem_busy@close-race:
    - shard-tglu-1:       NOTRUN -> [FAIL][11] ([i915#12296] / [i915#12577])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_busy@close-race.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-tglu-1:       NOTRUN -> [SKIP][12] ([i915#3555] / [i915#9323])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-rkl:          NOTRUN -> [SKIP][13] ([i915#9323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_create@create-ext-set-pat:
    - shard-rkl:          NOTRUN -> [SKIP][14] ([i915#8562])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-tglu:         NOTRUN -> [SKIP][15] ([i915#280])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-tglu-1:       NOTRUN -> [SKIP][16] ([i915#280])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@hibernate:
    - shard-dg1:          [PASS][17] -> [ABORT][18] ([i915#7975] / [i915#8213])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg1-13/igt@gem_eio@hibernate.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-14/igt@gem_eio@hibernate.html
    - shard-rkl:          NOTRUN -> [ABORT][19] ([i915#7975] / [i915#8213])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-2/igt@gem_eio@hibernate.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-tglu-1:       NOTRUN -> [FAIL][20] ([i915#6117])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_big@single:
    - shard-tglu:         [PASS][21] -> [ABORT][22] ([i915#11713])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-tglu-7/igt@gem_exec_big@single.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-6/igt@gem_exec_big@single.html

  * igt@gem_exec_capture@capture-invisible@smem0:
    - shard-tglu-1:       NOTRUN -> [SKIP][23] ([i915#6334]) +1 other test skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_exec_capture@capture-invisible@smem0.html

  * igt@gem_exec_capture@capture-recoverable:
    - shard-tglu-1:       NOTRUN -> [SKIP][24] ([i915#6344])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_exec_capture@capture-recoverable.html

  * igt@gem_exec_fair@basic-none-share:
    - shard-dg2:          NOTRUN -> [SKIP][25] ([i915#3539] / [i915#4852])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@gem_exec_fair@basic-none-share.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglu:         NOTRUN -> [FAIL][26] ([i915#2842]) +3 other tests fail
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][27] -> [FAIL][28] ([i915#2842]) +1 other test fail
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-rkl:          [PASS][29] -> [FAIL][30] ([i915#2842]) +2 other tests fail
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-6/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-throttle:
    - shard-rkl:          NOTRUN -> [FAIL][31] ([i915#2842]) +3 other tests fail
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gem_exec_fair@basic-throttle.html

  * igt@gem_exec_reloc@basic-cpu-gtt-active:
    - shard-dg2:          NOTRUN -> [SKIP][32] ([i915#3281]) +2 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@gem_exec_reloc@basic-cpu-gtt-active.html
    - shard-mtlp:         NOTRUN -> [SKIP][33] ([i915#3281]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-3/igt@gem_exec_reloc@basic-cpu-gtt-active.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - shard-rkl:          NOTRUN -> [SKIP][34] ([i915#3281]) +8 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][35] ([i915#11441]) +1 other test incomplete
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-dg2:          [PASS][36] -> [ABORT][37] ([i915#7975] / [i915#8213]) +1 other test abort
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-11/igt@gem_exec_suspend@basic-s4-devices.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-8/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][38] ([i915#4860]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html

  * igt@gem_lmem_swapping@heavy-multi:
    - shard-glk:          NOTRUN -> [SKIP][39] ([i915#4613]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk9/igt@gem_lmem_swapping@heavy-multi.html

  * igt@gem_lmem_swapping@massive:
    - shard-tglu-1:       NOTRUN -> [SKIP][40] ([i915#4613]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_lmem_swapping@massive.html

  * igt@gem_lmem_swapping@random:
    - shard-tglu:         NOTRUN -> [SKIP][41] ([i915#4613]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@gem_lmem_swapping@random.html

  * igt@gem_mmap_gtt@basic-write:
    - shard-dg2:          NOTRUN -> [SKIP][42] ([i915#4077]) +2 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@gem_mmap_gtt@basic-write.html

  * igt@gem_mmap_wc@bad-object:
    - shard-dg2:          NOTRUN -> [SKIP][43] ([i915#4083]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@gem_mmap_wc@bad-object.html

  * igt@gem_mmap_wc@write-cpu-read-wc:
    - shard-mtlp:         NOTRUN -> [SKIP][44] ([i915#4083])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@gem_mmap_wc@write-cpu-read-wc.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-rkl:          NOTRUN -> [SKIP][45] ([i915#3282]) +3 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-dg2:          NOTRUN -> [SKIP][46] ([i915#3282])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@gem_pwrite@basic-exhaustion.html
    - shard-mtlp:         NOTRUN -> [SKIP][47] ([i915#3282])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-3/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
    - shard-rkl:          NOTRUN -> [SKIP][48] ([i915#4270]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-tglu-1:       NOTRUN -> [SKIP][49] ([i915#4270]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-mtlp:         NOTRUN -> [SKIP][50] ([i915#4270])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
    - shard-dg2:          NOTRUN -> [SKIP][51] ([i915#4270])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
    - shard-tglu:         NOTRUN -> [SKIP][52] ([i915#4270]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#5190] / [i915#8428]) +2 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-7/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled.html

  * igt@gem_userptr_blits@coherency-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][54] ([i915#3297])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@gem_userptr_blits@coherency-unsync.html
    - shard-tglu:         NOTRUN -> [SKIP][55] ([i915#3297]) +2 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@gem_userptr_blits@coherency-unsync.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][56] ([i915#3297]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-tglu-1:       NOTRUN -> [SKIP][57] ([i915#3297])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-rkl:          NOTRUN -> [SKIP][58] ([i915#2527]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@batch-zero-length:
    - shard-tglu:         NOTRUN -> [SKIP][59] ([i915#2527] / [i915#2856]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@gen9_exec_parse@batch-zero-length.html
    - shard-dg2:          NOTRUN -> [SKIP][60] ([i915#2856]) +2 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@gen9_exec_parse@batch-zero-length.html

  * igt@gen9_exec_parse@bb-chained:
    - shard-tglu-1:       NOTRUN -> [SKIP][61] ([i915#2527] / [i915#2856]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@gen9_exec_parse@bb-chained.html

  * igt@gen9_exec_parse@cmd-crossing-page:
    - shard-dg1:          NOTRUN -> [SKIP][62] ([i915#2527])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-13/igt@gen9_exec_parse@cmd-crossing-page.html

  * igt@i915_module_load@load:
    - shard-tglu-1:       NOTRUN -> [SKIP][63] ([i915#6227])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@i915_module_load@load.html

  * igt@i915_module_load@resize-bar:
    - shard-tglu:         NOTRUN -> [SKIP][64] ([i915#6412])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_freq_api@freq-basic-api:
    - shard-tglu-1:       NOTRUN -> [SKIP][65] ([i915#8399])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@i915_pm_freq_api@freq-basic-api.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-dg2:          NOTRUN -> [SKIP][66] +3 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_query@query-topology-coherent-slice-mask:
    - shard-dg2:          NOTRUN -> [SKIP][67] ([i915#6188])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@i915_query@query-topology-coherent-slice-mask.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-tglu-1:       NOTRUN -> [SKIP][68] ([i915#5723])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@i915_query@test-query-geometry-subslices.html

  * igt@intel_hwmon@hwmon-write:
    - shard-tglu:         NOTRUN -> [SKIP][69] ([i915#7707])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][70] ([i915#4212])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [SKIP][71] ([i915#8709]) +3 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-4-y-rc-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][72] ([i915#8709]) +7 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-17/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-4-y-rc-ccs.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-3-4-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#8709]) +11 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-3-4-mc-ccs.html

  * igt@kms_async_flips@invalid-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][74] ([i915#6228])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@kms_async_flips@invalid-async-flip.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-tglu-1:       NOTRUN -> [SKIP][75] ([i915#9531])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-rkl:          NOTRUN -> [SKIP][76] ([i915#5286]) +3 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-2/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-180:
    - shard-tglu-1:       NOTRUN -> [SKIP][77] ([i915#5286]) +3 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][78] +2 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-tglu:         NOTRUN -> [SKIP][79] ([i915#5286]) +3 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][80] ([i915#3638])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][81] ([i915#4538] / [i915#5190]) +5 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][82] ([i915#4538])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-15/igt@kms_big_fb@yf-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-rkl:          NOTRUN -> [SKIP][83] +16 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][84] ([i915#6095]) +112 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-17/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc:
    - shard-mtlp:         NOTRUN -> [SKIP][85] ([i915#6095]) +14 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][86] ([i915#6095]) +67 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-1/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [SKIP][87] +20 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk9/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][88] ([i915#12313])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][89] ([i915#6095]) +49 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-c-dp-3:
    - shard-dg2:          NOTRUN -> [SKIP][90] ([i915#10307] / [i915#6095]) +117 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-c-dp-3.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][91] ([i915#12313])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
    - shard-dg2:          NOTRUN -> [SKIP][92] ([i915#12313])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][93] ([i915#12313]) +4 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][94] ([i915#6095]) +54 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][95] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition:
    - shard-tglu-1:       NOTRUN -> [SKIP][96] ([i915#3742])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-rkl:          NOTRUN -> [SKIP][97] ([i915#7828]) +4 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
    - shard-mtlp:         NOTRUN -> [SKIP][98] ([i915#7828]) +2 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-3/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-tglu-1:       NOTRUN -> [SKIP][99] ([i915#7828]) +5 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm:
    - shard-dg2:          NOTRUN -> [SKIP][100] ([i915#7828]) +4 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@kms_chamelium_hpd@hdmi-hpd-storm.html

  * igt@kms_chamelium_hpd@vga-hpd-without-ddc:
    - shard-tglu:         NOTRUN -> [SKIP][101] ([i915#7828]) +8 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html

  * igt@kms_content_protection@atomic:
    - shard-tglu-1:       NOTRUN -> [SKIP][102] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][103] ([i915#3116])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@srm@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [TIMEOUT][104] ([i915#7173])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_content_protection@srm@pipe-a-dp-3.html

  * igt@kms_content_protection@uevent@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [FAIL][105] ([i915#1339] / [i915#7173])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_content_protection@uevent@pipe-a-dp-3.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-tglu:         NOTRUN -> [SKIP][106] ([i915#3555]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_cursor_crc@cursor-onscreen-32x32.html
    - shard-dg2:          NOTRUN -> [SKIP][107] ([i915#3555])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#3555]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-tglu-1:       NOTRUN -> [SKIP][109] ([i915#11453] / [i915#3359]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-mtlp:         NOTRUN -> [SKIP][110] ([i915#9809]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
    - shard-mtlp:         [PASS][111] -> [FAIL][112] ([i915#2346])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-6/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-5/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-tglu:         NOTRUN -> [SKIP][113] ([i915#4103])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-rkl:          NOTRUN -> [SKIP][114] ([i915#9723])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-tglu:         NOTRUN -> [SKIP][115] ([i915#8588])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dp_aux_dev:
    - shard-tglu-1:       NOTRUN -> [SKIP][116] ([i915#1257])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_dp_aux_dev.html

  * igt@kms_dsc@dsc-basic:
    - shard-rkl:          NOTRUN -> [SKIP][117] ([i915#3555] / [i915#3840]) +1 other test skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-tglu-1:       NOTRUN -> [SKIP][118] ([i915#3840])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-dg2:          NOTRUN -> [SKIP][119] ([i915#3840] / [i915#9053])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
    - shard-tglu:         NOTRUN -> [SKIP][120] ([i915#3840] / [i915#9053])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#9337])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][122] ([i915#3637]) +4 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@kms_flip@2x-blocking-absolute-wf_vblank.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][123] ([i915#9934])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-13/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-plain-flip:
    - shard-tglu-1:       NOTRUN -> [SKIP][124] ([i915#3637]) +5 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-snb:          [PASS][125] -> [FAIL][126] ([i915#2122]) +5 other tests fail
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-snb2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-snb7/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@blocking-wf_vblank:
    - shard-rkl:          [PASS][127] -> [FAIL][128] ([i915#11961] / [i915#2122])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-7/igt@kms_flip@blocking-wf_vblank.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-5/igt@kms_flip@blocking-wf_vblank.html

  * igt@kms_flip@blocking-wf_vblank@a-hdmi-a2:
    - shard-rkl:          NOTRUN -> [FAIL][129] ([i915#11961])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-5/igt@kms_flip@blocking-wf_vblank@a-hdmi-a2.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank:
    - shard-dg2:          [PASS][130] -> [FAIL][131] ([i915#2122])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-5/igt@kms_flip@flip-vs-absolute-wf_vblank.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-8/igt@kms_flip@flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1:
    - shard-dg2:          NOTRUN -> [FAIL][132] ([i915#2122]) +1 other test fail
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-8/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html
    - shard-rkl:          [PASS][133] -> [FAIL][134] ([i915#2122]) +4 other tests fail
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-7/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-7/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html
    - shard-tglu:         [PASS][135] -> [FAIL][136] ([i915#2122])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-tglu-7/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-6/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1:
    - shard-mtlp:         [PASS][137] -> [FAIL][138] ([i915#2122])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-3/igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-2/igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][139] ([i915#4839])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk1/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1:
    - shard-tglu-1:       NOTRUN -> [FAIL][140] ([i915#2122]) +2 other tests fail
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a2:
    - shard-rkl:          [PASS][141] -> [FAIL][142] ([i915#11989])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-5/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a2.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-3/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a4:
    - shard-dg1:          [PASS][143] -> [FAIL][144] ([i915#2122]) +2 other tests fail
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg1-15/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a4.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-14/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a4.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][145] ([i915#2587] / [i915#2672]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][146] ([i915#2672] / [i915#3555])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][147] ([i915#2672])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][148] ([i915#2672] / [i915#3555]) +3 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][149] ([i915#2587] / [i915#2672]) +3 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][150] ([i915#2672] / [i915#3555]) +1 other test skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][151] ([i915#1825]) +21 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][152] ([i915#8708]) +6 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][153] ([i915#8708])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][154] ([i915#8708]) +1 other test skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
    - shard-dg2:          NOTRUN -> [SKIP][155] ([i915#3458]) +5 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
    - shard-rkl:          NOTRUN -> [SKIP][156] ([i915#3023]) +11 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-tglu-1:       NOTRUN -> [SKIP][157] ([i915#9766])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][158] ([i915#10433] / [i915#3458])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#5354]) +16 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render:
    - shard-mtlp:         NOTRUN -> [SKIP][160] ([i915#1825]) +2 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][161] +68 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc:
    - shard-tglu-1:       NOTRUN -> [SKIP][162] +62 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][163] ([i915#3555] / [i915#8228])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_hdr@bpc-switch-dpms.html
    - shard-tglu:         NOTRUN -> [SKIP][164] ([i915#3555] / [i915#8228])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-tglu-1:       NOTRUN -> [SKIP][165] ([i915#3555] / [i915#8228]) +1 other test skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-toggle:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#3555] / [i915#8228]) +2 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_hdr@static-toggle.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][167] ([i915#10656])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][168] ([i915#10656])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@kms_joiner@basic-force-ultra-joiner.html
    - shard-tglu:         NOTRUN -> [SKIP][169] ([i915#12394])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-dg2:          [PASS][170] -> [SKIP][171] ([i915#12388])
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-10/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-1/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-tglu-1:       NOTRUN -> [SKIP][172] ([i915#12394])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#4816])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-tglu-1:       NOTRUN -> [SKIP][174] ([i915#6301])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-mtlp:         NOTRUN -> [SKIP][175] ([i915#3555] / [i915#8821])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-tglu-1:       NOTRUN -> [SKIP][176] ([i915#3555]) +6 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-dg2:          NOTRUN -> [SKIP][177] ([i915#6953] / [i915#9423])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [FAIL][178] ([i915#8292]) +1 other test fail
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#12247]) +2 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-d:
    - shard-tglu-1:       NOTRUN -> [SKIP][180] ([i915#12247]) +8 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-d.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25:
    - shard-tglu-1:       NOTRUN -> [SKIP][181] ([i915#12247] / [i915#6953])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-tglu-1:       NOTRUN -> [SKIP][182] ([i915#9812])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@fade:
    - shard-tglu:         NOTRUN -> [SKIP][183] ([i915#9812])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][184] ([i915#5354])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu-1:       NOTRUN -> [FAIL][185] ([i915#9295])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-tglu:         NOTRUN -> [SKIP][186] ([i915#3828])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-tglu-1:       NOTRUN -> [SKIP][187] ([i915#8430])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-dg2:          [PASS][188] -> [SKIP][189] ([i915#9519])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-7/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [PASS][190] -> [SKIP][191] ([i915#9519]) +3 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp.html
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          NOTRUN -> [SKIP][192] ([i915#9519])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-tglu:         NOTRUN -> [SKIP][193] ([i915#9519])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_prime@d3hot:
    - shard-dg2:          NOTRUN -> [SKIP][194] ([i915#6524] / [i915#6805])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@kms_prime@d3hot.html
    - shard-tglu:         NOTRUN -> [SKIP][195] ([i915#6524])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf:
    - shard-dg2:          NOTRUN -> [SKIP][196] ([i915#11520]) +2 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
    - shard-mtlp:         NOTRUN -> [SKIP][197] ([i915#12316]) +1 other test skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-3/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][198] ([i915#11520]) +3 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-tglu-1:       NOTRUN -> [SKIP][199] ([i915#11520]) +4 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
    - shard-glk:          NOTRUN -> [SKIP][200] ([i915#11520])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk9/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-tglu:         NOTRUN -> [SKIP][201] ([i915#11520]) +4 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-dg1:          NOTRUN -> [SKIP][202] ([i915#11520])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-13/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-pr-cursor-blt:
    - shard-tglu:         NOTRUN -> [SKIP][203] ([i915#9732]) +17 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-7/igt@kms_psr@fbc-pr-cursor-blt.html

  * igt@kms_psr@fbc-psr-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][204] ([i915#1072] / [i915#9732]) +12 other tests skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_psr@fbc-psr-dpms.html

  * igt@kms_psr@fbc-psr-primary-mmap-cpu:
    - shard-dg1:          NOTRUN -> [SKIP][205] ([i915#1072] / [i915#9732])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-15/igt@kms_psr@fbc-psr-primary-mmap-cpu.html

  * igt@kms_psr@fbc-psr2-primary-render:
    - shard-mtlp:         NOTRUN -> [SKIP][206] ([i915#9688]) +1 other test skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@kms_psr@fbc-psr2-primary-render.html

  * igt@kms_psr@pr-cursor-mmap-cpu:
    - shard-tglu-1:       NOTRUN -> [SKIP][207] ([i915#9732]) +15 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_psr@pr-cursor-mmap-cpu.html

  * igt@kms_psr@psr2-cursor-blt:
    - shard-dg2:          NOTRUN -> [SKIP][208] ([i915#1072] / [i915#9732]) +9 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_psr@psr2-cursor-blt.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-tglu-1:       NOTRUN -> [SKIP][209] ([i915#9685]) +1 other test skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-tglu:         NOTRUN -> [SKIP][210] ([i915#5289]) +2 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][211] ([i915#11131] / [i915#4235])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-rkl:          NOTRUN -> [ABORT][212] ([i915#12231]) +1 other test abort
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-3/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_setmode@basic@pipe-b-edp-1:
    - shard-mtlp:         [PASS][213] -> [FAIL][214] ([i915#5465]) +1 other test fail
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-8/igt@kms_setmode@basic@pipe-b-edp-1.html
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-5/igt@kms_setmode@basic@pipe-b-edp-1.html

  * igt@kms_setmode@basic@pipe-b-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [FAIL][215] ([i915#12317])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-12/igt@kms_setmode@basic@pipe-b-hdmi-a-3.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-mtlp:         NOTRUN -> [SKIP][216] ([i915#8808] / [i915#9906])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          NOTRUN -> [SKIP][217] ([i915#11920])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_vrr@lobf.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-rkl:          NOTRUN -> [SKIP][218] ([i915#2437] / [i915#9412])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-tglu-1:       NOTRUN -> [SKIP][219] ([i915#2437])
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-tglu:         NOTRUN -> [SKIP][220] ([i915#2437] / [i915#9412])
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-4/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf_pmu@busy-accuracy-98@rcs0:
    - shard-tglu:         [PASS][221] -> [FAIL][222] ([i915#12513] / [i915#4349]) +1 other test fail
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-tglu-5/igt@perf_pmu@busy-accuracy-98@rcs0.html
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-8/igt@perf_pmu@busy-accuracy-98@rcs0.html

  * igt@perf_pmu@module-unload:
    - shard-snb:          [PASS][223] -> [ABORT][224] ([i915#9853])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-snb5/igt@perf_pmu@module-unload.html
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-snb4/igt@perf_pmu@module-unload.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-tglu:         NOTRUN -> [SKIP][225] ([i915#8516])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-9/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-dg2:          NOTRUN -> [SKIP][226] ([i915#3708]) +1 other test skip
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@prime_vgem@fence-flip-hang.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - shard-tglu-1:       NOTRUN -> [SKIP][227] ([i915#9917])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-rkl:          NOTRUN -> [SKIP][228] ([i915#9917])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-4/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@syncobj_wait@invalid-wait-zero-handles:
    - shard-tglu-1:       NOTRUN -> [FAIL][229] ([i915#12564] / [i915#9781])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-1/igt@syncobj_wait@invalid-wait-zero-handles.html

  
#### Possible fixes ####

  * igt@gem_wait@write-wait:
    - shard-mtlp:         [INCOMPLETE][230] -> [PASS][231] +1 other test pass
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-2/igt@gem_wait@write-wait.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-4/igt@gem_wait@write-wait.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2:          [ABORT][232] ([i915#9820]) -> [PASS][233]
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-4/igt@i915_module_load@reload-with-fault-injection.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-7/igt@i915_module_load@reload-with-fault-injection.html
    - shard-rkl:          [ABORT][234] ([i915#9820]) -> [PASS][235]
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-3/igt@i915_module_load@reload-with-fault-injection.html
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-2/igt@i915_module_load@reload-with-fault-injection.html
    - shard-tglu:         [ABORT][236] ([i915#9820]) -> [PASS][237]
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-tglu-3/igt@i915_module_load@reload-with-fault-injection.html
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-7/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pipe_stress@stress-xrgb8888-untiled:
    - shard-mtlp:         [DMESG-WARN][238] ([i915#1982]) -> [PASS][239]
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-1/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-6/igt@i915_pipe_stress@stress-xrgb8888-untiled.html

  * igt@i915_selftest@live:
    - shard-mtlp:         [ABORT][240] ([i915#12133] / [i915#12216]) -> [PASS][241]
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-3/igt@i915_selftest@live.html
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - shard-mtlp:         [ABORT][242] ([i915#12216]) -> [PASS][243]
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-3/igt@i915_selftest@live@workarounds.html
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-8/igt@i915_selftest@live@workarounds.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-dg1:          [DMESG-WARN][244] ([i915#4391] / [i915#4423]) -> [PASS][245]
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg1-14/igt@i915_suspend@basic-s3-without-i915.html
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-17/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_cursor_crc@cursor-onscreen-128x128:
    - shard-dg1:          [DMESG-WARN][246] ([i915#4423]) -> [PASS][247] +1 other test pass
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg1-15/igt@kms_cursor_crc@cursor-onscreen-128x128.html
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-14/igt@kms_cursor_crc@cursor-onscreen-128x128.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [FAIL][248] ([i915#2346]) -> [PASS][249]
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-dg2:          [SKIP][250] ([i915#12402]) -> [PASS][251]
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-3/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1:
    - shard-glk:          [FAIL][252] ([i915#2122]) -> [PASS][253] +5 other tests pass
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk5/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk1/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-glk:          [FAIL][254] ([i915#79]) -> [PASS][255] +1 other test pass
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk3/igt@kms_flip@flip-vs-expired-vblank.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk5/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2:
    - shard-glk:          [INCOMPLETE][256] ([i915#4839]) -> [PASS][257]
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk6/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk1/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html

  * igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1:
    - shard-snb:          [INCOMPLETE][258] ([i915#4839]) -> [PASS][259] +1 other test pass
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-snb6/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-snb1/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-mtlp:         [FAIL][260] ([i915#2122]) -> [PASS][261] +3 other tests pass
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate@c-hdmi-a1:
    - shard-tglu:         [FAIL][262] ([i915#2122]) -> [PASS][263] +4 other tests pass
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-tglu-3/igt@kms_flip@plain-flip-fb-recreate@c-hdmi-a1.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-2/igt@kms_flip@plain-flip-fb-recreate@c-hdmi-a1.html

  * igt@kms_flip@wf_vblank-ts-check:
    - shard-rkl:          [FAIL][264] ([i915#11989] / [i915#2122]) -> [PASS][265]
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-5/igt@kms_flip@wf_vblank-ts-check.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-7/igt@kms_flip@wf_vblank-ts-check.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          [FAIL][266] ([i915#6880]) -> [PASS][267]
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite:
    - shard-snb:          [SKIP][268] -> [PASS][269] +8 other tests pass
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-dg2:          [SKIP][270] ([i915#3555] / [i915#8228]) -> [PASS][271]
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-3/igt@kms_hdr@bpc-switch-suspend.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-dg2:          [SKIP][272] ([i915#12388]) -> [PASS][273]
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-3/igt@kms_joiner@basic-force-big-joiner.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         [SKIP][274] ([i915#4281]) -> [PASS][275]
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-tglu-7/igt@kms_pm_dc@dc9-dpms.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-tglu-5/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [SKIP][276] ([i915#9519]) -> [PASS][277] +2 other tests pass
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-7/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg2:          [SKIP][278] ([i915#9519]) -> [PASS][279] +1 other test pass
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-11/igt@kms_pm_rpm@modeset-lpsp.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1-pipe-b-hdmi-a-2:
    - shard-glk:          [FAIL][280] ([i915#5465]) -> [PASS][281] +4 other tests pass
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk2/igt@kms_setmode@basic@pipe-a-hdmi-a-1-pipe-b-hdmi-a-2.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk6/igt@kms_setmode@basic@pipe-a-hdmi-a-1-pipe-b-hdmi-a-2.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-2:
    - shard-glk:          [FAIL][282] ([i915#12527] / [i915#5465]) -> [PASS][283] +1 other test pass
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk2/igt@kms_setmode@basic@pipe-a-hdmi-a-2.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk6/igt@kms_setmode@basic@pipe-a-hdmi-a-2.html

  * igt@kms_sysfs_edid_timing:
    - shard-dg2:          [FAIL][284] ([IGT#2]) -> [PASS][285]
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-3/igt@kms_sysfs_edid_timing.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_sysfs_edid_timing.html

  * igt@kms_universal_plane@cursor-fb-leak:
    - shard-mtlp:         [FAIL][286] ([i915#9196]) -> [PASS][287] +1 other test pass
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-6/igt@kms_universal_plane@cursor-fb-leak.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-5/igt@kms_universal_plane@cursor-fb-leak.html

  
#### Warnings ####

  * igt@gem_busy@close-race:
    - shard-dg2:          [FAIL][288] ([i915#12297] / [i915#12577]) -> [FAIL][289] ([i915#12296] / [i915#12577])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-1/igt@gem_busy@close-race.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-3/igt@gem_busy@close-race.html
    - shard-rkl:          [FAIL][290] ([i915#12297] / [i915#12577]) -> [FAIL][291] ([i915#12296] / [i915#12577])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-2/igt@gem_busy@close-race.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-1/igt@gem_busy@close-race.html
    - shard-snb:          [FAIL][292] ([i915#12297] / [i915#12577]) -> [FAIL][293] ([i915#12296] / [i915#12577])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-snb6/igt@gem_busy@close-race.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-snb1/igt@gem_busy@close-race.html
    - shard-dg1:          [FAIL][294] ([i915#12297] / [i915#12577]) -> [FAIL][295] ([i915#12296] / [i915#12577])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg1-15/igt@gem_busy@close-race.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-12/igt@gem_busy@close-race.html
    - shard-mtlp:         [FAIL][296] ([i915#12297] / [i915#12577]) -> [FAIL][297] ([i915#12296] / [i915#12577])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-1/igt@gem_busy@close-race.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-6/igt@gem_busy@close-race.html
    - shard-glk:          [FAIL][298] ([i915#12297] / [i915#12526] / [i915#12577]) -> [FAIL][299] ([i915#12296] / [i915#12526] / [i915#12577])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-glk2/igt@gem_busy@close-race.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-glk6/igt@gem_busy@close-race.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-mtlp:         [ABORT][300] ([i915#10131] / [i915#9820]) -> [ABORT][301] ([i915#10131] / [i915#10887] / [i915#9820])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-5/igt@i915_module_load@reload-with-fault-injection.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][302] ([i915#9433]) -> [SKIP][303] ([i915#9424])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg1-13/igt@kms_content_protection@mei-interface.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg1-17/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@srm:
    - shard-dg2:          [SKIP][304] ([i915#7118]) -> [TIMEOUT][305] ([i915#7173])
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-11/igt@kms_content_protection@srm.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent:
    - shard-dg2:          [SKIP][306] ([i915#7118] / [i915#9424]) -> [FAIL][307] ([i915#1339] / [i915#7173])
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-3/igt@kms_content_protection@uevent.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-10/igt@kms_content_protection@uevent.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu:
    - shard-dg2:          [SKIP][308] ([i915#3458]) -> [SKIP][309] ([i915#10433] / [i915#3458]) +1 other test skip
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu.html
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          [SKIP][310] ([i915#10433] / [i915#3458]) -> [SKIP][311] ([i915#3458])
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-mtlp:         [SKIP][312] -> [SKIP][313] ([i915#1187])
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-mtlp-5/igt@kms_hdr@brightness-with-hdr.html
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-mtlp-1/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-rkl:          [FAIL][314] ([i915#9295]) -> [SKIP][315] ([i915#3361])
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-5/igt@kms_pm_dc@dc6-dpms.html
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-3/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          [SKIP][316] ([i915#4281]) -> [SKIP][317] ([i915#3361])
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-rkl-1/igt@kms_pm_dc@dc9-dpms.html

  * igt@perf@non-zero-reason@0-rcs0:
    - shard-dg2:          [FAIL][318] ([i915#9100]) -> [FAIL][319] ([i915#7484]) +1 other test fail
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15620/shard-dg2-4/igt@perf@non-zero-reason@0-rcs0.html
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/shard-dg2-7/igt@perf@non-zero-reason@0-rcs0.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
  [i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11131
  [i915#11441]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11441
  [i915#11453]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11453
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11713
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#11961]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11961
  [i915#11989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11989
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
  [i915#12216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12216
  [i915#12231]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12231
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12296]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12296
  [i915#12297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12297
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12317]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12317
  [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
  [i915#12394]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12394
  [i915#12402]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12402
  [i915#12513]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12513
  [i915#12526]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12526
  [i915#12527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12527
  [i915#12564]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12564
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#12577]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12577
  [i915#1339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1339
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5465]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5465
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#5978]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5978
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6117
  [i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
  [i915#6227]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6227
  [i915#6228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6228
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
  [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#7484]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7484
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#79]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/79
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8292
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
  [i915#8588]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8588
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
  [i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
  [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
  [i915#9100]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9100
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
  [i915#9781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9781
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9853]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9853
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_15620 -> Patchwork_140779v1

  CI-20190529: 20190529
  CI_DRM_15620: 9c4962db90300e1d8daca8ed54195bc31d0ee932 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8091: 8091
  Patchwork_140779v1: 9c4962db90300e1d8daca8ed54195bc31d0ee932 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140779v1/index.html

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