* [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback
@ 2022-08-04 8:28 Suraj Kandpal
2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Define WD trancoder for i915 Suraj Kandpal
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Suraj Kandpal @ 2022-08-04 8:28 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
A patch series was floated in the drm mailing list which aimed to change
the drm_connector and drm_encoder fields to pointer in the
drm_connector_writeback structure, this received a huge pushback from
the community but since i915 expects each connector present in the
drm_device list to be a intel_connector but drm_writeback framework
makes us have a connector which cannot be embedded in an intel_connector
structure.
[1] https://patchwork.kernel.org/project/dri-devel/patch/20220202081702.22119-1-suraj.kandpal@intel.com/
[2] https://patchwork.kernel.org/project/dri-devel/patch/20220202085429.22261-6-suraj.kandpal@intel.com/
Since no one had an issue with encoder field being changed into a
pointer it was decided to break the connector and encoder pointer
changes into two different series.The encoder field changes is
currently being worked upon by Abhinav Kumar and the changes have been
merged.
[3]https://patchwork.kernel.org/project/dri-devel/list/?series=633565
Going forward we use a drm_connector which is not embedded in
intel_connector.
We also create a intel_encoder to avoid changes to many
iterators but no intel_connector. We also changed all iterators that
go through connectors and add a check to only cast connectors which are
not writeback connectors.
v2-----------
changes to fix build errors.
v3----------
changes to fix BAT errors.
Suraj Kandpal (2):
drm/i915: Define WD trancoder for i915
drm/i915: Enabling WD Transcoder
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_acpi.c | 1 +
drivers/gpu/drm/i915/display/intel_crtc.c | 3 +
.../drm/i915/display/intel_crtc_state_dump.c | 1 +
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +
drivers/gpu/drm/i915/display/intel_display.c | 63 +-
drivers/gpu/drm/i915/display/intel_display.h | 21 +-
.../drm/i915/display/intel_display_debugfs.c | 14 +-
.../drm/i915/display/intel_display_types.h | 30 +
drivers/gpu/drm/i915/display/intel_dpll.c | 6 +
.../drm/i915/display/intel_modeset_setup.c | 67 +-
.../drm/i915/display/intel_modeset_verify.c | 18 +-
drivers/gpu/drm/i915/display/intel_opregion.c | 3 +
.../gpu/drm/i915/display/intel_wb_connector.h | 20 +
drivers/gpu/drm/i915/display/intel_wd.c | 733 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_wd.h | 76 ++
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_irq.c | 8 +-
drivers/gpu/drm/i915/i915_pci.c | 7 +-
drivers/gpu/drm/i915/i915_reg.h | 139 ++++
20 files changed, 1192 insertions(+), 27 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_wb_connector.h
create mode 100644 drivers/gpu/drm/i915/display/intel_wd.c
create mode 100644 drivers/gpu/drm/i915/display/intel_wd.h
--
2.37.0
^ permalink raw reply [flat|nested] 8+ messages in thread* [Intel-gfx] [PATCH v3 1/2] drm/i915: Define WD trancoder for i915 2022-08-04 8:28 [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback Suraj Kandpal @ 2022-08-04 8:28 ` Suraj Kandpal 2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 2/2] drm/i915: Enabling WD Transcoder Suraj Kandpal ` (4 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Suraj Kandpal @ 2022-08-04 8:28 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula Adding WD Types, WD transcoder to enum list and WD Transcoder offsets. Adding i915 register definitions related to WD transcoder Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.h | 6 + .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 139 ++++++++++++++++++ 3 files changed, 146 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index fa5371036239..4e9f22954a41 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -120,6 +120,8 @@ enum transcoder { TRANSCODER_DSI_1, TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */ TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */ + TRANSCODER_WD_0, + TRANSCODER_WD_1, I915_MAX_TRANSCODERS }; @@ -141,6 +143,10 @@ static inline const char *transcoder_name(enum transcoder transcoder) return "DSI A"; case TRANSCODER_DSI_C: return "DSI C"; + case TRANSCODER_WD_0: + return "WD 0"; + case TRANSCODER_WD_1: + return "WD 1"; default: return "<invalid>"; } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 0da9b208d56e..0e94bd430bcb 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -79,6 +79,7 @@ enum intel_output_type { INTEL_OUTPUT_DSI = 9, INTEL_OUTPUT_DDI = 10, INTEL_OUTPUT_DP_MST = 11, + INTEL_OUTPUT_WD = 12, }; enum hdmi_force_audio { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 3168d7007e10..273f5c7cbd89 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2052,6 +2052,8 @@ #define TRANSCODER_EDP_OFFSET 0x6f000 #define TRANSCODER_DSI0_OFFSET 0x6b000 #define TRANSCODER_DSI1_OFFSET 0x6b800 +#define TRANSCODER_WD0_OFFSET 0x6e000 +#define TRANSCODER_WD1_OFFSET 0x6e800 #define HTOTAL(trans) _MMIO_TRANS2(trans, _HTOTAL_A) #define HBLANK(trans) _MMIO_TRANS2(trans, _HBLANK_A) @@ -3824,6 +3826,11 @@ #define PIPE_DSI0_OFFSET 0x7b000 #define PIPE_DSI1_OFFSET 0x7b800 +/* WD 0 and 1 */ +#define PIPE_WD0_OFFSET 0x7e000 +#define PIPE_WD1_OFFSET 0x7d000 + + #define PIPECONF(pipe) _MMIO_PIPE2(pipe, _PIPEACONF) #define PIPEDSL(pipe) _MMIO_PIPE2(pipe, _PIPEADSL) #define PIPEFRAME(pipe) _MMIO_PIPE2(pipe, _PIPEAFRAMEHIGH) @@ -4488,6 +4495,10 @@ #define _PIPEDSI0CONF 0x7b008 #define _PIPEDSI1CONF 0x7b808 +/* WD 0 and 1 */ +#define _PIPEWD0CONF 0x7e008 +#define _PIPEWD1CONF 0x7d008 + /* Sprite A control */ #define _DVSACNTR 0x72180 #define DVS_ENABLE REG_BIT(31) @@ -5713,6 +5724,7 @@ #define GEN8_DE_MISC_IER _MMIO(0x4446c) #define GEN8_DE_MISC_GSE (1 << 27) #define GEN8_DE_EDP_PSR (1 << 19) +#define GEN8_DE_MISC_WD0 (1 << 23) #define GEN8_PCU_ISR _MMIO(0x444e0) #define GEN8_PCU_IMR _MMIO(0x444e4) @@ -8707,6 +8719,133 @@ enum skl_power_gate { #define DSB_ENABLE (1 << 31) #define DSB_STATUS (1 << 0) +#define TGL_ROOT_DEVICE_ID 0x9A00 +#define TGL_ROOT_DEVICE_MASK 0xFF00 +#define TGL_ROOT_DEVICE_SKU_MASK 0xF +#define TGL_ROOT_DEVICE_SKU_ULX 0x2 +#define TGL_ROOT_DEVICE_SKU_ULT 0x4 + +/* Gen12 WD */ +#define _MMIO_WD(tc, wd0, wd1) _MMIO_TRANS((tc) - TRANSCODER_WD_0, \ + wd0, wd1) + +#define WD_TRANS_ENABLE (1 << 31) +#define WD_TRANS_DISABLE 0 +#define WD_TRANS_ACTIVE (1 << 30) + +/* WD transcoder control */ +#define _WD_TRANS_FUNC_CTL_0 0x6e400 +#define _WD_TRANS_FUNC_CTL_1 0x6ec00 +#define WD_TRANS_FUNC_CTL(tc) _MMIO_WD(tc,\ + _WD_TRANS_FUNC_CTL_0,\ + _WD_TRANS_FUNC_CTL_1) + +#define TRANS_WD_FUNC_ENABLE (1 << 31) +#define WD_TRIGGERED_CAP_MODE_ENABLE (1 << 30) +#define START_TRIGGER_FRAME (1 << 29) +#define STOP_TRIGGER_FRAME (1 << 28) +#define WD_CTL_POINTER_ETEH (0 << 18) +#define WD_CTL_POINTER_ETDH (1 << 18) +#define WD_CTL_POINTER_DTDH (2 << 18) +#define WD_INPUT_SELECT_MASK (7 << 12) +#define WD_INPUT_PIPE_A (0 << 12) +#define WD_INPUT_PIPE_B (5 << 12) +#define WD_INPUT_PIPE_C (6 << 12) +#define WD_INPUT_PIPE_D (7 << 12) + +#define WD_PIX_FMT_MASK (0x3 << 20) +#define WD_PIX_FMT_YUYV (0x1 << 20) +#define WD_PIX_FMT_XYUV8888 (0x2 << 20) +#define WD_PIX_FMT_XBGR8888 (0x3 << 20) +#define WD_PIX_FMT_Y410 (0x4 << 20) +#define WD_PIX_FMT_YUV422 (0x5 << 20) +#define WD_PIX_FMT_XBGR2101010 (0x6 << 20) +#define WD_PIX_FMT_RGB565 (0x7 << 20) + +#define WD_FRAME_NUMBER_MASK 15 + +#define _WD_STRIDE_0 0x6e510 +#define _WD_STRIDE_1 0x6ed10 +#define WD_STRIDE(tc) _MMIO_WD(tc,\ + _WD_STRIDE_0,\ + _WD_STRIDE_1) +#define WD_STRIDE_SHIFT 6 +#define WD_STRIDE_MASK (0x3ff << WD_STRIDE_SHIFT) + +#define _WD_STREAMCAP_CTL0 0x6e590 +#define _WD_STREAMCAP_CTL1 0x6ed90 +#define WD_STREAMCAP_CTL(tc) _MMIO_WD(tc,\ + _WD_STREAMCAP_CTL0,\ + _WD_STREAMCAP_CTL1) + +#define WD_STREAM_CAP_MODE_EN (1 << 31) +#define WD_STRAT_MASK (3 << 24) +#define WD_SLICING_STRAT_1_1 (0 << 24) +#define WD_SLICING_STRAT_2_1 (1 << 24) +#define WD_SLICING_STRAT_4_1 (2 << 24) +#define WD_SLICING_STRAT_8_1 (3 << 24) +#define WD_STREAM_OVERRUN_STATUS 1 + +#define _WD_SURF_0 0x6e514 +#define _WD_SURF_1 0x6ed14 +#define WD_SURF(tc) _MMIO_WD(tc,\ + _WD_SURF_0,\ + _WD_SURF_1) + +#define _WD_IMR_0 0x6e560 +#define _WD_IMR_1 0x6ed60 +#define WD_IMR(tc) _MMIO_WD(tc,\ + _WD_IMR_0,\ + _WD_IMR_1) +#define WD_FRAME_COMPLETE_INT (1 << 7) +#define WD_GTT_FAULT_INT (1 << 6) +#define WD_VBLANK_INT (1 << 5) +#define WD_OVERRUN_INT (1 << 4) +#define WD_CAPTURING_INT (1 << 3) +#define WD_WRITE_COMPLETE_INT (1 << 2) + +#define _WD_IIR_0 0x6e564 +#define _WD_IIR_1 0x6ed64 +#define WD_IIR(tc) _MMIO_WD(tc,\ + _WD_IIR_0,\ + _WD_IIR_1) + +#define _WD_FRAME_STATUS_0 0x6e56b +#define _WD_FRAME_STATUS_1 0x6ed6b +#define WD_FRAME_STATUS(tc) _MMIO_WD(tc,\ + _WD_FRAME_STATUS_0,\ + _WD_FRAME_STATUS_1) + +#define WD_FRAME_COMPLETE (1 << 31) +#define WD_STATE_IDLE (0 << 24) +#define WD_STATE_CAPSTART (1 << 24) +#define WD_STATE_FRAME_START (2 << 24) +#define WD_STATE_CAPACITIVE (3 << 24) +#define WD_STATE_TG_DONE (4 << 24) +#define WD_STATE_WDX_DONE (5 << 24) +#define WD_STATE_QUICK_CAP (6 << 24) + +#define _WD_27_M_0 0x6e524 +#define _WD_27_M_1 0x6ed24 +#define WD_27_M(tc) _MMIO_WD(tc,\ + _WD_27_M_0,\ + _WD_27_M_1) + +#define _WD_27_N_0 0x6e528 + +//Address looks wrong in bspec: +#define _WD_27_N_1 0x6ec28 +#define WD_27_N(tc) _MMIO_WD(tc,\ + _WD_27_N_0,\ + _WD_27_N_1) + +#define _WD_TAIL_CFG_0 0x6e520 +#define _WD_TAIL_CFG_1 0x6ed20 + +#define WD_TAIL_CFG(tc) _MMIO_WD(tc,\ + _WD_TAIL_CFG_0,\ + _WD_TAIL_CFG_1) + #define CLKREQ_POLICY _MMIO(0x101038) #define CLKREQ_POLICY_MEM_UP_OVRD REG_BIT(1) -- 2.37.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH v3 2/2] drm/i915: Enabling WD Transcoder 2022-08-04 8:28 [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback Suraj Kandpal 2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Define WD trancoder for i915 Suraj Kandpal @ 2022-08-04 8:28 ` Suraj Kandpal 2022-08-10 8:56 ` Jani Nikula 2022-08-04 8:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enabling Pipewriteback (rev3) Patchwork ` (3 subsequent siblings) 5 siblings, 1 reply; 8+ messages in thread From: Suraj Kandpal @ 2022-08-04 8:28 UTC (permalink / raw) To: intel-gfx; +Cc: jani.nikula Adding support for writeback transcoder to start capturing frames using interrupt mechanism Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_acpi.c | 1 + drivers/gpu/drm/i915/display/intel_crtc.c | 3 + .../drm/i915/display/intel_crtc_state_dump.c | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 6 + drivers/gpu/drm/i915/display/intel_display.c | 63 +- drivers/gpu/drm/i915/display/intel_display.h | 15 +- .../drm/i915/display/intel_display_debugfs.c | 14 +- .../drm/i915/display/intel_display_types.h | 29 + drivers/gpu/drm/i915/display/intel_dpll.c | 6 + .../drm/i915/display/intel_modeset_setup.c | 67 +- .../drm/i915/display/intel_modeset_verify.c | 18 +- drivers/gpu/drm/i915/display/intel_opregion.c | 3 + .../gpu/drm/i915/display/intel_wb_connector.h | 20 + drivers/gpu/drm/i915/display/intel_wd.c | 733 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_wd.h | 76 ++ drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/i915_irq.c | 8 +- drivers/gpu/drm/i915/i915_pci.c | 7 +- 19 files changed, 1046 insertions(+), 27 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_wb_connector.h create mode 100644 drivers/gpu/drm/i915/display/intel_wd.c create mode 100644 drivers/gpu/drm/i915/display/intel_wd.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 522ef9b4aff3..ec63ed16c250 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -302,6 +302,7 @@ i915-y += \ display/intel_tv.o \ display/intel_vdsc.o \ display/intel_vrr.o \ + display/intel_wd.o \ display/vlv_dsi.o \ display/vlv_dsi_pll.o diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c b/drivers/gpu/drm/i915/display/intel_acpi.c index e78430001f07..ae08db164f73 100644 --- a/drivers/gpu/drm/i915/display/intel_acpi.c +++ b/drivers/gpu/drm/i915/display/intel_acpi.c @@ -247,6 +247,7 @@ static u32 acpi_display_type(struct intel_connector *connector) case DRM_MODE_CONNECTOR_LVDS: case DRM_MODE_CONNECTOR_eDP: case DRM_MODE_CONNECTOR_DSI: + case DRM_MODE_CONNECTOR_WRITEBACK: display_type = ACPI_DISPLAY_TYPE_INTERNAL_DIGITAL; break; case DRM_MODE_CONNECTOR_Unknown: diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index 4442aa355f86..f9fa612ac991 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -512,6 +512,9 @@ void intel_pipe_update_start(struct intel_crtc_state *new_crtc_state) if (min <= 0 || max <= 0) goto irq_disable; + if (new_crtc_state->output_types & BIT(INTEL_OUTPUT_WD)) + goto irq_disable; + if (drm_WARN_ON(&dev_priv->drm, drm_crtc_vblank_get(&crtc->base))) goto irq_disable; diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index e9212f69c360..f49630d95d6a 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -71,6 +71,7 @@ static const char * const output_type_str[] = { OUTPUT_TYPE(DSI), OUTPUT_TYPE(DDI), OUTPUT_TYPE(DP_MST), + OUTPUT_TYPE(WD) }; #undef OUTPUT_TYPE diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index a4c8493f3ce7..1360406ca531 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -1974,6 +1974,12 @@ void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder) */ if (encoder->type == INTEL_OUTPUT_DP_MST) return; + /* + * WD transcoder is a virtual encoder hence sanization + * is not required for it + */ + if (encoder->type == INTEL_OUTPUT_WD) + return; if (!encoder->base.crtc && intel_encoder_is_dp(encoder)) { u8 pipe_mask; diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a0f84cbe974f..90b41b49e1d7 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -116,6 +116,7 @@ #include "intel_sprite.h" #include "intel_tc.h" #include "intel_vga.h" +#include "intel_wd.h" #include "i9xx_plane.h" #include "skl_scaler.h" #include "skl_universal_plane.h" @@ -1507,6 +1508,9 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state) struct intel_encoder *encoder; struct intel_crtc *crtc; + if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) + continue; + if (!intel_connector_needs_modeset(state, connector)) continue; @@ -1536,6 +1540,9 @@ static void intel_encoders_update_complete(struct intel_atomic_state *state) struct intel_encoder *encoder; struct intel_crtc *crtc; + if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) + continue; + if (!intel_connector_needs_modeset(state, connector)) continue; @@ -1550,6 +1557,39 @@ static void intel_encoders_update_complete(struct intel_atomic_state *state) } } +static void intel_queue_writeback_job(struct intel_atomic_state *state, + struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) +{ + struct drm_connector_state *new_conn_state; + struct drm_connector *connector; + struct drm_writeback_connector *wb_conn; + int i; + + for_each_new_connector_in_state(&state->base, connector, new_conn_state, + i) { + if (!new_conn_state->writeback_job) + continue; + + wb_conn = drm_connector_to_writeback(connector); + drm_writeback_queue_job(wb_conn, new_conn_state); + } +} + +static void intel_find_writeback_connector(struct intel_atomic_state *state, + struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) +{ + struct drm_connector_state *new_conn_state; + struct drm_connector *connector; + int i; + + for_each_new_connector_in_state(&state->base, connector, new_conn_state, + i) { + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) + continue; + intel_wd_enable_capture(crtc_state, new_conn_state); + } +} + static void intel_encoders_pre_pll_enable(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -1650,8 +1690,12 @@ static void intel_encoders_post_disable(struct intel_atomic_state *state, int i; for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) { - struct intel_encoder *encoder = - to_intel_encoder(old_conn_state->best_encoder); + struct intel_encoder *encoder; + + if (conn->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) + continue; + + encoder = to_intel_encoder(old_conn_state->best_encoder); if (old_conn_state->crtc != &crtc->base) continue; @@ -1928,7 +1972,8 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, bdw_set_pipemisc(new_crtc_state); if (!intel_crtc_is_bigjoiner_slave(new_crtc_state) && - !transcoder_is_dsi(cpu_transcoder)) + !transcoder_is_dsi(cpu_transcoder) && + !transcoder_is_wd(cpu_transcoder)) hsw_configure_cpu_transcoder(new_crtc_state); crtc->active = true; @@ -7578,6 +7623,10 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) } } + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { + intel_wd_set_vblank_event(crtc, new_crtc_state); + } + intel_encoders_update_prepare(state); intel_dbuf_pre_plane_update(state); @@ -7598,6 +7647,13 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_wait_for_vblank_workers(state); + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { + if (!(new_crtc_state->output_types & BIT(INTEL_OUTPUT_WD))) + continue; + intel_queue_writeback_job(state, crtc, new_crtc_state); + intel_find_writeback_connector(state, crtc, new_crtc_state); + } + /* FIXME: We should call drm_atomic_helper_commit_hw_done() here * already, but still need the state for the delayed optimization. To * fix this: @@ -7968,6 +8024,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) intel_ddi_init(dev_priv, PORT_TC1); intel_ddi_init(dev_priv, PORT_TC2); } else if (DISPLAY_VER(dev_priv) >= 12) { + intel_wd_init(dev_priv, TRANSCODER_WD_0); intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_B); intel_ddi_init(dev_priv, PORT_TC1); diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 4e9f22954a41..b6987f57b032 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -52,6 +52,7 @@ struct intel_crtc_state; struct intel_digital_port; struct intel_dp; struct intel_encoder; +struct intel_connector; struct intel_initial_plane_config; struct intel_load_detect_pipe; struct intel_plane; @@ -157,6 +158,11 @@ static inline bool transcoder_is_dsi(enum transcoder transcoder) return transcoder == TRANSCODER_DSI_A || transcoder == TRANSCODER_DSI_C; } +static inline bool transcoder_is_wd(enum transcoder transcoder) +{ + return transcoder == TRANSCODER_WD_0 || transcoder == TRANSCODER_WD_1; +} + /* * Global legacy plane identifier. Valid only for primary/sprite * planes on pre-g4x, and only for primary planes on g4x-bdw. @@ -469,15 +475,16 @@ enum hpd_pin { for_each_if(intel_encoder_can_psr(intel_encoder)) #define for_each_intel_connector_iter(intel_connector, iter) \ - while ((intel_connector = to_intel_connector(drm_connector_list_iter_next(iter)))) + while ((intel_connector = intel_connector_list_iter_next(iter))) #define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \ list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \ for_each_if((intel_encoder)->base.crtc == (__crtc)) -#define for_each_connector_on_encoder(dev, __encoder, intel_connector) \ - list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \ - for_each_if((intel_connector)->base.encoder == (__encoder)) +#define for_each_connector_on_encoder(dev, __encoder, drm_connector) \ + list_for_each_entry((drm_connector), &(dev)->mode_config.connector_list, head) \ + for_each_if(drm_connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK && \ + (to_intel_connector(drm_connector))->base.encoder == (__encoder)) #define for_each_old_intel_plane_in_state(__state, plane, old_plane_state, __i) \ for ((__i) = 0; \ diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 225b6bfc783c..3e11cc6228d4 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -547,7 +547,7 @@ static void intel_hdmi_info(struct seq_file *m, static void intel_connector_info(struct seq_file *m, struct drm_connector *connector) { - struct intel_connector *intel_connector = to_intel_connector(connector); + struct intel_connector *intel_connector; const struct drm_connector_state *conn_state = connector->state; struct intel_encoder *encoder = to_intel_encoder(conn_state->best_encoder); @@ -570,6 +570,9 @@ static void intel_connector_info(struct seq_file *m, if (!encoder) return; + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) + intel_connector = to_intel_connector(connector); + switch (connector->connector_type) { case DRM_MODE_CONNECTOR_DisplayPort: case DRM_MODE_CONNECTOR_eDP: @@ -587,12 +590,15 @@ static void intel_connector_info(struct seq_file *m, break; } - seq_puts(m, "\tHDCP version: "); - intel_hdcp_info(m, intel_connector); + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) { + seq_puts(m, "\tHDCP version: "); + intel_hdcp_info(m, intel_connector); + } seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); - intel_panel_info(m, intel_connector); + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) + intel_panel_info(m, intel_connector); seq_printf(m, "\tmodes:\n"); list_for_each_entry(mode, &connector->modes, head) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 0e94bd430bcb..289908a88cc3 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -44,6 +44,7 @@ #include <drm/drm_vblank.h> #include <drm/drm_vblank_work.h> #include <drm/i915_mei_hdcp_interface.h> +#include <drm/drm_writeback.h> #include <media/cec-notifier.h> #include "i915_vma.h" @@ -1370,6 +1371,11 @@ struct intel_crtc { bool cpu_fifo_underrun_disabled; bool pch_fifo_underrun_disabled; + struct { + struct drm_pending_vblank_event *e; + atomic_t work_busy; + wait_queue_head_t wd_wait; + } wd; /* per-pipe watermark state */ struct { /* watermarks currently being used */ @@ -1498,6 +1504,7 @@ struct cxsr_latency { #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) #define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, uapi) #define to_intel_connector(x) container_of(x, struct intel_connector, base) +#define to_intel_wb_connector(x) container_of(x, struct intel_wb_connector, base) #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) #define to_intel_plane(x) container_of(x, struct intel_plane, base) @@ -2068,4 +2075,26 @@ to_intel_frontbuffer(struct drm_framebuffer *fb) return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL; } +static inline struct intel_connector * +intel_connector_list_iter_next(struct drm_connector_list_iter *iter) +{ + struct drm_connector *connector; + bool flag = true; + /* + * Skipping connector that are Writeback connector as they will + * not be embedded in intel connector + */ + while (flag) { + connector = drm_connector_list_iter_next(iter); + if (connector && connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) + continue; + + flag = false; + + if (connector) + return to_intel_connector(connector); + + } + return NULL; +} #endif /* __INTEL_DISPLAY_TYPES_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index 5262f16b45ac..82bb8e170197 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -939,6 +939,9 @@ static int hsw_crtc_compute_clock(struct intel_atomic_state *state, struct intel_encoder *encoder = intel_get_crtc_new_encoder(state, crtc_state); + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_WD)) + return 0; + if (DISPLAY_VER(dev_priv) < 11 && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) return 0; @@ -955,6 +958,9 @@ static int hsw_crtc_get_shared_dpll(struct intel_atomic_state *state, struct intel_encoder *encoder = intel_get_crtc_new_encoder(state, crtc_state); + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_WD)) + return 0; + if (DISPLAY_VER(dev_priv) < 11 && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) return 0; diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index f0e04d3904c6..f6c85614842a 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -23,6 +23,7 @@ #include "intel_modeset_setup.h" #include "intel_pch_display.h" #include "intel_pm.h" +#include "intel_wd.h" static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, struct drm_modeset_acquire_ctx *ctx) @@ -110,17 +111,17 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, static void intel_modeset_update_connector_atomic_state(struct drm_i915_private *i915) { - struct intel_connector *connector; + struct drm_connector *drm_conn; struct drm_connector_list_iter conn_iter; drm_connector_list_iter_begin(&i915->drm, &conn_iter); - for_each_intel_connector_iter(connector, &conn_iter) { - struct drm_connector_state *conn_state = connector->base.state; + drm_for_each_connector_iter(drm_conn, &conn_iter) { + struct drm_connector_state *conn_state = drm_conn->state; struct intel_encoder *encoder = - to_intel_encoder(connector->base.encoder); + to_intel_encoder(drm_conn->encoder); if (conn_state->crtc) - drm_connector_put(&connector->base); + drm_connector_put(drm_conn); if (encoder) { struct intel_crtc *crtc = @@ -132,7 +133,7 @@ static void intel_modeset_update_connector_atomic_state(struct drm_i915_private conn_state->crtc = &crtc->base; conn_state->max_bpc = (crtc_state->pipe_bpp ?: 24) / 3; - drm_connector_get(&connector->base); + drm_connector_get(drm_conn); } else { conn_state->best_encoder = NULL; conn_state->crtc = NULL; @@ -205,10 +206,10 @@ static bool intel_crtc_has_encoders(struct intel_crtc *crtc) static struct intel_connector *intel_encoder_find_connector(struct intel_encoder *encoder) { struct drm_device *dev = encoder->base.dev; - struct intel_connector *connector; + struct drm_connector *drm_connector; - for_each_connector_on_encoder(dev, &encoder->base, connector) - return connector; + for_each_connector_on_encoder(dev, &encoder->base, drm_connector) + return to_intel_connector(drm_connector); return NULL; } @@ -422,6 +423,8 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) struct intel_crtc *crtc; struct intel_encoder *encoder; struct intel_connector *connector; + struct drm_connector *drm_conn; + struct drm_encoder *drm_enc; struct drm_connector_list_iter conn_iter; u8 active_pipes = 0; @@ -503,8 +506,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) struct intel_crtc_state *crtc_state; struct intel_crtc *crtc; - connector->base.dpms = DRM_MODE_DPMS_ON; - + connector->base.dpms = DRM_MODE_DPMS_OFF; encoder = intel_attached_encoder(connector); connector->base.encoder = &encoder->base; @@ -533,6 +535,49 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) } drm_connector_list_iter_end(&conn_iter); + drm_connector_list_iter_begin(&i915->drm, &conn_iter); + drm_for_each_connector_iter(drm_conn, &conn_iter) { + if (drm_conn->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) { + struct intel_crtc_state *crtc_state; + struct drm_writeback_connector *wb_conn = + drm_connector_to_writeback(drm_conn); + struct intel_wd *intel_wd = wb_conn_to_intel_wd(wb_conn); + struct intel_crtc *crtc; + + pipe = 0; + drm_enc = &intel_wd->base.base; + drm_conn->encoder = drm_enc; + encoder = to_intel_encoder(drm_enc); + if (encoder->get_hw_state(encoder, &pipe)) { + drm_conn->dpms = DRM_MODE_DPMS_ON; + + crtc = to_intel_crtc(drm_enc->crtc); + crtc_state = crtc ? to_intel_crtc_state(crtc->base.state) : NULL; + + if (crtc_state && crtc_state->hw.active) { + /* + * This has to be done during hardware readout + * because anything calling .crtc_disable may + * rely on the connector_mask being accurate. + */ + crtc_state->uapi.connector_mask |= + drm_connector_mask(&connector->base); + crtc_state->uapi.encoder_mask |= + drm_encoder_mask(&encoder->base); + } + } else { + drm_conn->dpms = DRM_MODE_DPMS_OFF; + drm_conn->encoder = NULL; + } + drm_dbg_kms(&i915->drm, + "[CONNECTOR:%d:%s] hw state readout: %s\n", + drm_conn->base.id, drm_conn->name, + str_enabled_disabled(drm_conn->encoder)); + } + } + drm_connector_list_iter_end(&conn_iter); + + for_each_intel_crtc(&i915->drm, crtc) { struct intel_bw_state *bw_state = to_intel_bw_state(i915->bw_obj.state); diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index a91586d77cb6..4a3d04f14ef7 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -25,11 +25,17 @@ static void intel_connector_verify_state(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) { - struct intel_connector *connector = to_intel_connector(conn_state->connector); - struct drm_i915_private *i915 = to_i915(connector->base.dev); + struct drm_connector *drm_conn = conn_state->connector; + struct intel_connector *connector; + struct drm_i915_private *i915 = to_i915(drm_conn->dev); drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n", - connector->base.base.id, connector->base.name); + drm_conn->base.id, drm_conn->name); + + if (drm_conn->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) + return; + + connector = to_intel_connector(drm_conn); if (connector->get_hw_state(connector)) { struct intel_encoder *encoder = intel_attached_encoder(connector); @@ -119,6 +125,9 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat encoder->base.base.id, encoder->base.name); + if (encoder->type == INTEL_OUTPUT_WD) + continue; + for_each_oldnew_connector_in_state(&state->base, connector, old_conn_state, new_conn_state, i) { if (old_conn_state->best_encoder == &encoder->base) @@ -177,6 +186,9 @@ verify_crtc_state(struct intel_crtc *crtc, intel_crtc_get_pipe_config(pipe_config); + if (new_crtc_state->output_types & BIT(INTEL_OUTPUT_WD)) + return; + /* we keep both pipes enabled on 830 */ if (IS_I830(dev_priv) && pipe_config->hw.active) pipe_config->hw.active = new_crtc_state->hw.active; diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index 1c0c745c142d..73a5a12e2c48 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -374,6 +374,9 @@ int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, if (ret) return ret; + if (intel_encoder->type == INTEL_OUTPUT_WD) + return 0; + if (intel_encoder->type == INTEL_OUTPUT_DSI) port = 0; else diff --git a/drivers/gpu/drm/i915/display/intel_wb_connector.h b/drivers/gpu/drm/i915/display/intel_wb_connector.h new file mode 100644 index 000000000000..8063a9273bc7 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_wb_connector.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2020 Intel Corporation + */ + +#ifndef __INTEL_WB_CONNECTOR_H__ +#define __INTEL_WB_CONNECTOR_H__ + +#include "intel_display.h" + +struct intel_wb_connector *intel_wb_connector_alloc(void); +void intel_wb_connector_free(struct intel_wb_connector *connector); +void intel_wb_connector_destroy(struct drm_connector *connector); +bool intel_wb_connector_get_hw_state(struct intel_wb_connector *connector); +enum pipe intel_wb_connector_get_pipe(struct intel_wb_connector *connector); +void intel_wb_connector_attach_encoder(struct intel_wb_connector *connector, + struct intel_encoder *encoder); + +#endif /* __INTEL_WB_CONNECTOR_H__ */ + diff --git a/drivers/gpu/drm/i915/display/intel_wd.c b/drivers/gpu/drm/i915/display/intel_wd.c new file mode 100644 index 000000000000..7c9c83038de1 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_wd.c @@ -0,0 +1,733 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright © 2021 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Suraj Kandpal <suraj.kandpal@intel.com> + * Arun Murthy <arun.r.murthy@intel.com> + * + */ + +#include <drm/drm_atomic_helper.h> +#include <drm/drm_fourcc.h> + +#include "intel_atomic.h" +#include "intel_connector.h" +#include "intel_wd.h" +#include "intel_fb_pin.h" +#include "intel_de.h" + +enum { + WD_CAPTURE_4_PIX, + WD_CAPTURE_2_PIX, +} wd_capture_format; + +static struct drm_writeback_job +*intel_get_writeback_job_from_queue(struct intel_wd *intel_wd) +{ + struct drm_writeback_job *job; + struct drm_i915_private *dev_priv = to_i915(intel_wd->base.base.dev); + struct drm_writeback_connector *wb_conn = + &intel_wd->wb_conn; + unsigned long flags; + + spin_lock_irqsave(&wb_conn->job_lock, flags); + job = list_first_entry_or_null(&wb_conn->job_queue, + struct drm_writeback_job, + list_entry); + spin_unlock_irqrestore(&wb_conn->job_lock, flags); + if (job == NULL) { + drm_dbg_kms(&dev_priv->drm, "job queue is empty\n"); + return NULL; + } + + return job; +} + +/*Check with Spec*/ +static const u32 wb_fmts[] = { + DRM_FORMAT_YUV444, + DRM_FORMAT_XYUV8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_Y410, + DRM_FORMAT_YUV422, + DRM_FORMAT_XBGR2101010, + DRM_FORMAT_RGB565, + +}; + +static int intel_wd_get_format(int pixel_format) +{ + int wd_format = -EINVAL; + + switch (pixel_format) { + case DRM_FORMAT_XBGR8888: + case DRM_FORMAT_XRGB8888: + case DRM_FORMAT_XBGR2101010: + case DRM_FORMAT_XYUV8888: + case DRM_FORMAT_YUV444: + wd_format = WD_CAPTURE_4_PIX; + break; + case DRM_FORMAT_YUV422: + case DRM_FORMAT_RGB565: + wd_format = WD_CAPTURE_2_PIX; + break; + default: + DRM_ERROR("unsupported pixel format %x!\n", + pixel_format); + } + + return wd_format; +} + +static int intel_wd_verify_pix_format(int format) +{ + const struct drm_format_info *info = drm_format_info(format); + int pix_format = info->format; + int i = 0; + + for (i = 0; i < ARRAY_SIZE(wb_fmts); i++) + if (pix_format == wb_fmts[i]) + return 0; + + return 1; +} + +static u32 intel_wd_get_stride(const struct intel_crtc_state *crtc_state, + int format) +{ + const struct drm_format_info *info = drm_format_info(format); + int wd_format; + int hactive, pixel_size; + + wd_format = intel_wd_get_format(info->format); + + switch (wd_format) { + case WD_CAPTURE_4_PIX: + pixel_size = 4; + break; + case WD_CAPTURE_2_PIX: + pixel_size = 2; + break; + default: + pixel_size = 1; + break; + } + + hactive = crtc_state->hw.adjusted_mode.crtc_hdisplay; + + return DIV_ROUND_UP(hactive * pixel_size, 64); +} + +static int intel_wd_pin_fb(struct intel_wd *intel_wd, + struct drm_framebuffer *fb) +{ + const struct i915_ggtt_view view = { + .type = I915_GGTT_VIEW_NORMAL, + }; + struct i915_vma *vma; + + vma = intel_pin_and_fence_fb_obj(fb, false, &view, false, + &intel_wd->flags); + + if (IS_ERR(vma)) + return PTR_ERR(vma); + + intel_wd->vma = vma; + return 0; +} + +static void intel_configure_slicing_strategy(struct drm_i915_private *dev_priv, + struct intel_wd *intel_wd, u32 *tmp) +{ + *tmp &= ~WD_STRAT_MASK; + if (intel_wd->slicing_strategy == 1) + *tmp |= WD_SLICING_STRAT_1_1; + else if (intel_wd->slicing_strategy == 2) + *tmp |= WD_SLICING_STRAT_2_1; + else if (intel_wd->slicing_strategy == 3) + *tmp |= WD_SLICING_STRAT_4_1; + else if (intel_wd->slicing_strategy == 4) + *tmp |= WD_SLICING_STRAT_8_1; + + intel_de_write(dev_priv, WD_STREAMCAP_CTL(intel_wd->trans), + *tmp); + +} + +static enum drm_mode_status +intel_wd_mode_valid(struct drm_connector *connector, + struct drm_display_mode *mode) +{ + drm_dbg_kms(connector->dev, ":"); + return MODE_OK; +} + +static int intel_wd_get_modes(struct drm_connector *connector) +{ + return 0; +} + +static void intel_wd_get_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config) +{ + struct intel_crtc *intel_crtc = + to_intel_crtc(pipe_config->uapi.crtc); + + if (intel_crtc) { + memcpy(pipe_config, intel_crtc->config, + sizeof(*pipe_config)); + pipe_config->output_types |= BIT(INTEL_OUTPUT_WD); + } + +} + +static int intel_wd_compute_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state) +{ + struct intel_wd *intel_wd = enc_to_intel_wd(encoder); + struct drm_writeback_job *job; + + job = intel_get_writeback_job_from_queue(intel_wd); + if (job || conn_state->writeback_job) { + intel_wd->wd_crtc = to_intel_crtc(pipe_config->uapi.crtc); + return 0; + } + + return 0; +} + +static void intel_wd_get_power_domains(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_wd *intel_wd = enc_to_intel_wd(encoder); + intel_wakeref_t wakeref; + + wakeref = intel_display_power_get(dev_priv, + encoder->power_domain); + + intel_wd->io_wakeref[0] = wakeref; +} + +static bool intel_wd_get_hw_state(struct intel_encoder *encoder, + enum pipe *pipe) +{ + bool ret = false; + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_wd *intel_wd = enc_to_intel_wd(encoder); + struct intel_crtc *wd_crtc = intel_wd->wd_crtc; + intel_wakeref_t wakeref; + u32 tmp; + + if (wd_crtc) + return false; + + wakeref = intel_display_power_get_if_enabled(dev_priv, + encoder->power_domain); + + if (!wakeref) + goto out; + + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); + ret = tmp & WD_TRANS_ACTIVE; + + if (ret) { + *pipe = wd_crtc->pipe; + return true; + } + +out: + intel_display_power_put(dev_priv, encoder->power_domain, wakeref); + return false; + +} + +static int intel_wd_encoder_atomic_check(struct drm_encoder *encoder, + struct drm_crtc_state *crtc_st, + struct drm_connector_state *conn_st) +{ + /* Check for the format and buffers and property validity */ + struct drm_framebuffer *fb; + struct drm_writeback_job *job = conn_st->writeback_job; + struct drm_i915_private *dev_priv = to_i915(encoder->dev); + const struct drm_display_mode *mode = &crtc_st->mode; + int ret; + + drm_dbg_kms(&dev_priv->drm, "\n"); + + if (!job) { + drm_dbg_kms(&dev_priv->drm, "No writeback job created returning\n"); + return -EINVAL; + } + + fb = job->fb; + + if (!fb) { + drm_dbg_kms(&dev_priv->drm, "Invalid framebuffer\n"); + return -EINVAL; + } + + if (fb->width != mode->hdisplay || fb->height != mode->vdisplay) { + drm_dbg_kms(&dev_priv->drm, "Invalid framebuffer size %ux%u\n", + fb->width, fb->height); + return -EINVAL; + } + + ret = intel_wd_verify_pix_format(fb->format->format); + + if (ret) { + drm_dbg_kms(&dev_priv->drm, "Unsupported framebuffer format %08x\n", + fb->format->format); + return -EINVAL; + } + + return 0; +} + + +static const struct drm_encoder_helper_funcs wd_encoder_helper_funcs = { + .atomic_check = intel_wd_encoder_atomic_check, +}; + +static void intel_wd_connector_destroy(struct drm_connector *connector) +{ + drm_dbg_kms(connector->dev, "\n"); + drm_connector_cleanup(connector); + kfree(connector); +} + +static enum drm_connector_status +intel_wb_connector_detect(struct drm_connector *connector, bool force) +{ + return connector_status_connected; +} + +static const struct drm_connector_funcs wd_connector_funcs = { + .detect = intel_wb_connector_detect, + .reset = drm_atomic_helper_connector_reset, + .destroy = intel_wd_connector_destroy, + .fill_modes = drm_helper_probe_single_connector_modes, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, +}; + +static const struct drm_connector_helper_funcs wd_connector_helper_funcs = { + .get_modes = intel_wd_get_modes, + .mode_valid = intel_wd_mode_valid, +}; + +static const struct drm_encoder_funcs drm_writeback_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +static bool intel_fastset_dis(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config) +{ + pipe_config->uapi.mode_changed = true; + return false; +} + +static void intel_wd_connector_init(struct intel_wd *intel_wd) +{ + drm_atomic_helper_connector_reset(&intel_wd->wb_conn.base); +} + +void intel_wd_init(struct drm_i915_private *dev_priv, enum transcoder trans) +{ + struct intel_wd *intel_wd; + struct intel_encoder *encoder; + struct drm_writeback_connector *wb_conn; + int n_formats = ARRAY_SIZE(wb_fmts); + struct drm_encoder *drm_enc; + int err, ret; + + intel_wd = kzalloc(sizeof(*intel_wd), GFP_KERNEL); + + if (!intel_wd) + return; + + intel_wd_connector_init(intel_wd); + encoder = &intel_wd->base; + drm_enc = &encoder->base; + wb_conn = &intel_wd->wb_conn; + intel_wd->trans = trans; + intel_wd->triggered_cap_mode = 1; + intel_wd->frame_num = 1; + intel_wd->slicing_strategy = 1; + encoder->get_config = intel_wd_get_config; + encoder->compute_config = intel_wd_compute_config; + encoder->get_hw_state = intel_wd_get_hw_state; + encoder->type = INTEL_OUTPUT_WD; + encoder->cloneable = 0; + encoder->pipe_mask = BIT(PIPE_B); + encoder->power_domain = POWER_DOMAIN_TRANSCODER_B; + encoder->get_power_domains = intel_wd_get_power_domains; + encoder->initial_fastset_check = intel_fastset_dis; + + drm_encoder_helper_add(drm_enc, + &wd_encoder_helper_funcs); + + drm_enc->possible_crtcs = BIT(PIPE_B); + + ret = drm_encoder_init(&dev_priv->drm, drm_enc, + &drm_writeback_encoder_funcs, + DRM_MODE_ENCODER_VIRTUAL, NULL); + + if (ret) { + drm_dbg_kms(&dev_priv->drm, + "Writeback drm_encoder init Failed: %d\n", + ret); + goto cleanup; + } + + err = drm_writeback_connector_init_with_encoder(&dev_priv->drm, + wb_conn, drm_enc, &wd_connector_funcs, + wb_fmts, n_formats); + + if (err != 0) { + drm_dbg_kms(&dev_priv->drm, + "drm_writeback_connector_init: Failed: %d\n", + err); + goto cleanup; + } + + wb_conn->base.encoder = drm_enc; + drm_connector_helper_add(&wb_conn->base, &wd_connector_helper_funcs); + wb_conn->base.status = connector_status_connected; + return; + +cleanup: + kfree(intel_wd); + return; +} + +static void intel_wd_writeback_complete(struct intel_wd *intel_wd, + struct drm_writeback_job *job, int status) +{ + struct drm_writeback_connector *wb_conn = + &intel_wd->wb_conn; + drm_writeback_signal_completion(wb_conn, status); +} + +static int intel_wd_setup_transcoder(struct intel_wd *intel_wd, + struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state, + struct drm_writeback_job *job) +{ + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); + enum pipe pipe = intel_crtc->pipe; + struct drm_framebuffer *fb; + struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); + struct drm_gem_object *wd_fb_obj; + int ret; + u32 stride, tmp; + u16 hactive, vactive; + + fb = job->fb; + wd_fb_obj = fb->obj[0]; + if (!wd_fb_obj) { + drm_dbg_kms(&dev_priv->drm, "No framebuffer gem object created\n"); + return -1; + } + ret = intel_wd_pin_fb(intel_wd, fb); + drm_WARN_ON(&dev_priv->drm, ret != 0); + + /*Write stride and surface registers in that particular order*/ + stride = intel_wd_get_stride(pipe_config, fb->format->format); + + tmp = intel_de_read(dev_priv, WD_STRIDE(intel_wd->trans)); + tmp &= ~WD_STRIDE_MASK; + tmp |= (stride << WD_STRIDE_SHIFT); + + intel_de_write(dev_priv, WD_STRIDE(intel_wd->trans), tmp); + + tmp = intel_de_read(dev_priv, WD_SURF(intel_wd->trans)); + + intel_de_write(dev_priv, WD_SURF(intel_wd->trans), + i915_ggtt_offset(intel_wd->vma)); + + tmp = intel_de_read_fw(dev_priv, WD_IIR(intel_wd->trans)); + intel_de_write_fw(dev_priv, WD_IIR(intel_wd->trans), tmp); + + tmp = ~(WD_GTT_FAULT_INT|WD_WRITE_COMPLETE_INT|WD_FRAME_COMPLETE_INT| + WD_VBLANK_INT|WD_OVERRUN_INT|WD_CAPTURING_INT); + intel_de_write_fw(dev_priv, WD_IMR(intel_wd->trans), tmp); + + if (intel_wd->stream_cap) { + tmp = intel_de_read(dev_priv, + WD_STREAMCAP_CTL(intel_wd->trans)); + tmp |= WD_STREAM_CAP_MODE_EN; + intel_configure_slicing_strategy(dev_priv, intel_wd, &tmp); + } + + hactive = pipe_config->uapi.mode.hdisplay; + vactive = pipe_config->uapi.mode.vdisplay; + tmp = intel_de_read(dev_priv, HTOTAL(intel_wd->trans)); + tmp = intel_de_read(dev_priv, VTOTAL(intel_wd->trans)); + + /* minimum hactive as per bspec: 64 pixels*/ + if (hactive < 64) + drm_err(&dev_priv->drm, "hactive is less then 64 pixels\n"); + + intel_de_write(dev_priv, HTOTAL(intel_wd->trans), hactive - 1); + intel_de_write(dev_priv, VTOTAL(intel_wd->trans), vactive - 1); + + tmp = intel_de_read(dev_priv, WD_TRANS_FUNC_CTL(intel_wd->trans)); + /* select pixel format */ + tmp &= ~WD_PIX_FMT_MASK; + + switch (fb->format->format) { + default: + fallthrough; + case DRM_FORMAT_YUYV: + tmp |= WD_PIX_FMT_YUYV; + break; + case DRM_FORMAT_XYUV8888: + tmp |= WD_PIX_FMT_XYUV8888; + break; + case DRM_FORMAT_XBGR8888: + case DRM_FORMAT_XRGB8888: + tmp |= WD_PIX_FMT_XBGR8888; + break; + case DRM_FORMAT_Y410: + tmp |= WD_PIX_FMT_Y410; + break; + case DRM_FORMAT_YUV422: + tmp |= WD_PIX_FMT_YUV422; + break; + case DRM_FORMAT_XBGR2101010: + tmp |= WD_PIX_FMT_XBGR2101010; + break; + case DRM_FORMAT_RGB565: + tmp |= WD_PIX_FMT_RGB565; + break; + } + + if (intel_wd->triggered_cap_mode) + tmp |= WD_TRIGGERED_CAP_MODE_ENABLE; + + if (intel_wd->stream_cap) + tmp |= WD_CTL_POINTER_DTDH; + + /*select input pipe*/ + tmp &= ~WD_INPUT_SELECT_MASK; + switch (pipe) { + default: + fallthrough; + case PIPE_A: + tmp |= WD_INPUT_PIPE_A; + break; + case PIPE_B: + tmp |= WD_INPUT_PIPE_B; + break; + case PIPE_C: + tmp |= WD_INPUT_PIPE_C; + break; + case PIPE_D: + tmp |= WD_INPUT_PIPE_D; + break; + } + + /* enable DDI buffer */ + if (!(tmp & TRANS_WD_FUNC_ENABLE)) + tmp |= TRANS_WD_FUNC_ENABLE; + + intel_de_write(dev_priv, WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); + + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); + ret = tmp & WD_TRANS_ACTIVE; + + if (!ret) { + /*enable the transcoder */ + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); + tmp |= WD_TRANS_ENABLE; + intel_de_write(dev_priv, PIPECONF(intel_wd->trans), tmp); + + /* wait for transcoder to be enabled */ + if (intel_de_wait_for_set(dev_priv, PIPECONF(intel_wd->trans), + WD_TRANS_ACTIVE, 10)) + drm_err(&dev_priv->drm, "WD transcoder could not be enabled\n"); + } + + return 0; +} + +static void intel_wd_disable_capture(struct intel_wd *intel_wd) +{ + struct drm_i915_private *dev_priv = to_i915(intel_wd->base.base.dev); + u32 tmp; + + intel_de_write_fw(dev_priv, WD_IMR(intel_wd->trans), 0xFF); + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); + tmp &= WD_TRANS_DISABLE; + intel_de_write(dev_priv, PIPECONF(intel_wd->trans), tmp); + tmp = intel_de_read(dev_priv, WD_TRANS_FUNC_CTL(intel_wd->trans)); + tmp |= ~TRANS_WD_FUNC_ENABLE; +} + +static int intel_wd_capture(struct intel_wd *intel_wd, + struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state, + struct drm_writeback_job *job) +{ + u32 tmp; + struct drm_i915_private *dev_priv = to_i915(intel_wd->base.base.dev); + int ret = 0, status = 0; + struct intel_crtc *wd_crtc = intel_wd->wd_crtc; + unsigned long flags; + + if (!job->out_fence) + drm_dbg_kms(&dev_priv->drm, "Not able to get out_fence for job\n"); + + ret = intel_wd_setup_transcoder(intel_wd, pipe_config, + conn_state, job); + + if (ret < 0) { + drm_dbg_kms(&dev_priv->drm, + "WD transcoder setup not completed aborting capture\n"); + return -1; + } + + if (wd_crtc == NULL) { + DRM_ERROR("CRTC not attached\n"); + return -1; + } + + tmp = intel_de_read_fw(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans)); + tmp |= START_TRIGGER_FRAME; + tmp &= ~WD_FRAME_NUMBER_MASK; + tmp |= intel_wd->frame_num; + intel_de_write_fw(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); + + if (!intel_de_wait_for_set(dev_priv, WD_IIR(intel_wd->trans), + WD_FRAME_COMPLETE_INT, 100)){ + drm_dbg_kms(&dev_priv->drm, "frame captured\n"); + status = 0; + } else { + drm_dbg_kms(&dev_priv->drm, "frame not captured triggering stop frame\n"); + tmp = intel_de_read(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans)); + tmp |= STOP_TRIGGER_FRAME; + intel_de_write(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); + status = -1; + } + + intel_de_write(dev_priv, WD_IIR(intel_wd->trans), tmp); + intel_wd_writeback_complete(intel_wd, job, status); + if (intel_get_writeback_job_from_queue(intel_wd) == NULL) + intel_wd_disable_capture(intel_wd); + if (wd_crtc->wd.e) { + spin_lock_irqsave(&dev_priv->drm.event_lock, flags); + drm_dbg_kms(&dev_priv->drm, "send %p\n", wd_crtc->wd.e); + drm_crtc_send_vblank_event(&wd_crtc->base, + wd_crtc->wd.e); + spin_unlock_irqrestore(&dev_priv->drm.event_lock, flags); + wd_crtc->wd.e = NULL; + } else { + DRM_ERROR("Event NULL! %p, %p\n", &dev_priv->drm, + wd_crtc); + } + return 0; + +} + +void intel_wd_enable_capture(struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state) +{ + struct drm_i915_private *i915 = + to_i915(conn_state->connector->dev); + struct drm_writeback_connector *wb_conn = + drm_connector_to_writeback(conn_state->connector); + struct intel_wd *intel_wd = wb_conn_to_intel_wd(wb_conn); + struct drm_writeback_job *job; + + job = intel_get_writeback_job_from_queue(intel_wd); + if (job == NULL) { + drm_dbg_kms(&i915->drm, + "job queue is empty not capturing any frame\n"); + return; + } + + intel_wd_capture(intel_wd, pipe_config, + conn_state, job); + intel_wd->frame_num += 1; + +} + +void intel_wd_set_vblank_event(struct intel_crtc *intel_crtc, + struct intel_crtc_state *intel_crtc_state) +{ + struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); + struct drm_crtc_state *state = &intel_crtc_state->uapi; + struct intel_encoder *encoder; + struct intel_wd *intel_wd; + + for_each_intel_encoder(&dev_priv->drm, encoder) { + + if (encoder->type != INTEL_OUTPUT_WD) + continue; + + intel_wd = enc_to_intel_wd(encoder); + + if (!intel_wd->wd_crtc) + return; + } + + if (intel_crtc == intel_wd->wd_crtc) { + intel_crtc->wd.e = state->event; + state->event = NULL; + } +} +void intel_wd_handle_isr(struct drm_i915_private *dev_priv) +{ + u32 iir_value = 0; + struct intel_encoder *encoder; + struct intel_wd *intel_wd; + + iir_value = intel_de_read(dev_priv, WD_IIR(TRANSCODER_WD_0)); + drm_dbg_kms(&dev_priv->drm, "\n"); + + for_each_intel_encoder(&dev_priv->drm, encoder) { + + if (encoder->type == INTEL_OUTPUT_WD) + continue; + + intel_wd = enc_to_intel_wd(encoder); + + if (!intel_wd->wd_crtc) { + DRM_ERROR("NO CRTC attached with WD\n"); + goto clear_iir; + } + } + + if (iir_value & WD_FRAME_COMPLETE_INT) + return; + +clear_iir: + intel_de_write(dev_priv, WD_IIR(TRANSCODER_WD_0), iir_value); +} diff --git a/drivers/gpu/drm/i915/display/intel_wd.h b/drivers/gpu/drm/i915/display/intel_wd.h new file mode 100644 index 000000000000..f16b9b2d78d8 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_wd.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0 + * Copyright © 2021 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Author : + * Suraj Kandpal<suraj.kandpal@intel.com> + * Arun Murthy<arun.r.murthy@intel.com> + */ + +#ifndef _INTEL_WD_H +#define _INTEL_WD_H + +#include <drm/drm_crtc.h> + +#include "intel_display_types.h" + +#define I915_MAX_WD_TANSCODERS 2 + +struct intel_wd { + struct intel_encoder base; + struct drm_writeback_connector wb_conn; + struct intel_crtc *wd_crtc; + intel_wakeref_t io_wakeref[I915_MAX_WD_TANSCODERS]; + //struct intel_connector *attached_connector; + enum transcoder trans; + struct i915_vma *vma; + unsigned long flags; + struct drm_writeback_job *job; + int triggered_cap_mode; + int frame_num; + bool stream_cap; + bool start_capture; + int slicing_strategy; +}; + +struct intel_wd_clk_vals { + u32 cdclk; + u16 link_m; + u16 link_n; +}; + +static inline struct intel_wd *enc_to_intel_wd(struct intel_encoder *encoder) +{ + return container_of(&encoder->base, struct intel_wd, base.base); +} + +static inline struct intel_wd *wb_conn_to_intel_wd(struct drm_writeback_connector *wb_conn) +{ + return container_of(wb_conn, struct intel_wd, wb_conn); +} + +void intel_wd_init(struct drm_i915_private *dev_priv, enum transcoder trans); +void intel_wd_enable_capture(struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state); +void intel_wd_handle_isr(struct drm_i915_private *dev_priv); +void intel_wd_set_vblank_event(struct intel_crtc *crtc, + struct intel_crtc_state *state); +#endif/* _INTEL_WD_H */ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d25647be25d1..30dc97785392 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -35,6 +35,8 @@ #include <linux/pm_qos.h> #include <drm/drm_connector.h> +#include <drm/drm_writeback.h> +#include <drm/i915_mei_hdcp_interface.h> #include <drm/ttm/ttm_device.h> #include "display/intel_cdclk.h" diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 73cebc6aa650..95a6a8f7a911 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -42,6 +42,7 @@ #include "display/intel_hotplug.h" #include "display/intel_lpe_audio.h" #include "display/intel_psr.h" +#include "display/intel_wd.h" #include "gt/intel_breadcrumbs.h" #include "gt/intel_gt.h" @@ -2342,6 +2343,11 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) found = true; } + if (iir & GEN8_DE_MISC_WD0) { + intel_wd_handle_isr(dev_priv); + found = true; + } + if (iir & GEN8_DE_EDP_PSR) { struct intel_encoder *encoder; u32 psr_iir; @@ -3767,7 +3773,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) u32 de_pipe_enables; u32 de_port_masked = gen8_de_port_aux_mask(dev_priv); u32 de_port_enables; - u32 de_misc_masked = GEN8_DE_EDP_PSR; + u32 de_misc_masked = GEN8_DE_EDP_PSR | GEN8_DE_MISC_WD0; u32 trans_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C) | BIT(TRANSCODER_D); enum pipe pipe; diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index aacc10f2e73f..bf4f1a7968c5 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -864,7 +864,8 @@ static const struct intel_device_info jsl_info = { .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \ .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \ BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \ - BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \ + BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1)| \ + BIT(TRANSCODER_WD_0), \ .display.pipe_offsets = { \ [TRANSCODER_A] = PIPE_A_OFFSET, \ [TRANSCODER_B] = PIPE_B_OFFSET, \ @@ -872,6 +873,8 @@ static const struct intel_device_info jsl_info = { [TRANSCODER_D] = PIPE_D_OFFSET, \ [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \ [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \ + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \ + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \ }, \ .display.trans_offsets = { \ [TRANSCODER_A] = TRANSCODER_A_OFFSET, \ @@ -880,6 +883,8 @@ static const struct intel_device_info jsl_info = { [TRANSCODER_D] = TRANSCODER_D_OFFSET, \ [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \ [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \ + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \ + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \ }, \ TGL_CURSOR_OFFSETS, \ .has_global_mocs = 1, \ -- 2.37.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Enabling WD Transcoder 2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 2/2] drm/i915: Enabling WD Transcoder Suraj Kandpal @ 2022-08-10 8:56 ` Jani Nikula 0 siblings, 0 replies; 8+ messages in thread From: Jani Nikula @ 2022-08-10 8:56 UTC (permalink / raw) To: Suraj Kandpal, intel-gfx On Thu, 04 Aug 2022, Suraj Kandpal <suraj.kandpal@intel.com> wrote: > Adding support for writeback transcoder to start capturing frames using > interrupt mechanism Basically this changes the assumption that all drm_connectors in i915 are embedded within intel_connectors. That needs to be a separate prep patch, actually several patches, without the actual writeback implementation. Some random comments inline. It's not so much about the writeback implementation details, but about the overall stuff, with a bunch of nitpicking about other details. BR, Jani. > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/display/intel_acpi.c | 1 + > drivers/gpu/drm/i915/display/intel_crtc.c | 3 + > .../drm/i915/display/intel_crtc_state_dump.c | 1 + > drivers/gpu/drm/i915/display/intel_ddi.c | 6 + > drivers/gpu/drm/i915/display/intel_display.c | 63 +- > drivers/gpu/drm/i915/display/intel_display.h | 15 +- > .../drm/i915/display/intel_display_debugfs.c | 14 +- > .../drm/i915/display/intel_display_types.h | 29 + > drivers/gpu/drm/i915/display/intel_dpll.c | 6 + > .../drm/i915/display/intel_modeset_setup.c | 67 +- > .../drm/i915/display/intel_modeset_verify.c | 18 +- > drivers/gpu/drm/i915/display/intel_opregion.c | 3 + > .../gpu/drm/i915/display/intel_wb_connector.h | 20 + > drivers/gpu/drm/i915/display/intel_wd.c | 733 ++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_wd.h | 76 ++ > drivers/gpu/drm/i915/i915_drv.h | 2 + > drivers/gpu/drm/i915/i915_irq.c | 8 +- > drivers/gpu/drm/i915/i915_pci.c | 7 +- > 19 files changed, 1046 insertions(+), 27 deletions(-) > create mode 100644 drivers/gpu/drm/i915/display/intel_wb_connector.h > create mode 100644 drivers/gpu/drm/i915/display/intel_wd.c > create mode 100644 drivers/gpu/drm/i915/display/intel_wd.h > > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile > index 522ef9b4aff3..ec63ed16c250 100644 > --- a/drivers/gpu/drm/i915/Makefile > +++ b/drivers/gpu/drm/i915/Makefile > @@ -302,6 +302,7 @@ i915-y += \ > display/intel_tv.o \ > display/intel_vdsc.o \ > display/intel_vrr.o \ > + display/intel_wd.o \ > display/vlv_dsi.o \ > display/vlv_dsi_pll.o > > diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c b/drivers/gpu/drm/i915/display/intel_acpi.c > index e78430001f07..ae08db164f73 100644 > --- a/drivers/gpu/drm/i915/display/intel_acpi.c > +++ b/drivers/gpu/drm/i915/display/intel_acpi.c > @@ -247,6 +247,7 @@ static u32 acpi_display_type(struct intel_connector *connector) > case DRM_MODE_CONNECTOR_LVDS: > case DRM_MODE_CONNECTOR_eDP: > case DRM_MODE_CONNECTOR_DSI: > + case DRM_MODE_CONNECTOR_WRITEBACK: > display_type = ACPI_DISPLAY_TYPE_INTERNAL_DIGITAL; > break; > case DRM_MODE_CONNECTOR_Unknown: > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c > index 4442aa355f86..f9fa612ac991 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c > @@ -512,6 +512,9 @@ void intel_pipe_update_start(struct intel_crtc_state *new_crtc_state) > if (min <= 0 || max <= 0) > goto irq_disable; > > + if (new_crtc_state->output_types & BIT(INTEL_OUTPUT_WD)) > + goto irq_disable; > + > if (drm_WARN_ON(&dev_priv->drm, drm_crtc_vblank_get(&crtc->base))) > goto irq_disable; > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > index e9212f69c360..f49630d95d6a 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > @@ -71,6 +71,7 @@ static const char * const output_type_str[] = { > OUTPUT_TYPE(DSI), > OUTPUT_TYPE(DDI), > OUTPUT_TYPE(DP_MST), > + OUTPUT_TYPE(WD) Please keep the comma at the end so whatever gets added next doesn't need to add it. > }; > > #undef OUTPUT_TYPE > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index a4c8493f3ce7..1360406ca531 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -1974,6 +1974,12 @@ void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder) > */ > if (encoder->type == INTEL_OUTPUT_DP_MST) > return; > + /* > + * WD transcoder is a virtual encoder hence sanization > + * is not required for it > + */ > + if (encoder->type == INTEL_OUTPUT_WD) > + return; > > if (!encoder->base.crtc && intel_encoder_is_dp(encoder)) { > u8 pipe_mask; > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index a0f84cbe974f..90b41b49e1d7 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -116,6 +116,7 @@ > #include "intel_sprite.h" > #include "intel_tc.h" > #include "intel_vga.h" > +#include "intel_wd.h" > #include "i9xx_plane.h" > #include "skl_scaler.h" > #include "skl_universal_plane.h" > @@ -1507,6 +1508,9 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state) > struct intel_encoder *encoder; > struct intel_crtc *crtc; > > + if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) > + continue; > + > if (!intel_connector_needs_modeset(state, connector)) > continue; > > @@ -1536,6 +1540,9 @@ static void intel_encoders_update_complete(struct intel_atomic_state *state) > struct intel_encoder *encoder; > struct intel_crtc *crtc; > > + if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) > + continue; > + > if (!intel_connector_needs_modeset(state, connector)) > continue; > > @@ -1550,6 +1557,39 @@ static void intel_encoders_update_complete(struct intel_atomic_state *state) > } > } > > +static void intel_queue_writeback_job(struct intel_atomic_state *state, > + struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) > +{ > + struct drm_connector_state *new_conn_state; > + struct drm_connector *connector; > + struct drm_writeback_connector *wb_conn; > + int i; > + > + for_each_new_connector_in_state(&state->base, connector, new_conn_state, > + i) { > + if (!new_conn_state->writeback_job) > + continue; > + > + wb_conn = drm_connector_to_writeback(connector); > + drm_writeback_queue_job(wb_conn, new_conn_state); > + } > +} > + > +static void intel_find_writeback_connector(struct intel_atomic_state *state, > + struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) > +{ > + struct drm_connector_state *new_conn_state; > + struct drm_connector *connector; > + int i; > + > + for_each_new_connector_in_state(&state->base, connector, new_conn_state, > + i) { > + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) > + continue; > + intel_wd_enable_capture(crtc_state, new_conn_state); It's surprising that a function named "find connector" enables capture. > + } > +} > + > static void intel_encoders_pre_pll_enable(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > @@ -1650,8 +1690,12 @@ static void intel_encoders_post_disable(struct intel_atomic_state *state, > int i; > > for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) { > - struct intel_encoder *encoder = > - to_intel_encoder(old_conn_state->best_encoder); > + struct intel_encoder *encoder; > + > + if (conn->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) > + continue; > + > + encoder = to_intel_encoder(old_conn_state->best_encoder); > > if (old_conn_state->crtc != &crtc->base) > continue; > @@ -1928,7 +1972,8 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, > bdw_set_pipemisc(new_crtc_state); > > if (!intel_crtc_is_bigjoiner_slave(new_crtc_state) && > - !transcoder_is_dsi(cpu_transcoder)) > + !transcoder_is_dsi(cpu_transcoder) && > + !transcoder_is_wd(cpu_transcoder)) > hsw_configure_cpu_transcoder(new_crtc_state); > > crtc->active = true; > @@ -7578,6 +7623,10 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > } > } > > + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { > + intel_wd_set_vblank_event(crtc, new_crtc_state); > + } > + Shouldn't this happen in a wd encoder hook? > intel_encoders_update_prepare(state); > > intel_dbuf_pre_plane_update(state); > @@ -7598,6 +7647,13 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > > intel_wait_for_vblank_workers(state); > > + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { > + if (!(new_crtc_state->output_types & BIT(INTEL_OUTPUT_WD))) > + continue; > + intel_queue_writeback_job(state, crtc, new_crtc_state); > + intel_find_writeback_connector(state, crtc, new_crtc_state); > + } Shouldn't this happen in a wd encoder hook? > + > /* FIXME: We should call drm_atomic_helper_commit_hw_done() here > * already, but still need the state for the delayed optimization. To > * fix this: > @@ -7968,6 +8024,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) > intel_ddi_init(dev_priv, PORT_TC1); > intel_ddi_init(dev_priv, PORT_TC2); > } else if (DISPLAY_VER(dev_priv) >= 12) { > + intel_wd_init(dev_priv, TRANSCODER_WD_0); > intel_ddi_init(dev_priv, PORT_A); > intel_ddi_init(dev_priv, PORT_B); > intel_ddi_init(dev_priv, PORT_TC1); > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > index 4e9f22954a41..b6987f57b032 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -52,6 +52,7 @@ struct intel_crtc_state; > struct intel_digital_port; > struct intel_dp; > struct intel_encoder; > +struct intel_connector; > struct intel_initial_plane_config; > struct intel_load_detect_pipe; > struct intel_plane; > @@ -157,6 +158,11 @@ static inline bool transcoder_is_dsi(enum transcoder transcoder) > return transcoder == TRANSCODER_DSI_A || transcoder == TRANSCODER_DSI_C; > } > > +static inline bool transcoder_is_wd(enum transcoder transcoder) > +{ > + return transcoder == TRANSCODER_WD_0 || transcoder == TRANSCODER_WD_1; > +} > + > /* > * Global legacy plane identifier. Valid only for primary/sprite > * planes on pre-g4x, and only for primary planes on g4x-bdw. > @@ -469,15 +475,16 @@ enum hpd_pin { > for_each_if(intel_encoder_can_psr(intel_encoder)) > > #define for_each_intel_connector_iter(intel_connector, iter) \ > - while ((intel_connector = to_intel_connector(drm_connector_list_iter_next(iter)))) > + while ((intel_connector = intel_connector_list_iter_next(iter))) > > #define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \ > list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \ > for_each_if((intel_encoder)->base.crtc == (__crtc)) > > -#define for_each_connector_on_encoder(dev, __encoder, intel_connector) \ > - list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \ > - for_each_if((intel_connector)->base.encoder == (__encoder)) > +#define for_each_connector_on_encoder(dev, __encoder, drm_connector) \ > + list_for_each_entry((drm_connector), &(dev)->mode_config.connector_list, head) \ > + for_each_if(drm_connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK && \ > + (to_intel_connector(drm_connector))->base.encoder == (__encoder)) There's only one user for this. Maybe open code that and convert to use connector iterators. > > #define for_each_old_intel_plane_in_state(__state, plane, old_plane_state, __i) \ > for ((__i) = 0; \ > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > index 225b6bfc783c..3e11cc6228d4 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > @@ -547,7 +547,7 @@ static void intel_hdmi_info(struct seq_file *m, > static void intel_connector_info(struct seq_file *m, > struct drm_connector *connector) > { > - struct intel_connector *intel_connector = to_intel_connector(connector); > + struct intel_connector *intel_connector; > const struct drm_connector_state *conn_state = connector->state; > struct intel_encoder *encoder = > to_intel_encoder(conn_state->best_encoder); > @@ -570,6 +570,9 @@ static void intel_connector_info(struct seq_file *m, > if (!encoder) > return; > > + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) > + intel_connector = to_intel_connector(connector); > + We have a lot of this copy-pasted everywhere. I'm wondering if it would be better to have to_intel_connector() return NULL for writeback. For one thing, if we miss the check somewhere, we'll fail loud with a null pointer dereference instead of silently casting a drm_writeback_connector to intel_connector, possibly corrupting the data and causing subtle and hard to track bugs. And for another, we can just do an if (!intel_connector) instead of the tedious connector_type checks. > switch (connector->connector_type) { > case DRM_MODE_CONNECTOR_DisplayPort: > case DRM_MODE_CONNECTOR_eDP: > @@ -587,12 +590,15 @@ static void intel_connector_info(struct seq_file *m, > break; > } > > - seq_puts(m, "\tHDCP version: "); > - intel_hdcp_info(m, intel_connector); > + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) { > + seq_puts(m, "\tHDCP version: "); > + intel_hdcp_info(m, intel_connector); > + } > > seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); > > - intel_panel_info(m, intel_connector); > + if (connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK) > + intel_panel_info(m, intel_connector); > > seq_printf(m, "\tmodes:\n"); > list_for_each_entry(mode, &connector->modes, head) > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h > index 0e94bd430bcb..289908a88cc3 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -44,6 +44,7 @@ > #include <drm/drm_vblank.h> > #include <drm/drm_vblank_work.h> > #include <drm/i915_mei_hdcp_interface.h> > +#include <drm/drm_writeback.h> > #include <media/cec-notifier.h> > > #include "i915_vma.h" > @@ -1370,6 +1371,11 @@ struct intel_crtc { > bool cpu_fifo_underrun_disabled; > bool pch_fifo_underrun_disabled; > > + struct { > + struct drm_pending_vblank_event *e; > + atomic_t work_busy; > + wait_queue_head_t wd_wait; > + } wd; > /* per-pipe watermark state */ > struct { > /* watermarks currently being used */ > @@ -1498,6 +1504,7 @@ struct cxsr_latency { > #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) > #define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, uapi) > #define to_intel_connector(x) container_of(x, struct intel_connector, base) > +#define to_intel_wb_connector(x) container_of(x, struct intel_wb_connector, base) > #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) > #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) > #define to_intel_plane(x) container_of(x, struct intel_plane, base) > @@ -2068,4 +2075,26 @@ to_intel_frontbuffer(struct drm_framebuffer *fb) > return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL; > } > > +static inline struct intel_connector * > +intel_connector_list_iter_next(struct drm_connector_list_iter *iter) > +{ > + struct drm_connector *connector; > + bool flag = true; > + /* > + * Skipping connector that are Writeback connector as they will > + * not be embedded in intel connector > + */ > + while (flag) { > + connector = drm_connector_list_iter_next(iter); > + if (connector && connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) > + continue; > + > + flag = false; > + > + if (connector) > + return to_intel_connector(connector); > + > + } > + return NULL; The above could be written simply as: drm_for_each_connector_iter(connector, iter) { if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) continue; return to_intel_connector(connector); } return NULL; or, if to_intel_connector() does the writeback check as I suggested earlier: drm_for_each_connector_iter(connector, iter) { struct intel_connector *intel_connector = to_intel_connector(connector); if (intel_connector) return intel_connector; } return NULL; The latter is actually a neat prep change since it doesn't even mention writeback. > +} Blank line here. > #endif /* __INTEL_DISPLAY_TYPES_H__ */ > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c > index 5262f16b45ac..82bb8e170197 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c > @@ -939,6 +939,9 @@ static int hsw_crtc_compute_clock(struct intel_atomic_state *state, > struct intel_encoder *encoder = > intel_get_crtc_new_encoder(state, crtc_state); > > + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_WD)) > + return 0; > + > if (DISPLAY_VER(dev_priv) < 11 && > intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) > return 0; > @@ -955,6 +958,9 @@ static int hsw_crtc_get_shared_dpll(struct intel_atomic_state *state, > struct intel_encoder *encoder = > intel_get_crtc_new_encoder(state, crtc_state); > > + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_WD)) > + return 0; > + > if (DISPLAY_VER(dev_priv) < 11 && > intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) > return 0; > diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c > index f0e04d3904c6..f6c85614842a 100644 > --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c > +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c > @@ -23,6 +23,7 @@ > #include "intel_modeset_setup.h" > #include "intel_pch_display.h" > #include "intel_pm.h" > +#include "intel_wd.h" > > static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, > struct drm_modeset_acquire_ctx *ctx) > @@ -110,17 +111,17 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, > > static void intel_modeset_update_connector_atomic_state(struct drm_i915_private *i915) > { > - struct intel_connector *connector; > + struct drm_connector *drm_conn; > struct drm_connector_list_iter conn_iter; > > drm_connector_list_iter_begin(&i915->drm, &conn_iter); > - for_each_intel_connector_iter(connector, &conn_iter) { > - struct drm_connector_state *conn_state = connector->base.state; > + drm_for_each_connector_iter(drm_conn, &conn_iter) { > + struct drm_connector_state *conn_state = drm_conn->state; > struct intel_encoder *encoder = > - to_intel_encoder(connector->base.encoder); > + to_intel_encoder(drm_conn->encoder); > > if (conn_state->crtc) > - drm_connector_put(&connector->base); > + drm_connector_put(drm_conn); > > if (encoder) { > struct intel_crtc *crtc = > @@ -132,7 +133,7 @@ static void intel_modeset_update_connector_atomic_state(struct drm_i915_private > conn_state->crtc = &crtc->base; > conn_state->max_bpc = (crtc_state->pipe_bpp ?: 24) / 3; > > - drm_connector_get(&connector->base); > + drm_connector_get(drm_conn); > } else { > conn_state->best_encoder = NULL; > conn_state->crtc = NULL; > @@ -205,10 +206,10 @@ static bool intel_crtc_has_encoders(struct intel_crtc *crtc) > static struct intel_connector *intel_encoder_find_connector(struct intel_encoder *encoder) > { > struct drm_device *dev = encoder->base.dev; > - struct intel_connector *connector; > + struct drm_connector *drm_connector; > > - for_each_connector_on_encoder(dev, &encoder->base, connector) > - return connector; > + for_each_connector_on_encoder(dev, &encoder->base, drm_connector) > + return to_intel_connector(drm_connector); Yeah this should just be rewritten to ditch for_each_connector_on_encoder(). > > return NULL; > } > @@ -422,6 +423,8 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) > struct intel_crtc *crtc; > struct intel_encoder *encoder; > struct intel_connector *connector; > + struct drm_connector *drm_conn; > + struct drm_encoder *drm_enc; We never use "drm_conn" or "drm_enc" anywhere, let's not start now. These are the combos generally in use, from most preferred to least preferred: struct drm_encoder *_encoder; struct intel_encoder *encoder struct drm_encoder *encoder; struct intel_encoder *intel_encoder struct drm_encoder *drm_encoder; struct intel_encoder *encoder Similarly for connector. Ditto everywhere. > struct drm_connector_list_iter conn_iter; > u8 active_pipes = 0; > > @@ -503,8 +506,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) > struct intel_crtc_state *crtc_state; > struct intel_crtc *crtc; > > - connector->base.dpms = DRM_MODE_DPMS_ON; > - > + connector->base.dpms = DRM_MODE_DPMS_OFF; Huh? > encoder = intel_attached_encoder(connector); > connector->base.encoder = &encoder->base; > > @@ -533,6 +535,49 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) > } > drm_connector_list_iter_end(&conn_iter); > > + drm_connector_list_iter_begin(&i915->drm, &conn_iter); > + drm_for_each_connector_iter(drm_conn, &conn_iter) { > + if (drm_conn->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) { > + struct intel_crtc_state *crtc_state; > + struct drm_writeback_connector *wb_conn = > + drm_connector_to_writeback(drm_conn); > + struct intel_wd *intel_wd = wb_conn_to_intel_wd(wb_conn); > + struct intel_crtc *crtc; > + > + pipe = 0; > + drm_enc = &intel_wd->base.base; > + drm_conn->encoder = drm_enc; > + encoder = to_intel_encoder(drm_enc); > + if (encoder->get_hw_state(encoder, &pipe)) { > + drm_conn->dpms = DRM_MODE_DPMS_ON; > + > + crtc = to_intel_crtc(drm_enc->crtc); > + crtc_state = crtc ? to_intel_crtc_state(crtc->base.state) : NULL; > + > + if (crtc_state && crtc_state->hw.active) { > + /* > + * This has to be done during hardware readout > + * because anything calling .crtc_disable may > + * rely on the connector_mask being accurate. > + */ > + crtc_state->uapi.connector_mask |= > + drm_connector_mask(&connector->base); > + crtc_state->uapi.encoder_mask |= > + drm_encoder_mask(&encoder->base); > + } > + } else { > + drm_conn->dpms = DRM_MODE_DPMS_OFF; > + drm_conn->encoder = NULL; > + } > + drm_dbg_kms(&i915->drm, > + "[CONNECTOR:%d:%s] hw state readout: %s\n", > + drm_conn->base.id, drm_conn->name, > + str_enabled_disabled(drm_conn->encoder)); > + } > + } > + drm_connector_list_iter_end(&conn_iter); Surprised to see a dedicated loop for writeback. > + > + Superfluous double newline. > for_each_intel_crtc(&i915->drm, crtc) { > struct intel_bw_state *bw_state = > to_intel_bw_state(i915->bw_obj.state); > diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c > index a91586d77cb6..4a3d04f14ef7 100644 > --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c > +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c > @@ -25,11 +25,17 @@ > static void intel_connector_verify_state(struct intel_crtc_state *crtc_state, > struct drm_connector_state *conn_state) > { > - struct intel_connector *connector = to_intel_connector(conn_state->connector); > - struct drm_i915_private *i915 = to_i915(connector->base.dev); > + struct drm_connector *drm_conn = conn_state->connector; > + struct intel_connector *connector; > + struct drm_i915_private *i915 = to_i915(drm_conn->dev); > > drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n", > - connector->base.base.id, connector->base.name); > + drm_conn->base.id, drm_conn->name); > + > + if (drm_conn->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) > + return; > + > + connector = to_intel_connector(drm_conn); > > if (connector->get_hw_state(connector)) { > struct intel_encoder *encoder = intel_attached_encoder(connector); > @@ -119,6 +125,9 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat > encoder->base.base.id, > encoder->base.name); > > + if (encoder->type == INTEL_OUTPUT_WD) > + continue; > + > for_each_oldnew_connector_in_state(&state->base, connector, old_conn_state, > new_conn_state, i) { > if (old_conn_state->best_encoder == &encoder->base) > @@ -177,6 +186,9 @@ verify_crtc_state(struct intel_crtc *crtc, > > intel_crtc_get_pipe_config(pipe_config); > > + if (new_crtc_state->output_types & BIT(INTEL_OUTPUT_WD)) > + return; > + > /* we keep both pipes enabled on 830 */ > if (IS_I830(dev_priv) && pipe_config->hw.active) > pipe_config->hw.active = new_crtc_state->hw.active; > diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c > index 1c0c745c142d..73a5a12e2c48 100644 > --- a/drivers/gpu/drm/i915/display/intel_opregion.c > +++ b/drivers/gpu/drm/i915/display/intel_opregion.c > @@ -374,6 +374,9 @@ int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, > if (ret) > return ret; > > + if (intel_encoder->type == INTEL_OUTPUT_WD) > + return 0; > + > if (intel_encoder->type == INTEL_OUTPUT_DSI) > port = 0; > else > diff --git a/drivers/gpu/drm/i915/display/intel_wb_connector.h b/drivers/gpu/drm/i915/display/intel_wb_connector.h > new file mode 100644 > index 000000000000..8063a9273bc7 > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/intel_wb_connector.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2020 Intel Corporation > + */ > + > +#ifndef __INTEL_WB_CONNECTOR_H__ > +#define __INTEL_WB_CONNECTOR_H__ > + > +#include "intel_display.h" > + > +struct intel_wb_connector *intel_wb_connector_alloc(void); > +void intel_wb_connector_free(struct intel_wb_connector *connector); > +void intel_wb_connector_destroy(struct drm_connector *connector); > +bool intel_wb_connector_get_hw_state(struct intel_wb_connector *connector); > +enum pipe intel_wb_connector_get_pipe(struct intel_wb_connector *connector); > +void intel_wb_connector_attach_encoder(struct intel_wb_connector *connector, > + struct intel_encoder *encoder); > + > +#endif /* __INTEL_WB_CONNECTOR_H__ */ > + > diff --git a/drivers/gpu/drm/i915/display/intel_wd.c b/drivers/gpu/drm/i915/display/intel_wd.c > new file mode 100644 > index 000000000000..7c9c83038de1 > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/intel_wd.c > @@ -0,0 +1,733 @@ > +// SPDX-License-Identifier: GPL-2.0 MIT. > +/* > + * Copyright © 2021 Intel Corporation > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice (including the next > + * paragraph) shall be included in all copies or substantial portions of the > + * Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > + * IN THE SOFTWARE. Not needed when SPDX is used. > + * > + * Authors: > + * Suraj Kandpal <suraj.kandpal@intel.com> > + * Arun Murthy <arun.r.murthy@intel.com> Please consider not adding authors lists. They'll get outdated, the up-to-date info is available in git log/blame, they create a false sense of ownership in shared code, they create a constant problem of deciding when to add authorship line and when to accept/reject additions to authors. I still seem to have authors lines in two files, from before I changed my mind about this, but based on my contributious I (and many others) could justify adding authors to nearly all the files under display/ and elsewhere. Yet we have authors lines from people who haven't contributed in 10 years and their original contributions have been rewritten many times over. IMHO there's just no point in authors lists in code. > + * > + */ > + > +#include <drm/drm_atomic_helper.h> > +#include <drm/drm_fourcc.h> > + > +#include "intel_atomic.h" > +#include "intel_connector.h" > +#include "intel_wd.h" > +#include "intel_fb_pin.h" > +#include "intel_de.h" > + > +enum { > + WD_CAPTURE_4_PIX, > + WD_CAPTURE_2_PIX, > +} wd_capture_format; > + > +static struct drm_writeback_job > +*intel_get_writeback_job_from_queue(struct intel_wd *intel_wd) > +{ > + struct drm_writeback_job *job; > + struct drm_i915_private *dev_priv = to_i915(intel_wd->base.base.dev); All new code should name this struct drm_i915_private *i915. Ditto everywhere. > + struct drm_writeback_connector *wb_conn = > + &intel_wd->wb_conn; > + unsigned long flags; > + > + spin_lock_irqsave(&wb_conn->job_lock, flags); > + job = list_first_entry_or_null(&wb_conn->job_queue, > + struct drm_writeback_job, > + list_entry); > + spin_unlock_irqrestore(&wb_conn->job_lock, flags); > + if (job == NULL) { > + drm_dbg_kms(&dev_priv->drm, "job queue is empty\n"); > + return NULL; > + } > + > + return job; > +} > + > +/*Check with Spec*/ > +static const u32 wb_fmts[] = { > + DRM_FORMAT_YUV444, > + DRM_FORMAT_XYUV8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_Y410, > + DRM_FORMAT_YUV422, > + DRM_FORMAT_XBGR2101010, > + DRM_FORMAT_RGB565, Indentation. Please see checkpatch. > + > +}; > + > +static int intel_wd_get_format(int pixel_format) > +{ > + int wd_format = -EINVAL; > + > + switch (pixel_format) { > + case DRM_FORMAT_XBGR8888: > + case DRM_FORMAT_XRGB8888: > + case DRM_FORMAT_XBGR2101010: > + case DRM_FORMAT_XYUV8888: > + case DRM_FORMAT_YUV444: > + wd_format = WD_CAPTURE_4_PIX; > + break; > + case DRM_FORMAT_YUV422: > + case DRM_FORMAT_RGB565: > + wd_format = WD_CAPTURE_2_PIX; > + break; > + default: > + DRM_ERROR("unsupported pixel format %x!\n", > + pixel_format); > + } > + > + return wd_format; > +} > + > +static int intel_wd_verify_pix_format(int format) > +{ > + const struct drm_format_info *info = drm_format_info(format); > + int pix_format = info->format; > + int i = 0; > + > + for (i = 0; i < ARRAY_SIZE(wb_fmts); i++) > + if (pix_format == wb_fmts[i]) > + return 0; > + > + return 1; > +} > + > +static u32 intel_wd_get_stride(const struct intel_crtc_state *crtc_state, > + int format) > +{ > + const struct drm_format_info *info = drm_format_info(format); > + int wd_format; > + int hactive, pixel_size; > + > + wd_format = intel_wd_get_format(info->format); > + > + switch (wd_format) { > + case WD_CAPTURE_4_PIX: > + pixel_size = 4; > + break; > + case WD_CAPTURE_2_PIX: > + pixel_size = 2; > + break; > + default: > + pixel_size = 1; > + break; > + } > + > + hactive = crtc_state->hw.adjusted_mode.crtc_hdisplay; > + > + return DIV_ROUND_UP(hactive * pixel_size, 64); > +} > + > +static int intel_wd_pin_fb(struct intel_wd *intel_wd, > + struct drm_framebuffer *fb) > +{ > + const struct i915_ggtt_view view = { > + .type = I915_GGTT_VIEW_NORMAL, > + }; Indentation. > + struct i915_vma *vma; > + > + vma = intel_pin_and_fence_fb_obj(fb, false, &view, false, > + &intel_wd->flags); > + > + if (IS_ERR(vma)) > + return PTR_ERR(vma); > + > + intel_wd->vma = vma; > + return 0; > +} > + > +static void intel_configure_slicing_strategy(struct drm_i915_private *dev_priv, > + struct intel_wd *intel_wd, u32 *tmp) > +{ > + *tmp &= ~WD_STRAT_MASK; > + if (intel_wd->slicing_strategy == 1) > + *tmp |= WD_SLICING_STRAT_1_1; > + else if (intel_wd->slicing_strategy == 2) > + *tmp |= WD_SLICING_STRAT_2_1; > + else if (intel_wd->slicing_strategy == 3) > + *tmp |= WD_SLICING_STRAT_4_1; > + else if (intel_wd->slicing_strategy == 4) > + *tmp |= WD_SLICING_STRAT_8_1; > + > + intel_de_write(dev_priv, WD_STREAMCAP_CTL(intel_wd->trans), > + *tmp); > + > +} > + > +static enum drm_mode_status > +intel_wd_mode_valid(struct drm_connector *connector, > + struct drm_display_mode *mode) > +{ > + drm_dbg_kms(connector->dev, ":"); > + return MODE_OK; > +} > + > +static int intel_wd_get_modes(struct drm_connector *connector) > +{ > + return 0; > +} > + > +static void intel_wd_get_config(struct intel_encoder *encoder, > + struct intel_crtc_state *pipe_config) > +{ > + struct intel_crtc *intel_crtc = > + to_intel_crtc(pipe_config->uapi.crtc); > + > + if (intel_crtc) { > + memcpy(pipe_config, intel_crtc->config, > + sizeof(*pipe_config)); > + pipe_config->output_types |= BIT(INTEL_OUTPUT_WD); > + } > + > +} > + > +static int intel_wd_compute_config(struct intel_encoder *encoder, > + struct intel_crtc_state *pipe_config, > + struct drm_connector_state *conn_state) > +{ > + struct intel_wd *intel_wd = enc_to_intel_wd(encoder); > + struct drm_writeback_job *job; > + > + job = intel_get_writeback_job_from_queue(intel_wd); > + if (job || conn_state->writeback_job) { > + intel_wd->wd_crtc = to_intel_crtc(pipe_config->uapi.crtc); > + return 0; > + } > + > + return 0; > +} > + > +static void intel_wd_get_power_domains(struct intel_encoder *encoder, > + struct intel_crtc_state *crtc_state) > +{ > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > + struct intel_wd *intel_wd = enc_to_intel_wd(encoder); > + intel_wakeref_t wakeref; > + > + wakeref = intel_display_power_get(dev_priv, > + encoder->power_domain); > + > + intel_wd->io_wakeref[0] = wakeref; > +} > + > +static bool intel_wd_get_hw_state(struct intel_encoder *encoder, > + enum pipe *pipe) > +{ > + bool ret = false; > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > + struct intel_wd *intel_wd = enc_to_intel_wd(encoder); > + struct intel_crtc *wd_crtc = intel_wd->wd_crtc; > + intel_wakeref_t wakeref; > + u32 tmp; > + > + if (wd_crtc) > + return false; > + > + wakeref = intel_display_power_get_if_enabled(dev_priv, > + encoder->power_domain); > + > + if (!wakeref) > + goto out; > + > + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); > + ret = tmp & WD_TRANS_ACTIVE; > + > + if (ret) { > + *pipe = wd_crtc->pipe; > + return true; > + } > + > +out: > + intel_display_power_put(dev_priv, encoder->power_domain, wakeref); > + return false; > + > +} > + > +static int intel_wd_encoder_atomic_check(struct drm_encoder *encoder, > + struct drm_crtc_state *crtc_st, > + struct drm_connector_state *conn_st) > +{ > + /* Check for the format and buffers and property validity */ > + struct drm_framebuffer *fb; > + struct drm_writeback_job *job = conn_st->writeback_job; > + struct drm_i915_private *dev_priv = to_i915(encoder->dev); > + const struct drm_display_mode *mode = &crtc_st->mode; > + int ret; > + > + drm_dbg_kms(&dev_priv->drm, "\n"); > + > + if (!job) { > + drm_dbg_kms(&dev_priv->drm, "No writeback job created returning\n"); > + return -EINVAL; > + } > + > + fb = job->fb; > + > + if (!fb) { > + drm_dbg_kms(&dev_priv->drm, "Invalid framebuffer\n"); > + return -EINVAL; > + } > + > + if (fb->width != mode->hdisplay || fb->height != mode->vdisplay) { > + drm_dbg_kms(&dev_priv->drm, "Invalid framebuffer size %ux%u\n", > + fb->width, fb->height); > + return -EINVAL; > + } > + > + ret = intel_wd_verify_pix_format(fb->format->format); > + > + if (ret) { > + drm_dbg_kms(&dev_priv->drm, "Unsupported framebuffer format %08x\n", > + fb->format->format); > + return -EINVAL; > + } > + > + return 0; > +} > + > + > +static const struct drm_encoder_helper_funcs wd_encoder_helper_funcs = { > + .atomic_check = intel_wd_encoder_atomic_check, > +}; > + > +static void intel_wd_connector_destroy(struct drm_connector *connector) > +{ > + drm_dbg_kms(connector->dev, "\n"); > + drm_connector_cleanup(connector); > + kfree(connector); > +} > + > +static enum drm_connector_status > +intel_wb_connector_detect(struct drm_connector *connector, bool force) > +{ > + return connector_status_connected; > +} > + > +static const struct drm_connector_funcs wd_connector_funcs = { > + .detect = intel_wb_connector_detect, > + .reset = drm_atomic_helper_connector_reset, > + .destroy = intel_wd_connector_destroy, > + .fill_modes = drm_helper_probe_single_connector_modes, > + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, > + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, > +}; > + > +static const struct drm_connector_helper_funcs wd_connector_helper_funcs = { > + .get_modes = intel_wd_get_modes, > + .mode_valid = intel_wd_mode_valid, > +}; > + > +static const struct drm_encoder_funcs drm_writeback_encoder_funcs = { > + .destroy = drm_encoder_cleanup, > +}; > + > +static bool intel_fastset_dis(struct intel_encoder *encoder, > + struct intel_crtc_state *pipe_config) > +{ > + pipe_config->uapi.mode_changed = true; > + return false; > +} > + > +static void intel_wd_connector_init(struct intel_wd *intel_wd) > +{ > + drm_atomic_helper_connector_reset(&intel_wd->wb_conn.base); > +} > + > +void intel_wd_init(struct drm_i915_private *dev_priv, enum transcoder trans) > +{ > + struct intel_wd *intel_wd; > + struct intel_encoder *encoder; > + struct drm_writeback_connector *wb_conn; > + int n_formats = ARRAY_SIZE(wb_fmts); > + struct drm_encoder *drm_enc; > + int err, ret; > + > + intel_wd = kzalloc(sizeof(*intel_wd), GFP_KERNEL); > + > + if (!intel_wd) > + return; > + > + intel_wd_connector_init(intel_wd); > + encoder = &intel_wd->base; > + drm_enc = &encoder->base; > + wb_conn = &intel_wd->wb_conn; > + intel_wd->trans = trans; > + intel_wd->triggered_cap_mode = 1; > + intel_wd->frame_num = 1; > + intel_wd->slicing_strategy = 1; > + encoder->get_config = intel_wd_get_config; > + encoder->compute_config = intel_wd_compute_config; > + encoder->get_hw_state = intel_wd_get_hw_state; > + encoder->type = INTEL_OUTPUT_WD; > + encoder->cloneable = 0; > + encoder->pipe_mask = BIT(PIPE_B); > + encoder->power_domain = POWER_DOMAIN_TRANSCODER_B; > + encoder->get_power_domains = intel_wd_get_power_domains; > + encoder->initial_fastset_check = intel_fastset_dis; > + > + drm_encoder_helper_add(drm_enc, > + &wd_encoder_helper_funcs); > + > + drm_enc->possible_crtcs = BIT(PIPE_B); > + > + ret = drm_encoder_init(&dev_priv->drm, drm_enc, > + &drm_writeback_encoder_funcs, > + DRM_MODE_ENCODER_VIRTUAL, NULL); > + > + if (ret) { > + drm_dbg_kms(&dev_priv->drm, > + "Writeback drm_encoder init Failed: %d\n", > + ret); > + goto cleanup; > + } > + > + err = drm_writeback_connector_init_with_encoder(&dev_priv->drm, > + wb_conn, drm_enc, &wd_connector_funcs, > + wb_fmts, n_formats); > + > + if (err != 0) { > + drm_dbg_kms(&dev_priv->drm, > + "drm_writeback_connector_init: Failed: %d\n", > + err); > + goto cleanup; > + } > + > + wb_conn->base.encoder = drm_enc; > + drm_connector_helper_add(&wb_conn->base, &wd_connector_helper_funcs); > + wb_conn->base.status = connector_status_connected; > + return; > + > +cleanup: > + kfree(intel_wd); > + return; > +} > + > +static void intel_wd_writeback_complete(struct intel_wd *intel_wd, > + struct drm_writeback_job *job, int status) > +{ > + struct drm_writeback_connector *wb_conn = > + &intel_wd->wb_conn; > + drm_writeback_signal_completion(wb_conn, status); > +} > + > +static int intel_wd_setup_transcoder(struct intel_wd *intel_wd, > + struct intel_crtc_state *pipe_config, > + struct drm_connector_state *conn_state, > + struct drm_writeback_job *job) > +{ > + struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); > + enum pipe pipe = intel_crtc->pipe; > + struct drm_framebuffer *fb; > + struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > + struct drm_gem_object *wd_fb_obj; > + int ret; > + u32 stride, tmp; > + u16 hactive, vactive; > + > + fb = job->fb; > + wd_fb_obj = fb->obj[0]; > + if (!wd_fb_obj) { > + drm_dbg_kms(&dev_priv->drm, "No framebuffer gem object created\n"); > + return -1; > + } > + ret = intel_wd_pin_fb(intel_wd, fb); > + drm_WARN_ON(&dev_priv->drm, ret != 0); > + > + /*Write stride and surface registers in that particular order*/ > + stride = intel_wd_get_stride(pipe_config, fb->format->format); > + > + tmp = intel_de_read(dev_priv, WD_STRIDE(intel_wd->trans)); > + tmp &= ~WD_STRIDE_MASK; > + tmp |= (stride << WD_STRIDE_SHIFT); > + > + intel_de_write(dev_priv, WD_STRIDE(intel_wd->trans), tmp); > + > + tmp = intel_de_read(dev_priv, WD_SURF(intel_wd->trans)); > + > + intel_de_write(dev_priv, WD_SURF(intel_wd->trans), > + i915_ggtt_offset(intel_wd->vma)); > + > + tmp = intel_de_read_fw(dev_priv, WD_IIR(intel_wd->trans)); > + intel_de_write_fw(dev_priv, WD_IIR(intel_wd->trans), tmp); > + > + tmp = ~(WD_GTT_FAULT_INT|WD_WRITE_COMPLETE_INT|WD_FRAME_COMPLETE_INT| > + WD_VBLANK_INT|WD_OVERRUN_INT|WD_CAPTURING_INT); > + intel_de_write_fw(dev_priv, WD_IMR(intel_wd->trans), tmp); > + > + if (intel_wd->stream_cap) { > + tmp = intel_de_read(dev_priv, > + WD_STREAMCAP_CTL(intel_wd->trans)); > + tmp |= WD_STREAM_CAP_MODE_EN; > + intel_configure_slicing_strategy(dev_priv, intel_wd, &tmp); > + } > + > + hactive = pipe_config->uapi.mode.hdisplay; > + vactive = pipe_config->uapi.mode.vdisplay; > + tmp = intel_de_read(dev_priv, HTOTAL(intel_wd->trans)); > + tmp = intel_de_read(dev_priv, VTOTAL(intel_wd->trans)); > + > + /* minimum hactive as per bspec: 64 pixels*/ > + if (hactive < 64) > + drm_err(&dev_priv->drm, "hactive is less then 64 pixels\n"); > + > + intel_de_write(dev_priv, HTOTAL(intel_wd->trans), hactive - 1); > + intel_de_write(dev_priv, VTOTAL(intel_wd->trans), vactive - 1); > + > + tmp = intel_de_read(dev_priv, WD_TRANS_FUNC_CTL(intel_wd->trans)); > + /* select pixel format */ > + tmp &= ~WD_PIX_FMT_MASK; > + > + switch (fb->format->format) { > + default: > + fallthrough; > + case DRM_FORMAT_YUYV: > + tmp |= WD_PIX_FMT_YUYV; > + break; > + case DRM_FORMAT_XYUV8888: > + tmp |= WD_PIX_FMT_XYUV8888; > + break; > + case DRM_FORMAT_XBGR8888: > + case DRM_FORMAT_XRGB8888: > + tmp |= WD_PIX_FMT_XBGR8888; > + break; > + case DRM_FORMAT_Y410: > + tmp |= WD_PIX_FMT_Y410; > + break; > + case DRM_FORMAT_YUV422: > + tmp |= WD_PIX_FMT_YUV422; > + break; > + case DRM_FORMAT_XBGR2101010: > + tmp |= WD_PIX_FMT_XBGR2101010; > + break; > + case DRM_FORMAT_RGB565: > + tmp |= WD_PIX_FMT_RGB565; > + break; > + } > + > + if (intel_wd->triggered_cap_mode) > + tmp |= WD_TRIGGERED_CAP_MODE_ENABLE; > + > + if (intel_wd->stream_cap) > + tmp |= WD_CTL_POINTER_DTDH; > + > + /*select input pipe*/ > + tmp &= ~WD_INPUT_SELECT_MASK; > + switch (pipe) { > + default: > + fallthrough; > + case PIPE_A: > + tmp |= WD_INPUT_PIPE_A; > + break; > + case PIPE_B: > + tmp |= WD_INPUT_PIPE_B; > + break; > + case PIPE_C: > + tmp |= WD_INPUT_PIPE_C; > + break; > + case PIPE_D: > + tmp |= WD_INPUT_PIPE_D; > + break; > + } > + > + /* enable DDI buffer */ > + if (!(tmp & TRANS_WD_FUNC_ENABLE)) > + tmp |= TRANS_WD_FUNC_ENABLE; > + > + intel_de_write(dev_priv, WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); > + > + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); > + ret = tmp & WD_TRANS_ACTIVE; > + > + if (!ret) { > + /*enable the transcoder */ > + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); > + tmp |= WD_TRANS_ENABLE; > + intel_de_write(dev_priv, PIPECONF(intel_wd->trans), tmp); > + > + /* wait for transcoder to be enabled */ > + if (intel_de_wait_for_set(dev_priv, PIPECONF(intel_wd->trans), > + WD_TRANS_ACTIVE, 10)) > + drm_err(&dev_priv->drm, "WD transcoder could not be enabled\n"); > + } > + > + return 0; > +} > + > +static void intel_wd_disable_capture(struct intel_wd *intel_wd) > +{ > + struct drm_i915_private *dev_priv = to_i915(intel_wd->base.base.dev); > + u32 tmp; > + > + intel_de_write_fw(dev_priv, WD_IMR(intel_wd->trans), 0xFF); > + tmp = intel_de_read(dev_priv, PIPECONF(intel_wd->trans)); > + tmp &= WD_TRANS_DISABLE; > + intel_de_write(dev_priv, PIPECONF(intel_wd->trans), tmp); > + tmp = intel_de_read(dev_priv, WD_TRANS_FUNC_CTL(intel_wd->trans)); > + tmp |= ~TRANS_WD_FUNC_ENABLE; > +} > + > +static int intel_wd_capture(struct intel_wd *intel_wd, > + struct intel_crtc_state *pipe_config, > + struct drm_connector_state *conn_state, > + struct drm_writeback_job *job) > +{ > + u32 tmp; > + struct drm_i915_private *dev_priv = to_i915(intel_wd->base.base.dev); > + int ret = 0, status = 0; > + struct intel_crtc *wd_crtc = intel_wd->wd_crtc; > + unsigned long flags; > + > + if (!job->out_fence) > + drm_dbg_kms(&dev_priv->drm, "Not able to get out_fence for job\n"); > + > + ret = intel_wd_setup_transcoder(intel_wd, pipe_config, > + conn_state, job); > + > + if (ret < 0) { > + drm_dbg_kms(&dev_priv->drm, > + "WD transcoder setup not completed aborting capture\n"); > + return -1; > + } > + > + if (wd_crtc == NULL) { > + DRM_ERROR("CRTC not attached\n"); drm_err() please. Ditto everywhere. > + return -1; > + } > + > + tmp = intel_de_read_fw(dev_priv, > + WD_TRANS_FUNC_CTL(intel_wd->trans)); > + tmp |= START_TRIGGER_FRAME; > + tmp &= ~WD_FRAME_NUMBER_MASK; > + tmp |= intel_wd->frame_num; > + intel_de_write_fw(dev_priv, > + WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); > + > + if (!intel_de_wait_for_set(dev_priv, WD_IIR(intel_wd->trans), > + WD_FRAME_COMPLETE_INT, 100)){ > + drm_dbg_kms(&dev_priv->drm, "frame captured\n"); > + status = 0; > + } else { > + drm_dbg_kms(&dev_priv->drm, "frame not captured triggering stop frame\n"); > + tmp = intel_de_read(dev_priv, > + WD_TRANS_FUNC_CTL(intel_wd->trans)); > + tmp |= STOP_TRIGGER_FRAME; > + intel_de_write(dev_priv, > + WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); > + status = -1; > + } > + > + intel_de_write(dev_priv, WD_IIR(intel_wd->trans), tmp); > + intel_wd_writeback_complete(intel_wd, job, status); > + if (intel_get_writeback_job_from_queue(intel_wd) == NULL) > + intel_wd_disable_capture(intel_wd); > + if (wd_crtc->wd.e) { > + spin_lock_irqsave(&dev_priv->drm.event_lock, flags); > + drm_dbg_kms(&dev_priv->drm, "send %p\n", wd_crtc->wd.e); > + drm_crtc_send_vblank_event(&wd_crtc->base, > + wd_crtc->wd.e); > + spin_unlock_irqrestore(&dev_priv->drm.event_lock, flags); > + wd_crtc->wd.e = NULL; > + } else { > + DRM_ERROR("Event NULL! %p, %p\n", &dev_priv->drm, > + wd_crtc); > + } > + return 0; > + > +} > + > +void intel_wd_enable_capture(struct intel_crtc_state *pipe_config, > + struct drm_connector_state *conn_state) Feels like this should be an encoder hook, called like for any encoder. > +{ > + struct drm_i915_private *i915 = > + to_i915(conn_state->connector->dev); > + struct drm_writeback_connector *wb_conn = > + drm_connector_to_writeback(conn_state->connector); > + struct intel_wd *intel_wd = wb_conn_to_intel_wd(wb_conn); > + struct drm_writeback_job *job; > + > + job = intel_get_writeback_job_from_queue(intel_wd); > + if (job == NULL) { > + drm_dbg_kms(&i915->drm, > + "job queue is empty not capturing any frame\n"); > + return; > + } > + > + intel_wd_capture(intel_wd, pipe_config, > + conn_state, job); > + intel_wd->frame_num += 1; > + > +} > + > +void intel_wd_set_vblank_event(struct intel_crtc *intel_crtc, > + struct intel_crtc_state *intel_crtc_state) > +{ > + struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > + struct drm_crtc_state *state = &intel_crtc_state->uapi; > + struct intel_encoder *encoder; > + struct intel_wd *intel_wd; > + > + for_each_intel_encoder(&dev_priv->drm, encoder) { > + > + if (encoder->type != INTEL_OUTPUT_WD) > + continue; > + > + intel_wd = enc_to_intel_wd(encoder); > + > + if (!intel_wd->wd_crtc) > + return; > + } > + > + if (intel_crtc == intel_wd->wd_crtc) { > + intel_crtc->wd.e = state->event; > + state->event = NULL; > + } > +} > +void intel_wd_handle_isr(struct drm_i915_private *dev_priv) > +{ > + u32 iir_value = 0; > + struct intel_encoder *encoder; > + struct intel_wd *intel_wd; > + > + iir_value = intel_de_read(dev_priv, WD_IIR(TRANSCODER_WD_0)); > + drm_dbg_kms(&dev_priv->drm, "\n"); > + > + for_each_intel_encoder(&dev_priv->drm, encoder) { > + > + if (encoder->type == INTEL_OUTPUT_WD) > + continue; > + > + intel_wd = enc_to_intel_wd(encoder); > + > + if (!intel_wd->wd_crtc) { > + DRM_ERROR("NO CRTC attached with WD\n"); > + goto clear_iir; > + } > + } > + > + if (iir_value & WD_FRAME_COMPLETE_INT) > + return; > + > +clear_iir: > + intel_de_write(dev_priv, WD_IIR(TRANSCODER_WD_0), iir_value); > +} > diff --git a/drivers/gpu/drm/i915/display/intel_wd.h b/drivers/gpu/drm/i915/display/intel_wd.h > new file mode 100644 > index 000000000000..f16b9b2d78d8 > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/intel_wd.h > @@ -0,0 +1,76 @@ > +/* SPDX-License-Identifier: GPL-2.0 MIT. > + * Copyright © 2021 Intel Corporation > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice (including the next > + * paragraph) shall be included in all copies or substantial portions of the > + * Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER > + * DEALINGS IN THE SOFTWARE. Unnecessary. > + * > + * Author : > + * Suraj Kandpal<suraj.kandpal@intel.com> > + * Arun Murthy<arun.r.murthy@intel.com> See what I said above about authors. > + */ > + > +#ifndef _INTEL_WD_H > +#define _INTEL_WD_H > + > +#include <drm/drm_crtc.h> Unnecessary AFAICT. Please use forward declarations instead of includes in headers as much as possible. > + > +#include "intel_display_types.h" > + > +#define I915_MAX_WD_TANSCODERS 2 > + > +struct intel_wd { > + struct intel_encoder base; > + struct drm_writeback_connector wb_conn; > + struct intel_crtc *wd_crtc; > + intel_wakeref_t io_wakeref[I915_MAX_WD_TANSCODERS]; > + //struct intel_connector *attached_connector; > + enum transcoder trans; > + struct i915_vma *vma; > + unsigned long flags; > + struct drm_writeback_job *job; > + int triggered_cap_mode; > + int frame_num; > + bool stream_cap; > + bool start_capture; > + int slicing_strategy; > +}; > + > +struct intel_wd_clk_vals { > + u32 cdclk; > + u16 link_m; > + u16 link_n; > +}; Unused. > + > +static inline struct intel_wd *enc_to_intel_wd(struct intel_encoder *encoder) > +{ > + return container_of(&encoder->base, struct intel_wd, base.base); > +} > + > +static inline struct intel_wd *wb_conn_to_intel_wd(struct drm_writeback_connector *wb_conn) > +{ > + return container_of(wb_conn, struct intel_wd, wb_conn); > +} > + > +void intel_wd_init(struct drm_i915_private *dev_priv, enum transcoder trans); > +void intel_wd_enable_capture(struct intel_crtc_state *pipe_config, > + struct drm_connector_state *conn_state); > +void intel_wd_handle_isr(struct drm_i915_private *dev_priv); > +void intel_wd_set_vblank_event(struct intel_crtc *crtc, > + struct intel_crtc_state *state); > +#endif/* _INTEL_WD_H */ > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index d25647be25d1..30dc97785392 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -35,6 +35,8 @@ > #include <linux/pm_qos.h> > > #include <drm/drm_connector.h> > +#include <drm/drm_writeback.h> > +#include <drm/i915_mei_hdcp_interface.h> Unnecessary. > #include <drm/ttm/ttm_device.h> > > #include "display/intel_cdclk.h" > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 73cebc6aa650..95a6a8f7a911 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -42,6 +42,7 @@ > #include "display/intel_hotplug.h" > #include "display/intel_lpe_audio.h" > #include "display/intel_psr.h" > +#include "display/intel_wd.h" > > #include "gt/intel_breadcrumbs.h" > #include "gt/intel_gt.h" > @@ -2342,6 +2343,11 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) > found = true; > } > > + if (iir & GEN8_DE_MISC_WD0) { > + intel_wd_handle_isr(dev_priv); > + found = true; > + } > + > if (iir & GEN8_DE_EDP_PSR) { > struct intel_encoder *encoder; > u32 psr_iir; > @@ -3767,7 +3773,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) > u32 de_pipe_enables; > u32 de_port_masked = gen8_de_port_aux_mask(dev_priv); > u32 de_port_enables; > - u32 de_misc_masked = GEN8_DE_EDP_PSR; > + u32 de_misc_masked = GEN8_DE_EDP_PSR | GEN8_DE_MISC_WD0; > u32 trans_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | > BIT(TRANSCODER_C) | BIT(TRANSCODER_D); > enum pipe pipe; > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index aacc10f2e73f..bf4f1a7968c5 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -864,7 +864,8 @@ static const struct intel_device_info jsl_info = { > .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \ > .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \ > BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \ > - BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \ > + BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1)| \ > + BIT(TRANSCODER_WD_0), \ > .display.pipe_offsets = { \ > [TRANSCODER_A] = PIPE_A_OFFSET, \ > [TRANSCODER_B] = PIPE_B_OFFSET, \ > @@ -872,6 +873,8 @@ static const struct intel_device_info jsl_info = { > [TRANSCODER_D] = PIPE_D_OFFSET, \ > [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \ > [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \ > + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \ > + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \ > }, \ > .display.trans_offsets = { \ > [TRANSCODER_A] = TRANSCODER_A_OFFSET, \ > @@ -880,6 +883,8 @@ static const struct intel_device_info jsl_info = { > [TRANSCODER_D] = TRANSCODER_D_OFFSET, \ > [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \ > [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \ > + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \ > + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \ > }, \ > TGL_CURSOR_OFFSETS, \ > .has_global_mocs = 1, \ -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enabling Pipewriteback (rev3) 2022-08-04 8:28 [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback Suraj Kandpal 2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Define WD trancoder for i915 Suraj Kandpal 2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 2/2] drm/i915: Enabling WD Transcoder Suraj Kandpal @ 2022-08-04 8:46 ` Patchwork 2022-08-04 8:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2022-08-04 8:46 UTC (permalink / raw) To: Suraj Kandpal; +Cc: intel-gfx == Series Details == Series: Enabling Pipewriteback (rev3) URL : https://patchwork.freedesktop.org/series/106902/ State : warning == Summary == Error: dim checkpatch failed 10ad01a5c747 drm/i915: Define WD trancoder for i915 -:68: CHECK:LINE_SPACING: Please don't use multiple blank lines #68: FILE: drivers/gpu/drm/i915/i915_reg.h:3840: + + total: 0 errors, 0 warnings, 1 checks, 194 lines checked d9a8b33b6197 drm/i915: Enabling WD Transcoder Traceback (most recent call last): File "scripts/spdxcheck.py", line 11, in <module> import git ModuleNotFoundError: No module named 'git' Traceback (most recent call last): File "scripts/spdxcheck.py", line 11, in <module> import git ModuleNotFoundError: No module named 'git' Traceback (most recent call last): File "scripts/spdxcheck.py", line 11, in <module> import git ModuleNotFoundError: No module named 'git' -:115: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #115: FILE: drivers/gpu/drm/i915/display/intel_display.c:1560: +static void intel_queue_writeback_job(struct intel_atomic_state *state, + struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) -:133: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #133: FILE: drivers/gpu/drm/i915/display/intel_display.c:1578: +static void intel_find_writeback_connector(struct intel_atomic_state *state, + struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state) -:246: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #246: FILE: drivers/gpu/drm/i915/display/intel_display.h:484: +#define for_each_connector_on_encoder(dev, __encoder, drm_connector) \ + list_for_each_entry((drm_connector), &(dev)->mode_config.connector_list, head) \ + for_each_if(drm_connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK && \ + (to_intel_connector(drm_connector))->base.encoder == (__encoder)) -:246: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm_connector' - possible side-effects? #246: FILE: drivers/gpu/drm/i915/display/intel_display.h:484: +#define for_each_connector_on_encoder(dev, __encoder, drm_connector) \ + list_for_each_entry((drm_connector), &(dev)->mode_config.connector_list, head) \ + for_each_if(drm_connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK && \ + (to_intel_connector(drm_connector))->base.encoder == (__encoder)) -:350: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #350: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:2097: + + } -:494: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #494: FILE: drivers/gpu/drm/i915/display/intel_modeset_setup.c:573: + drm_dbg_kms(&i915->drm, + "[CONNECTOR:%d:%s] hw state readout: %s\n", -:501: CHECK:LINE_SPACING: Please don't use multiple blank lines #501: FILE: drivers/gpu/drm/i915/display/intel_modeset_setup.c:580: + + -:565: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #565: new file mode 100644 -:586: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #586: FILE: drivers/gpu/drm/i915/display/intel_wb_connector.h:17: +void intel_wb_connector_attach_encoder(struct intel_wb_connector *connector, + struct intel_encoder *encoder); -:650: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #650: FILE: drivers/gpu/drm/i915/display/intel_wd.c:55: + job = list_first_entry_or_null(&wb_conn->job_queue, + struct drm_writeback_job, -:653: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!job" #653: FILE: drivers/gpu/drm/i915/display/intel_wd.c:58: + if (job == NULL) { -:692: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #692: FILE: drivers/gpu/drm/i915/display/intel_wd.c:97: + DRM_ERROR("unsupported pixel format %x!\n", + pixel_format); -:712: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #712: FILE: drivers/gpu/drm/i915/display/intel_wd.c:117: +static u32 intel_wd_get_stride(const struct intel_crtc_state *crtc_state, + int format) -:738: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #738: FILE: drivers/gpu/drm/i915/display/intel_wd.c:143: +static int intel_wd_pin_fb(struct intel_wd *intel_wd, + struct drm_framebuffer *fb) -:746: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #746: FILE: drivers/gpu/drm/i915/display/intel_wd.c:151: + vma = intel_pin_and_fence_fb_obj(fb, false, &view, false, + &intel_wd->flags); -:756: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #756: FILE: drivers/gpu/drm/i915/display/intel_wd.c:161: +static void intel_configure_slicing_strategy(struct drm_i915_private *dev_priv, + struct intel_wd *intel_wd, u32 *tmp) -:769: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #769: FILE: drivers/gpu/drm/i915/display/intel_wd.c:174: + intel_de_write(dev_priv, WD_STREAMCAP_CTL(intel_wd->trans), + *tmp); -:771: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #771: FILE: drivers/gpu/drm/i915/display/intel_wd.c:176: + +} -:775: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #775: FILE: drivers/gpu/drm/i915/display/intel_wd.c:180: +intel_wd_mode_valid(struct drm_connector *connector, + struct drm_display_mode *mode) -:787: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #787: FILE: drivers/gpu/drm/i915/display/intel_wd.c:192: +static void intel_wd_get_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config) -:794: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #794: FILE: drivers/gpu/drm/i915/display/intel_wd.c:199: + memcpy(pipe_config, intel_crtc->config, + sizeof(*pipe_config)); -:798: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #798: FILE: drivers/gpu/drm/i915/display/intel_wd.c:203: + +} -:801: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #801: FILE: drivers/gpu/drm/i915/display/intel_wd.c:206: +static int intel_wd_compute_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config, -:817: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #817: FILE: drivers/gpu/drm/i915/display/intel_wd.c:222: +static void intel_wd_get_power_domains(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state) -:824: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #824: FILE: drivers/gpu/drm/i915/display/intel_wd.c:229: + wakeref = intel_display_power_get(dev_priv, + encoder->power_domain); -:830: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #830: FILE: drivers/gpu/drm/i915/display/intel_wd.c:235: +static bool intel_wd_get_hw_state(struct intel_encoder *encoder, + enum pipe *pipe) -:843: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #843: FILE: drivers/gpu/drm/i915/display/intel_wd.c:248: + wakeref = intel_display_power_get_if_enabled(dev_priv, + encoder->power_domain); -:860: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #860: FILE: drivers/gpu/drm/i915/display/intel_wd.c:265: + +} -:863: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #863: FILE: drivers/gpu/drm/i915/display/intel_wd.c:268: +static int intel_wd_encoder_atomic_check(struct drm_encoder *encoder, + struct drm_crtc_state *crtc_st, -:889: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #889: FILE: drivers/gpu/drm/i915/display/intel_wd.c:294: + drm_dbg_kms(&dev_priv->drm, "Invalid framebuffer size %ux%u\n", + fb->width, fb->height); -:897: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #897: FILE: drivers/gpu/drm/i915/display/intel_wd.c:302: + drm_dbg_kms(&dev_priv->drm, "Unsupported framebuffer format %08x\n", + fb->format->format); -:904: CHECK:LINE_SPACING: Please don't use multiple blank lines #904: FILE: drivers/gpu/drm/i915/display/intel_wd.c:309: + + -:941: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #941: FILE: drivers/gpu/drm/i915/display/intel_wd.c:346: +static bool intel_fastset_dis(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config) -:985: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #985: FILE: drivers/gpu/drm/i915/display/intel_wd.c:390: + drm_encoder_helper_add(drm_enc, + &wd_encoder_helper_funcs); -:995: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #995: FILE: drivers/gpu/drm/i915/display/intel_wd.c:400: + drm_dbg_kms(&dev_priv->drm, + "Writeback drm_encoder init Failed: %d\n", -:1001: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1001: FILE: drivers/gpu/drm/i915/display/intel_wd.c:406: + err = drm_writeback_connector_init_with_encoder(&dev_priv->drm, + wb_conn, drm_enc, &wd_connector_funcs, -:1006: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1006: FILE: drivers/gpu/drm/i915/display/intel_wd.c:411: + drm_dbg_kms(&dev_priv->drm, + "drm_writeback_connector_init: Failed: %d\n", -:1019: WARNING:RETURN_VOID: void function return statements are not generally useful #1019: FILE: drivers/gpu/drm/i915/display/intel_wd.c:424: + return; +} -:1022: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1022: FILE: drivers/gpu/drm/i915/display/intel_wd.c:427: +static void intel_wd_writeback_complete(struct intel_wd *intel_wd, + struct drm_writeback_job *job, int status) -:1030: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1030: FILE: drivers/gpu/drm/i915/display/intel_wd.c:435: +static int intel_wd_setup_transcoder(struct intel_wd *intel_wd, + struct intel_crtc_state *pipe_config, -:1064: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1064: FILE: drivers/gpu/drm/i915/display/intel_wd.c:469: + intel_de_write(dev_priv, WD_SURF(intel_wd->trans), + i915_ggtt_offset(intel_wd->vma)); -:1069: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #1069: FILE: drivers/gpu/drm/i915/display/intel_wd.c:474: + tmp = ~(WD_GTT_FAULT_INT|WD_WRITE_COMPLETE_INT|WD_FRAME_COMPLETE_INT| ^ -:1069: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #1069: FILE: drivers/gpu/drm/i915/display/intel_wd.c:474: + tmp = ~(WD_GTT_FAULT_INT|WD_WRITE_COMPLETE_INT|WD_FRAME_COMPLETE_INT| ^ -:1069: CHECK:SPACING: space preferred before that '|' (ctx:VxE) #1069: FILE: drivers/gpu/drm/i915/display/intel_wd.c:474: + tmp = ~(WD_GTT_FAULT_INT|WD_WRITE_COMPLETE_INT|WD_FRAME_COMPLETE_INT| ^ -:1070: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #1070: FILE: drivers/gpu/drm/i915/display/intel_wd.c:475: + WD_VBLANK_INT|WD_OVERRUN_INT|WD_CAPTURING_INT); ^ -:1070: CHECK:SPACING: spaces preferred around that '|' (ctx:VxV) #1070: FILE: drivers/gpu/drm/i915/display/intel_wd.c:475: + WD_VBLANK_INT|WD_OVERRUN_INT|WD_CAPTURING_INT); ^ -:1075: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1075: FILE: drivers/gpu/drm/i915/display/intel_wd.c:480: + tmp = intel_de_read(dev_priv, + WD_STREAMCAP_CTL(intel_wd->trans)); -:1165: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1165: FILE: drivers/gpu/drm/i915/display/intel_wd.c:570: + if (intel_de_wait_for_set(dev_priv, PIPECONF(intel_wd->trans), + WD_TRANS_ACTIVE, 10)) -:1186: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1186: FILE: drivers/gpu/drm/i915/display/intel_wd.c:591: +static int intel_wd_capture(struct intel_wd *intel_wd, + struct intel_crtc_state *pipe_config, -:1200: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1200: FILE: drivers/gpu/drm/i915/display/intel_wd.c:605: + ret = intel_wd_setup_transcoder(intel_wd, pipe_config, + conn_state, job); -:1204: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1204: FILE: drivers/gpu/drm/i915/display/intel_wd.c:609: + drm_dbg_kms(&dev_priv->drm, + "WD transcoder setup not completed aborting capture\n"); -:1208: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!wd_crtc" #1208: FILE: drivers/gpu/drm/i915/display/intel_wd.c:613: + if (wd_crtc == NULL) { -:1214: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1214: FILE: drivers/gpu/drm/i915/display/intel_wd.c:619: + tmp = intel_de_read_fw(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans)); -:1219: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1219: FILE: drivers/gpu/drm/i915/display/intel_wd.c:624: + intel_de_write_fw(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); -:1222: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1222: FILE: drivers/gpu/drm/i915/display/intel_wd.c:627: + if (!intel_de_wait_for_set(dev_priv, WD_IIR(intel_wd->trans), + WD_FRAME_COMPLETE_INT, 100)){ -:1228: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1228: FILE: drivers/gpu/drm/i915/display/intel_wd.c:633: + tmp = intel_de_read(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans)); -:1231: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1231: FILE: drivers/gpu/drm/i915/display/intel_wd.c:636: + intel_de_write(dev_priv, + WD_TRANS_FUNC_CTL(intel_wd->trans), tmp); -:1237: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!intel_get_writeback_job_from_queue" #1237: FILE: drivers/gpu/drm/i915/display/intel_wd.c:642: + if (intel_get_writeback_job_from_queue(intel_wd) == NULL) -:1243: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1243: FILE: drivers/gpu/drm/i915/display/intel_wd.c:648: + drm_crtc_send_vblank_event(&wd_crtc->base, + wd_crtc->wd.e); -:1248: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1248: FILE: drivers/gpu/drm/i915/display/intel_wd.c:653: + DRM_ERROR("Event NULL! %p, %p\n", &dev_priv->drm, + wd_crtc); -:1252: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #1252: FILE: drivers/gpu/drm/i915/display/intel_wd.c:657: + +} -:1255: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1255: FILE: drivers/gpu/drm/i915/display/intel_wd.c:660: +void intel_wd_enable_capture(struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state) -:1265: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!job" #1265: FILE: drivers/gpu/drm/i915/display/intel_wd.c:670: + if (job == NULL) { -:1267: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1267: FILE: drivers/gpu/drm/i915/display/intel_wd.c:672: + drm_dbg_kms(&i915->drm, + "job queue is empty not capturing any frame\n"); -:1272: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1272: FILE: drivers/gpu/drm/i915/display/intel_wd.c:677: + intel_wd_capture(intel_wd, pipe_config, + conn_state, job); -:1275: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #1275: FILE: drivers/gpu/drm/i915/display/intel_wd.c:680: + +} -:1278: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1278: FILE: drivers/gpu/drm/i915/display/intel_wd.c:683: +void intel_wd_set_vblank_event(struct intel_crtc *intel_crtc, + struct intel_crtc_state *intel_crtc_state) -:1286: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #1286: FILE: drivers/gpu/drm/i915/display/intel_wd.c:691: + for_each_intel_encoder(&dev_priv->drm, encoder) { + -:1301: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #1301: FILE: drivers/gpu/drm/i915/display/intel_wd.c:706: +} +void intel_wd_handle_isr(struct drm_i915_private *dev_priv) -:1311: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #1311: FILE: drivers/gpu/drm/i915/display/intel_wd.c:716: + for_each_intel_encoder(&dev_priv->drm, encoder) { + -:1406: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1406: FILE: drivers/gpu/drm/i915/display/intel_wd.h:72: +void intel_wd_enable_capture(struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state); -:1409: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1409: FILE: drivers/gpu/drm/i915/display/intel_wd.h:75: +void intel_wd_set_vblank_event(struct intel_crtc *crtc, + struct intel_crtc_state *state); -:1466: CHECK:SPACING: spaces preferred around that '|' (ctx:VxE) #1466: FILE: drivers/gpu/drm/i915/i915_pci.c:867: + BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1)| \ ^ total: 1 errors, 2 warnings, 70 checks, 1352 lines checked ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enabling Pipewriteback (rev3) 2022-08-04 8:28 [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback Suraj Kandpal ` (2 preceding siblings ...) 2022-08-04 8:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enabling Pipewriteback (rev3) Patchwork @ 2022-08-04 8:46 ` Patchwork 2022-08-04 9:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-08-04 11:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2022-08-04 8:46 UTC (permalink / raw) To: Suraj Kandpal; +Cc: intel-gfx == Series Details == Series: Enabling Pipewriteback (rev3) URL : https://patchwork.freedesktop.org/series/106902/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Enabling Pipewriteback (rev3) 2022-08-04 8:28 [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback Suraj Kandpal ` (3 preceding siblings ...) 2022-08-04 8:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork @ 2022-08-04 9:08 ` Patchwork 2022-08-04 11:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2022-08-04 9:08 UTC (permalink / raw) To: Suraj Kandpal; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 7983 bytes --] == Series Details == Series: Enabling Pipewriteback (rev3) URL : https://patchwork.freedesktop.org/series/106902/ State : success == Summary == CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106902v3 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/index.html Participating hosts (41 -> 40) ------------------------------ Additional (3): bat-rpls-1 fi-tgl-dsi bat-jsl-3 Missing (4): fi-kbl-soraka fi-hsw-4770 fi-rkl-11600 bat-dg1-5 Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_106902v3: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@i915_module_load@load: - {fi-tgl-dsi}: NOTRUN -> [DMESG-WARN][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-tgl-dsi/igt@i915_module_load@load.html Known issues ------------ Here are the changes found in Patchwork_106902v3 that come from known issues: ### CI changes ### #### Possible fixes #### * boot: - fi-kbl-8809g: [FAIL][2] -> [PASS][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/fi-kbl-8809g/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-kbl-8809g/boot.html ### IGT changes ### #### Issues hit #### * igt@gem_huc_copy@huc-copy: - fi-kbl-8809g: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-kbl-8809g: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-kbl-8809g/igt@gem_lmem_swapping@parallel-random-engines.html * igt@i915_pm_backlight@basic-brightness: - fi-kbl-8809g: NOTRUN -> [SKIP][6] ([fdo#109271]) +26 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-kbl-8809g/igt@i915_pm_backlight@basic-brightness.html * igt@i915_selftest@live@execlists: - fi-bsw-kefka: [PASS][7] -> [INCOMPLETE][8] ([i915#2940]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/fi-bsw-kefka/igt@i915_selftest@live@execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-bsw-kefka/igt@i915_selftest@live@execlists.html * igt@i915_selftest@live@hangcheck: - bat-dg1-6: [PASS][9] -> [DMESG-FAIL][10] ([i915#4494] / [i915#4957]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/bat-dg1-6/igt@i915_selftest@live@hangcheck.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/bat-dg1-6/igt@i915_selftest@live@hangcheck.html * igt@i915_selftest@live@requests: - fi-blb-e6850: [PASS][11] -> [DMESG-FAIL][12] ([i915#4528]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/fi-blb-e6850/igt@i915_selftest@live@requests.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-blb-e6850/igt@i915_selftest@live@requests.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-pnv-d510: NOTRUN -> [SKIP][13] ([fdo#109271]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-pnv-d510/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@dp-hpd-fast: - fi-kbl-8809g: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-kbl-8809g/igt@kms_chamelium@dp-hpd-fast.html * igt@runner@aborted: - fi-bsw-kefka: NOTRUN -> [FAIL][15] ([fdo#109271] / [i915#4312]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-bsw-kefka/igt@runner@aborted.html #### Possible fixes #### * igt@fbdev@read: - {bat-rpls-2}: [SKIP][16] ([i915#2582]) -> [PASS][17] +4 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/bat-rpls-2/igt@fbdev@read.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/bat-rpls-2/igt@fbdev@read.html * igt@i915_selftest@live@requests: - fi-pnv-d510: [DMESG-FAIL][18] ([i915#4528]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/fi-pnv-d510/igt@i915_selftest@live@requests.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/fi-pnv-d510/igt@i915_selftest@live@requests.html * igt@kms_frontbuffer_tracking@basic: - {bat-rpls-2}: [SKIP][20] ([i915#1849]) -> [PASS][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/bat-rpls-2/igt@kms_frontbuffer_tracking@basic.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/bat-rpls-2/igt@kms_frontbuffer_tracking@basic.html * igt@prime_vgem@basic-fence-flip: - {bat-rpls-2}: [SKIP][22] ([fdo#109295] / [i915#1845] / [i915#3708]) -> [PASS][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/bat-rpls-2/igt@prime_vgem@basic-fence-flip.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/bat-rpls-2/igt@prime_vgem@basic-fence-flip.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867 [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940 [i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494 [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957 [i915#5153]: https://gitlab.freedesktop.org/drm/intel/issues/5153 [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257 [i915#5950]: https://gitlab.freedesktop.org/drm/intel/issues/5950 Build changes ------------- * Linux: CI_DRM_11966 -> Patchwork_106902v3 CI-20190529: 20190529 CI_DRM_11966: f3c1d1b53388aaa69e20a1b72f8307ad57116565 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6613: 209230467200f2fa63a6f71fe6299996470dd813 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_106902v3: f3c1d1b53388aaa69e20a1b72f8307ad57116565 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits bb9c9d5ee93a drm/i915: Enabling WD Transcoder 39f116e53615 drm/i915: Define WD trancoder for i915 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/index.html [-- Attachment #2: Type: text/html, Size: 8482 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Enabling Pipewriteback (rev3) 2022-08-04 8:28 [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback Suraj Kandpal ` (4 preceding siblings ...) 2022-08-04 9:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2022-08-04 11:11 ` Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2022-08-04 11:11 UTC (permalink / raw) To: Suraj Kandpal; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 44595 bytes --] == Series Details == Series: Enabling Pipewriteback (rev3) URL : https://patchwork.freedesktop.org/series/106902/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11966_full -> Patchwork_106902v3_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_106902v3_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_106902v3_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (10 -> 12) ------------------------------ Additional (2): shard-rkl shard-tglu Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_106902v3_full: ### IGT changes ### #### Possible regressions #### * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_rc_ccs_cc: - shard-tglb: [PASS][1] -> [DMESG-WARN][2] +11 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb5/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb1/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html * igt@kms_flip@blocking-absolute-wf_vblank@b-edp1: - shard-tglb: [PASS][3] -> [DMESG-FAIL][4] +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb5/igt@kms_flip@blocking-absolute-wf_vblank@b-edp1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb1/igt@kms_flip@blocking-absolute-wf_vblank@b-edp1.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: - shard-tglb: [PASS][5] -> [TIMEOUT][6] +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb3/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html * igt@kms_rmfb@close-fd@pipe-b-edp-1: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb3/igt@kms_rmfb@close-fd@pipe-b-edp-1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb7/igt@kms_rmfb@close-fd@pipe-b-edp-1.html #### Warnings #### * igt@kms_plane_scaling@plane-scaler-with-rotation-unity-scaling@pipe-b-edp-1: - shard-tglb: [SKIP][9] ([i915#5176]) -> [INCOMPLETE][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb5/igt@kms_plane_scaling@plane-scaler-with-rotation-unity-scaling@pipe-b-edp-1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb3/igt@kms_plane_scaling@plane-scaler-with-rotation-unity-scaling@pipe-b-edp-1.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@core_hotunplug@unbind-rebind: - {shard-tglu}: NOTRUN -> [DMESG-WARN][11] +4 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglu-3/igt@core_hotunplug@unbind-rebind.html * igt@gem_ppgtt@blt-vs-render-ctxn: - {shard-rkl}: NOTRUN -> [INCOMPLETE][12] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-rkl-5/igt@gem_ppgtt@blt-vs-render-ctxn.html * igt@i915_suspend@basic-s3-without-i915: - {shard-tglu}: NOTRUN -> [INCOMPLETE][13] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglu-1/igt@i915_suspend@basic-s3-without-i915.html Known issues ------------ Here are the changes found in Patchwork_106902v3_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_exec@basic-nohangcheck: - shard-tglb: [PASS][14] -> [FAIL][15] ([i915#6268]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb1/igt@gem_ctx_exec@basic-nohangcheck.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb2/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_exec_balancer@parallel-contexts: - shard-iclb: [PASS][16] -> [SKIP][17] ([i915#4525]) +2 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb2/igt@gem_exec_balancer@parallel-contexts.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb8/igt@gem_exec_balancer@parallel-contexts.html * igt@gem_exec_fair@basic-deadline: - shard-glk: NOTRUN -> [FAIL][18] ([i915#2846]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk5/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][19] -> [FAIL][20] ([i915#2842]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-glk: [PASS][21] -> [FAIL][22] ([i915#2842]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-glk7/igt@gem_exec_fair@basic-pace@vcs0.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk6/igt@gem_exec_fair@basic-pace@vcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [PASS][23] -> [FAIL][24] ([i915#2849]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_lmem_swapping@heavy-verify-multi-ccs: - shard-glk: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#4613]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk5/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html * igt@gem_lmem_swapping@heavy-verify-random-ccs: - shard-skl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#4613]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl9/igt@gem_lmem_swapping@heavy-verify-random-ccs.html * igt@gem_lmem_swapping@smem-oom: - shard-apl: NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#4613]) +1 similar issue [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@gem_lmem_swapping@smem-oom.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#3323]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@gem_userptr_blits@dmabuf-sync.html - shard-kbl: NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#3323]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][30] -> [DMESG-WARN][31] ([i915#180]) +6 similar issues [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@gem_workarounds@suspend-resume-fd.html * igt@i915_pm_rpm@system-suspend-execbuf: - shard-apl: [PASS][32] -> [DMESG-WARN][33] ([i915#62]) +2 similar issues [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-apl6/igt@i915_pm_rpm@system-suspend-execbuf.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl1/igt@i915_pm_rpm@system-suspend-execbuf.html * igt@i915_selftest@mock@sanitycheck: - shard-tglb: [PASS][34] -> [SKIP][35] ([i915#3555]) +2 similar issues [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb7/igt@i915_selftest@mock@sanitycheck.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb2/igt@i915_selftest@mock@sanitycheck.html * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1: - shard-skl: [PASS][36] -> [FAIL][37] ([i915#2521]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl7/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1.html * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc: - shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886]) +3 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +3 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs: - shard-kbl: NOTRUN -> [SKIP][40] ([fdo#109271]) +45 similar issues [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_rc_ccs.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc: - shard-glk: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +4 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk5/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-d-crc-primary-rotation-180-yf_tiled_ccs: - shard-skl: NOTRUN -> [SKIP][42] ([fdo#109271]) +71 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl9/igt@kms_ccs@pipe-d-crc-primary-rotation-180-yf_tiled_ccs.html * igt@kms_chamelium@dp-crc-single: - shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +11 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@kms_chamelium@dp-crc-single.html * igt@kms_chamelium@hdmi-aspect-ratio: - shard-glk: NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +1 similar issue [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk5/igt@kms_chamelium@hdmi-aspect-ratio.html * igt@kms_chamelium@hdmi-crc-multiple: - shard-skl: NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +5 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl9/igt@kms_chamelium@hdmi-crc-multiple.html * igt@kms_color_chamelium@pipe-a-gamma: - shard-kbl: NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +4 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@kms_color_chamelium@pipe-a-gamma.html * igt@kms_content_protection@uevent: - shard-apl: NOTRUN -> [FAIL][47] ([i915#2105]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl1/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1: - shard-skl: [PASS][48] -> [INCOMPLETE][49] ([i915#4939]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl6/igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl4/igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1.html * igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1: - shard-apl: [PASS][50] -> [DMESG-WARN][51] ([i915#180]) +2 similar issues [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-apl6/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl8/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html * igt@kms_cursor_legacy@flip-vs-cursor@toggle: - shard-iclb: [PASS][52] -> [FAIL][53] ([i915#2346]) +3 similar issues [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb8/igt@kms_cursor_legacy@flip-vs-cursor@toggle.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@toggle.html * igt@kms_fbcon_fbt@psr-suspend: - shard-skl: [PASS][54] -> [FAIL][55] ([i915#4767]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl6/igt@kms_fbcon_fbt@psr-suspend.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl6/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_flip@flip-vs-expired-vblank@b-dp1: - shard-kbl: [PASS][56] -> [FAIL][57] ([i915#79]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@kms_flip@flip-vs-expired-vblank@b-dp1.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@kms_flip@flip-vs-expired-vblank@b-dp1.html * igt@kms_flip@plain-flip-ts-check@c-edp1: - shard-skl: [PASS][58] -> [FAIL][59] ([i915#2122]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl4/igt@kms_flip@plain-flip-ts-check@c-edp1.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl9/igt@kms_flip@plain-flip-ts-check@c-edp1.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode: - shard-iclb: NOTRUN -> [SKIP][60] ([i915#2672]) +7 similar issues [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode: - shard-iclb: NOTRUN -> [SKIP][61] ([i915#3555]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite: - shard-glk: NOTRUN -> [SKIP][62] ([fdo#109271]) +42 similar issues [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render: - shard-skl: NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#1888]) +1 similar issue [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl9/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-apl: NOTRUN -> [FAIL][64] ([fdo#108145] / [i915#265]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl1/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb: - shard-apl: NOTRUN -> [FAIL][65] ([i915#265]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb: - shard-glk: NOTRUN -> [FAIL][66] ([i915#265]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk5/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: NOTRUN -> [FAIL][67] ([fdo#108145] / [i915#265]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_plane_alpha_blend@pipe-d-alpha-transparent-fb: - shard-apl: NOTRUN -> [SKIP][68] ([fdo#109271]) +135 similar issues [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl3/igt@kms_plane_alpha_blend@pipe-d-alpha-transparent-fb.html * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf: - shard-skl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#658]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl10/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html - shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#658]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl3/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb: - shard-kbl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#658]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][72] -> [SKIP][73] ([fdo#109441]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb8/igt@kms_psr@psr2_cursor_render.html * igt@kms_psr_stress_test@invalidate-primary-flip-overlay: - shard-tglb: [PASS][74] -> [SKIP][75] ([i915#5519]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html * igt@kms_vblank@pipe-b-accuracy-idle: - shard-glk: [PASS][76] -> [FAIL][77] ([i915#43]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-glk8/igt@kms_vblank@pipe-b-accuracy-idle.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk8/igt@kms_vblank@pipe-b-accuracy-idle.html * igt@kms_vblank@pipe-d-wait-idle: - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#533]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@kms_vblank@pipe-d-wait-idle.html - shard-kbl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#533]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@kms_vblank@pipe-d-wait-idle.html * igt@kms_writeback@writeback-check-output: - shard-apl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#2437]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl1/igt@kms_writeback@writeback-check-output.html * igt@sysfs_clients@fair-3: - shard-apl: NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#2994]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@sysfs_clients@fair-3.html * igt@sysfs_clients@sema-10: - shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#2994]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk5/igt@sysfs_clients@sema-10.html * igt@sysfs_clients@sema-50: - shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2994]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl7/igt@sysfs_clients@sema-50.html #### Possible fixes #### * igt@gem_exec_balancer@parallel-keep-submit-fence: - shard-iclb: [SKIP][84] ([i915#4525]) -> [PASS][85] +1 similar issue [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb5/igt@gem_exec_balancer@parallel-keep-submit-fence.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb1/igt@gem_exec_balancer@parallel-keep-submit-fence.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [FAIL][86] ([i915#2842]) -> [PASS][87] [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb4/igt@gem_exec_fair@basic-none-share@rcs0.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb6/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [FAIL][88] ([i915#2842]) -> [PASS][89] +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-kbl: [FAIL][90] ([i915#2842]) -> [PASS][91] +1 similar issue [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html * igt@gem_softpin@noreloc-s3: - shard-kbl: [DMESG-WARN][92] ([i915#180]) -> [PASS][93] [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@gem_softpin@noreloc-s3.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@gem_softpin@noreloc-s3.html * igt@gem_spin_batch@spin-each: - shard-skl: [FAIL][94] ([i915#2898]) -> [PASS][95] [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl3/igt@gem_spin_batch@spin-each.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl1/igt@gem_spin_batch@spin-each.html * igt@i915_pm_rpm@modeset-lpsp-stress: - shard-iclb: [DMESG-WARN][96] ([i915#6316]) -> [PASS][97] [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb2/igt@i915_pm_rpm@modeset-lpsp-stress.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb8/igt@i915_pm_rpm@modeset-lpsp-stress.html * igt@kms_async_flips@alternate-sync-async-flip@pipe-b-edp-1: - shard-skl: [FAIL][98] ([i915#2521]) -> [PASS][99] +1 similar issue [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl7/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-edp-1.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-edp-1.html * igt@kms_flip@flip-vs-expired-vblank@a-edp1: - shard-skl: [FAIL][100] ([i915#79]) -> [PASS][101] +1 similar issue [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html * igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1: - shard-skl: [FAIL][102] ([i915#2122]) -> [PASS][103] +1 similar issue [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl1/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl10/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html * igt@kms_invalid_mode@int-max-clock@dp-1-pipe-c: - shard-apl: [DMESG-WARN][104] ([i915#62]) -> [PASS][105] +12 similar issues [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-apl7/igt@kms_invalid_mode@int-max-clock@dp-1-pipe-c.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl1/igt@kms_invalid_mode@int-max-clock@dp-1-pipe-c.html * igt@kms_psr2_su@frontbuffer-xrgb8888: - shard-iclb: [SKIP][106] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][107] [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb4/igt@kms_psr2_su@frontbuffer-xrgb8888.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb2/igt@kms_psr2_su@frontbuffer-xrgb8888.html * igt@kms_psr@psr2_sprite_mmap_gtt: - shard-iclb: [SKIP][108] ([fdo#109441]) -> [PASS][109] +2 similar issues [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-tglb: [SKIP][110] ([i915#5519]) -> [PASS][111] [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-apl: [DMESG-WARN][112] ([i915#180]) -> [PASS][113] +4 similar issues [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-apl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@kms_vblank@pipe-b-query-forked: - shard-skl: [DMESG-WARN][114] ([i915#1982]) -> [PASS][115] [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl10/igt@kms_vblank@pipe-b-query-forked.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl10/igt@kms_vblank@pipe-b-query-forked.html * igt@kms_writeback@writeback-pixel-formats: - shard-tglb: [SKIP][116] ([i915#2437]) -> [PASS][117] +1 similar issue [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb5/igt@kms_writeback@writeback-pixel-formats.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb1/igt@kms_writeback@writeback-pixel-formats.html #### Warnings #### * igt@gem_eio@kms: - shard-tglb: [TIMEOUT][118] ([i915#3063]) -> [FAIL][119] ([i915#5784]) [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb5/igt@gem_eio@kms.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb1/igt@gem_eio@kms.html * igt@gem_exec_balancer@parallel-ordering: - shard-iclb: [FAIL][120] ([i915#6117]) -> [SKIP][121] ([i915#4525]) [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb4/igt@gem_exec_balancer@parallel-ordering.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb6/igt@gem_exec_balancer@parallel-ordering.html * igt@i915_selftest@mock@vma: - shard-skl: [INCOMPLETE][122] ([i915#6473] / [i915#6509]) -> [INCOMPLETE][123] ([i915#6473]) [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-skl1/igt@i915_selftest@mock@vma.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-skl10/igt@i915_selftest@mock@vma.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-kbl: [INCOMPLETE][124] ([i915#180] / [i915#4939]) -> [FAIL][125] ([i915#4767]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1: - shard-kbl: [DMESG-WARN][126] ([i915#180]) -> [DMESG-FAIL][127] ([i915#180]) [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html * igt@kms_psr2_sf@overlay-plane-move-continuous-sf: - shard-iclb: [SKIP][128] ([i915#2920]) -> [SKIP][129] ([i915#658]) [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb6/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area: - shard-iclb: [SKIP][130] ([i915#2920]) -> [SKIP][131] ([fdo#111068] / [i915#658]) [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-iclb8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html * igt@kms_writeback@writeback-check-output: - shard-tglb: [SKIP][132] ([i915#2437]) -> [DMESG-FAIL][133] ([i915#1982]) [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb5/igt@kms_writeback@writeback-check-output.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb3/igt@kms_writeback@writeback-check-output.html * igt@runner@aborted: - shard-tglb: ([FAIL][134], [FAIL][135]) ([i915#3002] / [i915#4312] / [i915#5257]) -> ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147]) ([i915#1759] / [i915#3002] / [i915#3690] / [i915#4312] / [i915#5257]) [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb3/igt@runner@aborted.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-tglb3/igt@runner@aborted.html [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb3/igt@runner@aborted.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb2/igt@runner@aborted.html [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb7/igt@runner@aborted.html [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb2/igt@runner@aborted.html [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb2/igt@runner@aborted.html [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb7/igt@runner@aborted.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb7/igt@runner@aborted.html [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb2/igt@runner@aborted.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb7/igt@runner@aborted.html [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb1/igt@runner@aborted.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb7/igt@runner@aborted.html [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-tglb1/igt@runner@aborted.html - shard-kbl: ([FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#92]) -> ([FAIL][153], [FAIL][154], [FAIL][155], [FAIL][156], [FAIL][157], [FAIL][158], [FAIL][159], [FAIL][160]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257]) [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl1/igt@runner@aborted.html [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl1/igt@runner@aborted.html [150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@runner@aborted.html [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@runner@aborted.html [152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11966/shard-kbl7/igt@runner@aborted.html [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/shard-kbl7/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300 [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302 [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303 [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308 [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313 [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110254]: https://bugs.freedesktop.org/show_bug.cgi?id=110254 [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111314]: https://bugs.freedesktop.org/show_bug.cgi?id=111314 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644 [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155 [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257 [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722 [i915#1759]: https://gitlab.freedesktop.org/drm/intel/issues/1759 [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2105]: https://gitlab.freedesktop.org/drm/intel/issues/2105 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410 [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433 [i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435 [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#2898]: https://gitlab.freedesktop.org/drm/intel/issues/2898 [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994 [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002 [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012 [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063 [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323 [i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376 [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469 [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528 [i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742 [i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825 [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826 [i915#3828]: https://gitlab.freedesktop.org/drm/intel/issues/3828 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955 [i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966 [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989 [i915#4016]: https://gitlab.freedesktop.org/drm/intel/issues/4016 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#43]: https://gitlab.freedesktop.org/drm/intel/issues/43 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4369]: https://gitlab.freedesktop.org/drm/intel/issues/4369 [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387 [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767 [i915#4893]: https://gitlab.freedesktop.org/drm/intel/issues/4893 [i915#4939]: https://gitlab.freedesktop.org/drm/intel/issues/4939 [i915#4941]: https://gitlab.freedesktop.org/drm/intel/issues/4941 [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287 [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288 [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461 [i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519 [i915#5639]: https://gitlab.freedesktop.org/drm/intel/issues/5639 [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723 [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227 [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230 [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245 [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247 [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248 [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252 [i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301 [i915#6316]: https://gitlab.freedesktop.org/drm/intel/issues/6316 [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335 [i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344 [i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412 [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433 [i915#6473]: https://gitlab.freedesktop.org/drm/intel/issues/6473 [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497 [i915#6509]: https://gitlab.freedesktop.org/drm/intel/issues/6509 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#6527]: https://gitlab.freedesktop.org/drm/intel/issues/6527 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 Build changes ------------- * Linux: CI_DRM_11966 -> Patchwork_106902v3 CI-20190529: 20190529 CI_DRM_11966: f3c1d1b53388aaa69e20a1b72f8307ad57116565 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6613: 209230467200f2fa63a6f71fe6299996470dd813 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_106902v3: f3c1d1b53388aaa69e20a1b72f8307ad57116565 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106902v3/index.html [-- Attachment #2: Type: text/html, Size: 45176 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-08-10 8:56 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-08-04 8:28 [Intel-gfx] [PATCH v3 0/2] Enabling Pipewriteback Suraj Kandpal 2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Define WD trancoder for i915 Suraj Kandpal 2022-08-04 8:28 ` [Intel-gfx] [PATCH v3 2/2] drm/i915: Enabling WD Transcoder Suraj Kandpal 2022-08-10 8:56 ` Jani Nikula 2022-08-04 8:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enabling Pipewriteback (rev3) Patchwork 2022-08-04 8:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-08-04 9:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-08-04 11:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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