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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Andrzej Hajda <andrzej.hajda@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
	Andrzej Hajda <andrzej.hajda@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915: refactor intel_uncore_rmw
Date: Tue, 04 Oct 2022 10:27:05 +0300	[thread overview]
Message-ID: <87lepwujzq.fsf@intel.com> (raw)
In-Reply-To: <20221003223258.2650934-4-andrzej.hajda@intel.com>

On Tue, 04 Oct 2022, Andrzej Hajda <andrzej.hajda@intel.com> wrote:
> Two small changes in intel_uncore_rmw will allow to use it more broadly:
> - write register unconditionally, for use with latch registers,
> - return old value of the register, IRQ cleanup and similar.
>
> If we really want to keep write-only-if-changed feature maybe other
> helper will be more suitable for it, intel_uncore_rmw name suggests
> unconditional write.
>
> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>

Please fix the subject line to state "make intel_uncore_rmw() write
unconditionally" because that's what this change is, not
refactoring. IMO refactoring implies non-functional changes.

On the change,

Acked-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_uncore.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> index 7e1b3b89f68959..5449146a06247c 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.h
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -433,15 +433,15 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
>  #define intel_uncore_write64_fw(...) __raw_uncore_write64(__VA_ARGS__)
>  #define intel_uncore_posting_read_fw(...) ((void)intel_uncore_read_fw(__VA_ARGS__))
>  
> -static inline void intel_uncore_rmw(struct intel_uncore *uncore,
> -				    i915_reg_t reg, u32 clear, u32 set)
> +static inline u32 intel_uncore_rmw(struct intel_uncore *uncore,
> +				   i915_reg_t reg, u32 clear, u32 set)
>  {
>  	u32 old, val;
>  
>  	old = intel_uncore_read(uncore, reg);
>  	val = (old & ~clear) | set;
> -	if (val != old)
> -		intel_uncore_write(uncore, reg, val);
> +	intel_uncore_write(uncore, reg, val);
> +	return old;
>  }
>  
>  static inline void intel_uncore_rmw_fw(struct intel_uncore *uncore,

-- 
Jani Nikula, Intel Open Source Graphics Center

  parent reply	other threads:[~2022-10-04  7:27 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-03 22:32 [Intel-gfx] [PATCH 0/4] Simplify uncore register updates Andrzej Hajda
2022-10-03 22:32 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Use drm_device alias if defined Andrzej Hajda
2022-10-03 23:45   ` Andi Shyti
2022-10-04  7:59     ` Andrzej Hajda
2022-10-04  7:22   ` Jani Nikula
2022-10-04  7:31     ` Andrzej Hajda
2022-10-04  8:46       ` Jani Nikula
2022-10-04  9:50         ` Andi Shyti
2022-10-04 10:40           ` Jani Nikula
2022-10-03 22:32 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Use intel_uncore " Andrzej Hajda
2022-10-03 23:45   ` Andi Shyti
2022-10-03 22:32 ` [Intel-gfx] [PATCH 3/4] drm/i915: refactor intel_uncore_rmw Andrzej Hajda
2022-10-03 23:46   ` Andi Shyti
2022-10-04  7:27   ` Jani Nikula [this message]
2022-10-03 22:32 ` [Intel-gfx] [PATCH 4/4] drm/i915: use proper helper for register updates Andrzej Hajda
2022-10-03 23:44   ` Andi Shyti
2022-10-04  3:13   ` kernel test robot
2022-10-04  0:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Simplify uncore " Patchwork
2022-10-04  0:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-04  0:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-04  7:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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