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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/mst: Swap TRANSCONF vs. FECSTALL_DIS_DPTSTREAM_DPTTG disable
Date: Mon, 30 Oct 2023 14:38:31 +0200	[thread overview]
Message-ID: <87msw05lq0.fsf@intel.com> (raw)
In-Reply-To: <20231018154123.5479-2-ville.syrjala@linux.intel.com>

On Wed, 18 Oct 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The DP modeset sequence asks us to disable TRANSCONF before clearing
> the FECSTALL_DIS_DPTSTREAM_DPTTG bit, although we are still asked
> to wait for the transcoder to stop only after both steps have
> been done.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 28d85e1e858e..a994fc2319a3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -485,6 +485,8 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  	if (!IS_I830(dev_priv))
>  		val &= ~TRANSCONF_ENABLE;
>  
> +	intel_de_write(dev_priv, reg, val);
> +
>  	if (DISPLAY_VER(dev_priv) >= 14)
>  		intel_de_rmw(dev_priv, MTL_CHICKEN_TRANS(cpu_transcoder),
>  			     FECSTALL_DIS_DPTSTREAM_DPTTG, 0);
> @@ -492,7 +494,6 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  		intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder),
>  			     FECSTALL_DIS_DPTSTREAM_DPTTG, 0);
>  
> -	intel_de_write(dev_priv, reg, val);
>  	if ((val & TRANSCONF_ENABLE) == 0)
>  		intel_wait_for_pipe_off(old_crtc_state);
>  }

-- 
Jani Nikula, Intel

  reply	other threads:[~2023-10-30 12:38 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-18 15:41 [Intel-gfx] [PATCH 0/4] drm/i915/mst: MST modeset sequence fixes Ville Syrjala
2023-10-18 15:41 ` [Intel-gfx] [PATCH 1/4] drm/i915/mst: Swap TRANSCONF vs. FECSTALL_DIS_DPTSTREAM_DPTTG disable Ville Syrjala
2023-10-30 12:38   ` Jani Nikula [this message]
2023-10-18 15:41 ` [Intel-gfx] [PATCH 2/4] drm/i915/mst: Disable transcoder before deleting the payload Ville Syrjala
2023-10-30 12:42   ` Jani Nikula
2023-11-01 10:27   ` Ville Syrjälä
2023-10-18 15:41 ` [Intel-gfx] [PATCH 3/4] drm/i915/mst: Clear ACT just before triggering payload allocation Ville Syrjala
2023-10-30 12:44   ` Jani Nikula
2023-10-30 12:44   ` Jani Nikula
2023-10-18 15:41 ` [Intel-gfx] [PATCH 4/4] drm/i915/mst: Always write CHICKEN_TRANS Ville Syrjala
2023-10-30 12:45   ` Jani Nikula
2023-10-18 23:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/mst: MST modeset sequence fixes Patchwork
2023-10-18 23:42 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-24 13:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/mst: MST modeset sequence fixes (rev2) Patchwork
2023-10-24 13:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-24 22:57 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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