* [Intel-gfx] [PATCH] drm/i915/gt: Add error handling in intel_timeline_pin()
@ 2023-09-23 17:35 liuhaoran
0 siblings, 0 replies; 3+ messages in thread
From: liuhaoran @ 2023-09-23 17:35 UTC (permalink / raw)
To: airlied; +Cc: intel-gfx, liuhaoran, dri-devel, daniel
This patch adds error-handling for the i915_active_acquire()
inside the intel_timeline_pin().
Signed-off-by: liuhaoran <liuhaoran14@163.com>
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index b9640212d659..a2edf9233500 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -211,7 +211,11 @@ int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww)
GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
tl->fence_context, tl->hwsp_offset);
- i915_active_acquire(&tl->active);
+ err = i915_active_acquire(&tl->active);
+
+ if (err)
+ return err;
+
if (atomic_fetch_inc(&tl->pin_count)) {
i915_active_release(&tl->active);
__i915_vma_unpin(tl->hwsp_ggtt);
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/gt: Add error handling in intel_timeline_pin()
@ 2023-09-24 6:16 liuhaoran
2023-09-25 12:26 ` Jani Nikula
0 siblings, 1 reply; 3+ messages in thread
From: liuhaoran @ 2023-09-24 6:16 UTC (permalink / raw)
To: airlied; +Cc: intel-gfx, liuhaoran, dri-devel, daniel
This patch adds error-handling for the i915_active_acquire()
inside the intel_timeline_pin().
Signed-off-by: liuhaoran <liuhaoran14@163.com>
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index b9640212d659..a2edf9233500 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -211,7 +211,11 @@ int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww)
GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
tl->fence_context, tl->hwsp_offset);
- i915_active_acquire(&tl->active);
+ err = i915_active_acquire(&tl->active);
+
+ if (err)
+ return err;
+
if (atomic_fetch_inc(&tl->pin_count)) {
i915_active_release(&tl->active);
__i915_vma_unpin(tl->hwsp_ggtt);
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/gt: Add error handling in intel_timeline_pin()
2023-09-24 6:16 [Intel-gfx] [PATCH] drm/i915/gt: Add error handling in intel_timeline_pin() liuhaoran
@ 2023-09-25 12:26 ` Jani Nikula
0 siblings, 0 replies; 3+ messages in thread
From: Jani Nikula @ 2023-09-25 12:26 UTC (permalink / raw)
To: liuhaoran, airlied; +Cc: intel-gfx, liuhaoran, dri-devel
On Sun, 24 Sep 2023, liuhaoran <liuhaoran14@163.com> wrote:
> This patch adds error-handling for the i915_active_acquire()
> inside the intel_timeline_pin().
Seems to me this is not sufficient.
BR,
Jani.
>
> Signed-off-by: liuhaoran <liuhaoran14@163.com>
> ---
> drivers/gpu/drm/i915/gt/intel_timeline.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
> index b9640212d659..a2edf9233500 100644
> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
> @@ -211,7 +211,11 @@ int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww)
> GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
> tl->fence_context, tl->hwsp_offset);
>
> - i915_active_acquire(&tl->active);
> + err = i915_active_acquire(&tl->active);
> +
> + if (err)
> + return err;
> +
> if (atomic_fetch_inc(&tl->pin_count)) {
> i915_active_release(&tl->active);
> __i915_vma_unpin(tl->hwsp_ggtt);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-09-25 12:59 UTC | newest]
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2023-09-23 17:35 liuhaoran
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