public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 11/20] drm/i915/fbc: Move FBC debugfs stuff into intel_fbc.c
Date: Wed, 24 Nov 2021 17:43:52 +0200	[thread overview]
Message-ID: <87pmqplft3.fsf@intel.com> (raw)
In-Reply-To: <20211124113652.22090-12-ville.syrjala@linux.intel.com>

On Wed, 24 Nov 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> In order to encapsulate FBC harder let's just move the debugfs
> stuff into intel_fbc.c.

Mmmh, I've kind of moved towards a split where i915_debugfs.c and
intel_display_debugfs.c have all the debugfs boilerplate, while the
implementation files have the guts with struct drm_i915_private *i915
(or something more specific) and struct seq_file *m passed in.

In some ways the split is arbitrary, but I kind of find the debugfs
boilerplate a distraction in the implementation files, and we also skip
building the debugfs files completely for CONFIG_DEBUG_FS=n. I don't
think I'd want to add #ifdefs on that spread around either.


BR,
Jani.



>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../drm/i915/display/intel_display_debugfs.c  |  50 +-------
>  drivers/gpu/drm/i915/display/intel_fbc.c      | 110 +++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_fbc.h      |   4 +-
>  3 files changed, 82 insertions(+), 82 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 3e456e595010..572445299b04 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -40,52 +40,6 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
>  	return 0;
>  }
>  
> -static int i915_fbc_status(struct seq_file *m, void *unused)
> -{
> -	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> -	struct intel_fbc *fbc = &dev_priv->fbc;
> -	intel_wakeref_t wakeref;
> -
> -	if (!HAS_FBC(dev_priv))
> -		return -ENODEV;
> -
> -	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> -	mutex_lock(&fbc->lock);
> -
> -	if (intel_fbc_is_active(fbc)) {
> -		seq_puts(m, "FBC enabled\n");
> -		seq_printf(m, "Compressing: %s\n",
> -			   yesno(intel_fbc_is_compressing(fbc)));
> -	} else {
> -		seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
> -	}
> -
> -	mutex_unlock(&fbc->lock);
> -	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> -
> -	return 0;
> -}
> -
> -static int i915_fbc_false_color_get(void *data, u64 *val)
> -{
> -	struct drm_i915_private *dev_priv = data;
> -
> -	*val = dev_priv->fbc.false_color;
> -
> -	return 0;
> -}
> -
> -static int i915_fbc_false_color_set(void *data, u64 val)
> -{
> -	struct drm_i915_private *dev_priv = data;
> -
> -	return intel_fbc_set_false_color(&dev_priv->fbc, val);
> -}
> -
> -DEFINE_SIMPLE_ATTRIBUTE(i915_fbc_false_color_fops,
> -			i915_fbc_false_color_get, i915_fbc_false_color_set,
> -			"%llu\n");
> -
>  static int i915_ips_status(struct seq_file *m, void *unused)
>  {
>  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> @@ -2058,7 +2012,6 @@ static const struct file_operations i915_fifo_underrun_reset_ops = {
>  
>  static const struct drm_info_list intel_display_debugfs_list[] = {
>  	{"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
> -	{"i915_fbc_status", i915_fbc_status, 0},
>  	{"i915_ips_status", i915_ips_status, 0},
>  	{"i915_sr_status", i915_sr_status, 0},
>  	{"i915_opregion", i915_opregion, 0},
> @@ -2083,7 +2036,6 @@ static const struct {
>  	{"i915_pri_wm_latency", &i915_pri_wm_latency_fops},
>  	{"i915_spr_wm_latency", &i915_spr_wm_latency_fops},
>  	{"i915_cur_wm_latency", &i915_cur_wm_latency_fops},
> -	{"i915_fbc_false_color", &i915_fbc_false_color_fops},
>  	{"i915_dp_test_data", &i915_displayport_test_data_fops},
>  	{"i915_dp_test_type", &i915_displayport_test_type_fops},
>  	{"i915_dp_test_active", &i915_displayport_test_active_fops},
> @@ -2110,6 +2062,8 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)
>  	drm_debugfs_create_files(intel_display_debugfs_list,
>  				 ARRAY_SIZE(intel_display_debugfs_list),
>  				 minor->debugfs_root, minor);
> +
> +	intel_fbc_debugfs_register(i915);
>  }
>  
>  static int i915_panel_show(struct seq_file *m, void *data)
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 00c93040529e..ee4e3186cc9c 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -600,7 +600,7 @@ static void intel_fbc_hw_deactivate(struct intel_fbc *fbc)
>  	fbc->funcs->deactivate(fbc);
>  }
>  
> -bool intel_fbc_is_compressing(struct intel_fbc *fbc)
> +static bool intel_fbc_is_compressing(struct intel_fbc *fbc)
>  {
>  	return fbc->funcs->is_compressing(fbc);
>  }
> @@ -612,36 +612,6 @@ static void intel_fbc_nuke(struct intel_fbc *fbc)
>  	fbc->funcs->nuke(fbc);
>  }
>  
> -int intel_fbc_set_false_color(struct intel_fbc *fbc, bool enable)
> -{
> -	if (!fbc->funcs || !fbc->funcs->set_false_color)
> -		return -ENODEV;
> -
> -	mutex_lock(&fbc->lock);
> -
> -	fbc->false_color = enable;
> -
> -	fbc->funcs->set_false_color(fbc, enable);
> -
> -	mutex_unlock(&fbc->lock);
> -
> -	return 0;
> -}
> -
> -/**
> - * intel_fbc_is_active - Is FBC active?
> - * @fbc: The FBC instance
> - *
> - * This function is used to verify the current state of FBC.
> - *
> - * FIXME: This should be tracked in the plane config eventually
> - * instead of queried at runtime for most callers.
> - */
> -bool intel_fbc_is_active(struct intel_fbc *fbc)
> -{
> -	return fbc->active;
> -}
> -
>  static void intel_fbc_activate(struct intel_fbc *fbc)
>  {
>  	intel_fbc_hw_activate(fbc);
> @@ -1691,3 +1661,81 @@ void intel_fbc_init(struct drm_i915_private *i915)
>  	if (intel_fbc_hw_is_active(fbc))
>  		intel_fbc_hw_deactivate(fbc);
>  }
> +
> +static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
> +{
> +	struct intel_fbc *fbc = m->private;
> +	struct drm_i915_private *i915 = fbc->i915;
> +	intel_wakeref_t wakeref;
> +
> +	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +	mutex_lock(&fbc->lock);
> +
> +	if (fbc->active) {
> +		seq_puts(m, "FBC enabled\n");
> +		seq_printf(m, "Compressing: %s\n",
> +			   yesno(intel_fbc_is_compressing(fbc)));
> +	} else {
> +		seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
> +	}
> +
> +	mutex_unlock(&fbc->lock);
> +	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> +
> +	return 0;
> +}
> +
> +DEFINE_SHOW_ATTRIBUTE(intel_fbc_debugfs_status);
> +
> +static int intel_fbc_debugfs_false_color_get(void *data, u64 *val)
> +{
> +	struct intel_fbc *fbc = data;
> +
> +	*val = fbc->false_color;
> +
> +	return 0;
> +}
> +
> +static int intel_fbc_debugfs_false_color_set(void *data, u64 val)
> +{
> +	struct intel_fbc *fbc = data;
> +
> +	mutex_lock(&fbc->lock);
> +
> +	fbc->false_color = val;
> +
> +	if (fbc->active)
> +		fbc->funcs->set_false_color(fbc, fbc->false_color);
> +
> +	mutex_unlock(&fbc->lock);
> +
> +	return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(intel_fbc_debugfs_false_color_fops,
> +			intel_fbc_debugfs_false_color_get,
> +			intel_fbc_debugfs_false_color_set,
> +			"%llu\n");
> +
> +static void intel_fbc_debugfs_add(struct intel_fbc *fbc)
> +{
> +	struct drm_i915_private *i915 = fbc->i915;
> +	struct drm_minor *minor = i915->drm.primary;
> +
> +	debugfs_create_file("i915_fbc_status", 0444,
> +			    minor->debugfs_root, fbc,
> +			    &intel_fbc_debugfs_status_fops);
> +
> +	if (fbc->funcs->set_false_color)
> +		debugfs_create_file("i915_fbc_false_color", 0644,
> +				    minor->debugfs_root, fbc,
> +				    &intel_fbc_debugfs_false_color_fops);
> +}
> +
> +void intel_fbc_debugfs_register(struct drm_i915_private *i915)
> +{
> +	struct intel_fbc *fbc = &i915->fbc;
> +
> +	if (HAS_FBC(i915))
> +		intel_fbc_debugfs_add(fbc);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
> index 36e9e5f93bcb..0f5884f1e095 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -18,8 +18,6 @@ struct intel_fbc;
>  struct intel_plane_state;
>  
>  int intel_fbc_atomic_check(struct intel_atomic_state *state);
> -bool intel_fbc_is_active(struct intel_fbc *fbc);
> -bool intel_fbc_is_compressing(struct intel_fbc *fbc);
>  bool intel_fbc_pre_update(struct intel_atomic_state *state,
>  			  struct intel_crtc *crtc);
>  void intel_fbc_post_update(struct intel_atomic_state *state,
> @@ -37,6 +35,6 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv,
>  		     unsigned int frontbuffer_bits, enum fb_op_origin origin);
>  void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
>  void intel_fbc_reset_underrun(struct drm_i915_private *i915);
> -int intel_fbc_set_false_color(struct intel_fbc *fbc, bool enable);
> +void intel_fbc_debugfs_register(struct drm_i915_private *i915);
>  
>  #endif /* __INTEL_FBC_H__ */

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2021-11-24 15:43 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-24 11:36 [Intel-gfx] [PATCH 00/20] drm/i915/fbc: More FBC refactoring Ville Syrjala
2021-11-24 11:36 ` [Intel-gfx] [PATCH 01/20] drm/i915/fbc: Eliminate racy intel_fbc_is_active() usage Ville Syrjala
2021-11-30 13:16   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 02/20] drm/i915/fbc: Pass whole plane state to intel_fbc_min_limit() Ville Syrjala
2021-11-30 13:17   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 03/20] drm/i915/fbc: Nuke lots of crap from intel_fbc_state_cache Ville Syrjala
2021-11-30 13:21   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 04/20] drm/i915/fbc: Relocate intel_fbc_override_cfb_stride() Ville Syrjala
2021-11-30 13:22   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 05/20] drm/i915/fbc: Nuke more FBC state Ville Syrjala
2021-12-01  9:44   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 06/20] drm/i915/fbc: Reuse the same struct for the cache and params Ville Syrjala
2021-12-01 10:00   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 07/20] drm/i915/fbc: Pass around FBC instance instead of crtc Ville Syrjala
2021-12-01 10:03   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 08/20] drm/i915/fbc: Track FBC usage per-plane Ville Syrjala
2021-12-01 10:04   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 09/20] drm/i915/fbc: Flatten __intel_fbc_pre_update() Ville Syrjala
2021-12-01 10:04   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 10/20] drm/i915/fbc: Pass i915 instead of FBC instance to FBC underrun stuff Ville Syrjala
2021-12-01 10:08   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 11/20] drm/i915/fbc: Move FBC debugfs stuff into intel_fbc.c Ville Syrjala
2021-11-24 15:43   ` Jani Nikula [this message]
2021-11-25  9:43     ` Ville Syrjälä
2021-11-25 10:57       ` Jani Nikula
2021-11-25 12:13         ` Ville Syrjälä
2021-11-25 14:06           ` Tvrtko Ursulin
2021-11-25 14:27             ` Jani Nikula
2021-12-03  9:13               ` Ville Syrjälä
2021-12-03  9:55                 ` Jani Nikula
2021-12-03 10:06                   ` Ville Syrjälä
2021-12-03 10:47                     ` Jani Nikula
2021-11-24 11:36 ` [Intel-gfx] [PATCH 12/20] drm/i915/fbc: Introduce intel_fbc_add_plane() Ville Syrjala
2021-12-01 10:40   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 13/20] drm/i915/fbc: Allocate intel_fbc dynamically Ville Syrjala
2021-12-01 11:02   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 14/20] drm/i915/fbc: Move stuff from intel_fbc_can_enable() into intel_fbc_check_plane() Ville Syrjala
2021-12-01 11:03   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 15/20] drm/i915/fbc: Disable FBC fully on FIFO underrun Ville Syrjala
2021-12-01 11:04   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 16/20] drm/i915/fbc: Nuke state_cache Ville Syrjala
2021-12-01 11:06   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 17/20] drm/i915/fbc: Move plane pointer into intel_fbc_state Ville Syrjala
2021-12-01 11:30   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 18/20] drm/i915/fbc: s/parms/fbc_state/ Ville Syrjala
2021-12-01 11:31   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 19/20] drm/i915/fbc: No FBC+double wide pipe Ville Syrjala
2021-12-01 11:32   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 20/20] drm/i915/fbc: Pimp the FBC debugfs output Ville Syrjala
2021-12-03 11:48   ` Ville Syrjälä
2021-12-03 16:11     ` Jani Nikula
2021-11-24 13:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: More FBC refactoring Patchwork
2021-11-24 13:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-24 14:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-11-24 15:48 ` [Intel-gfx] [PATCH 00/20] " Jani Nikula
2021-11-26  6:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: More FBC refactoring (rev2) Patchwork
2021-11-26  6:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-26  7:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-26  9:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-11-28  6:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: More FBC refactoring (rev3) Patchwork
2021-11-28  6:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-28  6:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-28  8:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87pmqplft3.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox