public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Kahola, Mika" <mika.kahola@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 12/20] drm/i915/fbc: Introduce intel_fbc_add_plane()
Date: Wed, 1 Dec 2021 10:40:41 +0000	[thread overview]
Message-ID: <986244c79b5e45cbb83eca38c3a3aa41@intel.com> (raw)
In-Reply-To: <20211124113652.22090-13-ville.syrjala@linux.intel.com>

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Wednesday, November 24, 2021 1:37 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 12/20] drm/i915/fbc: Introduce
> intel_fbc_add_plane()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> In order to better encapsulate the FBC implementation introduce a small helper
> to do the plane<->FBC instance association.
> 
> We'll also try to structure the plane init code such that introducing multiple FBC
> instances will be easier down the line.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> ---
>  drivers/gpu/drm/i915/display/i9xx_plane.c         | 15 +++++++++++----
>  drivers/gpu/drm/i915/display/intel_fbc.c          |  9 +++++++++
>  drivers/gpu/drm/i915/display/intel_fbc.h          |  2 ++
>  .../gpu/drm/i915/display/skl_universal_plane.c    | 15 +++++++++++----
>  4 files changed, 33 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c
> b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index 2194f74101ae..84f50c90728f 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -13,6 +13,7 @@
>  #include "intel_de.h"
>  #include "intel_display_types.h"
>  #include "intel_fb.h"
> +#include "intel_fbc.h"
>  #include "intel_sprite.h"
>  #include "i9xx_plane.h"
> 
> @@ -120,6 +121,15 @@ static bool i9xx_plane_has_fbc(struct
> drm_i915_private *dev_priv,
>  		return i9xx_plane == PLANE_A;
>  }
> 
> +static struct intel_fbc *i9xx_plane_fbc(struct drm_i915_private *dev_priv,
> +					enum i9xx_plane_id i9xx_plane)
> +{
> +	if (i9xx_plane_has_fbc(dev_priv, i9xx_plane))
> +		return &dev_priv->fbc;
> +	else
> +		return NULL;
> +}
> +
>  static bool i9xx_plane_has_windowing(struct intel_plane *plane)  {
>  	struct drm_i915_private *dev_priv = to_i915(plane->base.dev); @@ -
> 807,10 +817,7 @@ intel_primary_plane_create(struct drm_i915_private
> *dev_priv, enum pipe pipe)
>  	plane->id = PLANE_PRIMARY;
>  	plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);
> 
> -	if (i9xx_plane_has_fbc(dev_priv, plane->i9xx_plane))
> -		plane->fbc = &dev_priv->fbc;
> -	if (plane->fbc)
> -		plane->fbc->possible_framebuffer_bits |= plane-
> >frontbuffer_bit;
> +	intel_fbc_add_plane(i9xx_plane_fbc(dev_priv, plane->i9xx_plane),
> +plane);
> 
>  	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>  		formats = vlv_primary_formats;
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index ee4e3186cc9c..9be8e7dcaab6 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1612,6 +1612,15 @@ static bool need_fbc_vtd_wa(struct
> drm_i915_private *i915)
>  	return false;
>  }
> 
> +void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane
> +*plane) {
> +	if (!fbc)
> +		return;
> +
> +	plane->fbc = fbc;
> +	fbc->possible_framebuffer_bits |= plane->frontbuffer_bit; }
> +
>  /**
>   * intel_fbc_init - Initialize FBC
>   * @i915: the i915 device
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h
> b/drivers/gpu/drm/i915/display/intel_fbc.h
> index 0f5884f1e095..b8d9cda85cfc 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -15,6 +15,7 @@ struct intel_atomic_state;  struct intel_crtc;  struct
> intel_crtc_state;  struct intel_fbc;
> +struct intel_plane;
>  struct intel_plane_state;
> 
>  int intel_fbc_atomic_check(struct intel_atomic_state *state); @@ -33,6 +34,7
> @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
>  			  enum fb_op_origin origin);
>  void intel_fbc_flush(struct drm_i915_private *dev_priv,
>  		     unsigned int frontbuffer_bits, enum fb_op_origin origin);
> +void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane
> +*plane);
>  void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);  void
> intel_fbc_reset_underrun(struct drm_i915_private *i915);  void
> intel_fbc_debugfs_register(struct drm_i915_private *i915); diff --git
> a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 28890876bdeb..22ec6901ee30 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -13,6 +13,7 @@
>  #include "intel_de.h"
>  #include "intel_display_types.h"
>  #include "intel_fb.h"
> +#include "intel_fbc.h"
>  #include "intel_pm.h"
>  #include "intel_psr.h"
>  #include "intel_sprite.h"
> @@ -1815,6 +1816,15 @@ static bool skl_plane_has_fbc(struct
> drm_i915_private *dev_priv,
>  	return pipe == PIPE_A && plane_id == PLANE_PRIMARY;  }
> 
> +static struct intel_fbc *skl_plane_fbc(struct drm_i915_private *dev_priv,
> +				       enum pipe pipe, enum plane_id plane_id) {
> +	if (skl_plane_has_fbc(dev_priv, pipe, plane_id))
> +		return &dev_priv->fbc;
> +	else
> +		return NULL;
> +}
> +
>  static bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
>  				 enum pipe pipe, enum plane_id plane_id)  {
> @@ -2101,10 +2111,7 @@ skl_universal_plane_create(struct drm_i915_private
> *dev_priv,
>  	plane->id = plane_id;
>  	plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id);
> 
> -	if (skl_plane_has_fbc(dev_priv, pipe, plane_id))
> -		plane->fbc = &dev_priv->fbc;
> -	if (plane->fbc)
> -		plane->fbc->possible_framebuffer_bits |= plane-
> >frontbuffer_bit;
> +	intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane);
> 
>  	if (DISPLAY_VER(dev_priv) >= 11) {
>  		plane->min_width = icl_plane_min_width;
> --
> 2.32.0


  reply	other threads:[~2021-12-01 10:40 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-24 11:36 [Intel-gfx] [PATCH 00/20] drm/i915/fbc: More FBC refactoring Ville Syrjala
2021-11-24 11:36 ` [Intel-gfx] [PATCH 01/20] drm/i915/fbc: Eliminate racy intel_fbc_is_active() usage Ville Syrjala
2021-11-30 13:16   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 02/20] drm/i915/fbc: Pass whole plane state to intel_fbc_min_limit() Ville Syrjala
2021-11-30 13:17   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 03/20] drm/i915/fbc: Nuke lots of crap from intel_fbc_state_cache Ville Syrjala
2021-11-30 13:21   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 04/20] drm/i915/fbc: Relocate intel_fbc_override_cfb_stride() Ville Syrjala
2021-11-30 13:22   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 05/20] drm/i915/fbc: Nuke more FBC state Ville Syrjala
2021-12-01  9:44   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 06/20] drm/i915/fbc: Reuse the same struct for the cache and params Ville Syrjala
2021-12-01 10:00   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 07/20] drm/i915/fbc: Pass around FBC instance instead of crtc Ville Syrjala
2021-12-01 10:03   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 08/20] drm/i915/fbc: Track FBC usage per-plane Ville Syrjala
2021-12-01 10:04   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 09/20] drm/i915/fbc: Flatten __intel_fbc_pre_update() Ville Syrjala
2021-12-01 10:04   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 10/20] drm/i915/fbc: Pass i915 instead of FBC instance to FBC underrun stuff Ville Syrjala
2021-12-01 10:08   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 11/20] drm/i915/fbc: Move FBC debugfs stuff into intel_fbc.c Ville Syrjala
2021-11-24 15:43   ` Jani Nikula
2021-11-25  9:43     ` Ville Syrjälä
2021-11-25 10:57       ` Jani Nikula
2021-11-25 12:13         ` Ville Syrjälä
2021-11-25 14:06           ` Tvrtko Ursulin
2021-11-25 14:27             ` Jani Nikula
2021-12-03  9:13               ` Ville Syrjälä
2021-12-03  9:55                 ` Jani Nikula
2021-12-03 10:06                   ` Ville Syrjälä
2021-12-03 10:47                     ` Jani Nikula
2021-11-24 11:36 ` [Intel-gfx] [PATCH 12/20] drm/i915/fbc: Introduce intel_fbc_add_plane() Ville Syrjala
2021-12-01 10:40   ` Kahola, Mika [this message]
2021-11-24 11:36 ` [Intel-gfx] [PATCH 13/20] drm/i915/fbc: Allocate intel_fbc dynamically Ville Syrjala
2021-12-01 11:02   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 14/20] drm/i915/fbc: Move stuff from intel_fbc_can_enable() into intel_fbc_check_plane() Ville Syrjala
2021-12-01 11:03   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 15/20] drm/i915/fbc: Disable FBC fully on FIFO underrun Ville Syrjala
2021-12-01 11:04   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 16/20] drm/i915/fbc: Nuke state_cache Ville Syrjala
2021-12-01 11:06   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 17/20] drm/i915/fbc: Move plane pointer into intel_fbc_state Ville Syrjala
2021-12-01 11:30   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 18/20] drm/i915/fbc: s/parms/fbc_state/ Ville Syrjala
2021-12-01 11:31   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 19/20] drm/i915/fbc: No FBC+double wide pipe Ville Syrjala
2021-12-01 11:32   ` Kahola, Mika
2021-11-24 11:36 ` [Intel-gfx] [PATCH 20/20] drm/i915/fbc: Pimp the FBC debugfs output Ville Syrjala
2021-12-03 11:48   ` Ville Syrjälä
2021-12-03 16:11     ` Jani Nikula
2021-11-24 13:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: More FBC refactoring Patchwork
2021-11-24 13:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-24 14:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-11-24 15:48 ` [Intel-gfx] [PATCH 00/20] " Jani Nikula
2021-11-26  6:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: More FBC refactoring (rev2) Patchwork
2021-11-26  6:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-26  7:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-26  9:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-11-28  6:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: More FBC refactoring (rev3) Patchwork
2021-11-28  6:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-28  6:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-28  8:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=986244c79b5e45cbb83eca38c3a3aa41@intel.com \
    --to=mika.kahola@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox