From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 24/27] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
Date: Tue, 12 Nov 2019 16:13:56 +0200 [thread overview]
Message-ID: <87pnhx41y3.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20191112092854.869-24-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Be consistent in our mocs setup on Tigerlake and set the unused control
> value to follow the PTE entry as we previously have done. The unused
> values are beyond the defines of the ABI, the consistency simplifies our
> checking.
Simplifies how?
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 6e881c735b20..d2b445d6c258 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -489,7 +489,7 @@ static void intel_mocs_init_global(struct intel_gt *gt)
> for (; index < table.n_entries; index++)
> intel_uncore_write(uncore,
> GEN12_GLOBAL_MOCS(index),
> - table.table[0].control_value);
> + table.table[I915_MOCS_PTE].control_value);
This sets it point into reserved, so I am confused.
Also the comment above and the part in generic MOCS tables will
be stale.
-Mika
> }
>
> void intel_mocs_init(struct intel_gt *gt)
> --
> 2.24.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 24/27] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
Date: Tue, 12 Nov 2019 16:13:56 +0200 [thread overview]
Message-ID: <87pnhx41y3.fsf@gaia.fi.intel.com> (raw)
Message-ID: <20191112141356.sPa9rb3c4kc4Z_VqyeNKY1tF3Z2YwIdt68xD5GruM0U@z> (raw)
In-Reply-To: <20191112092854.869-24-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Be consistent in our mocs setup on Tigerlake and set the unused control
> value to follow the PTE entry as we previously have done. The unused
> values are beyond the defines of the ABI, the consistency simplifies our
> checking.
Simplifies how?
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 6e881c735b20..d2b445d6c258 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -489,7 +489,7 @@ static void intel_mocs_init_global(struct intel_gt *gt)
> for (; index < table.n_entries; index++)
> intel_uncore_write(uncore,
> GEN12_GLOBAL_MOCS(index),
> - table.table[0].control_value);
> + table.table[I915_MOCS_PTE].control_value);
This sets it point into reserved, so I am confused.
Also the comment above and the part in generic MOCS tables will
be stale.
-Mika
> }
>
> void intel_mocs_init(struct intel_gt *gt)
> --
> 2.24.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-12 14:14 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 9:28 [PATCH 01/27] drm/i915: Flush context free work on cleanup Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 02/27] drm/i915/gt: Try an extra flush on the Haswell blitter Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 03/27] drm/i915/gem: Silence sparse for RCU protection inside the constructor Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 04/27] drm/i915/selftests: Mock the engine sorting for easy validation Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 05/27] Revert "drm/i915: use a separate context for gpu relocs" Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 06/27] drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 07/27] drm/i915: Drop GEM context as a direct link from i915_request Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 08/27] drm/i915: Push the use-semaphore marker onto the intel_context Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 09/27] drm/i915: Remove i915->kernel_context Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 10/27] drm/i915: Move i915_gem_init_contexts() earlier Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 11/27] drm/i915/uc: Use an internal buffer for firmware images Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 12/27] drm/i915/gt: Pull GT initialisation under intel_gt_init() Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 13/27] drm/i915/gt: Merge engine init/setup loops Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 14/27] drm/i915/gt: Expose engine properties via sysfs Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 15/27] drm/i915/gt: Expose engine->mmio_base " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-21 13:18 ` Lionel Landwerlin
2019-11-21 13:18 ` [Intel-gfx] " Lionel Landwerlin
2019-11-21 13:23 ` Chris Wilson
2019-11-21 13:23 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 16/27] drm/i915/gt: Expose timeslice duration to sysfs Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 17/27] drm/i915/gt: Expose busywait " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 18/27] drm/i915/gt: Expose reset stop timeout via sysfs Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 19/27] drm/i915/gt: Expose preempt reset " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 20/27] drm/i915/gt: Expose heartbeat interval " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 21/27] drm/i915: Flush idle barriers when waiting Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 22/27] drm/i915: Allow userspace to specify ringsize on construction Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 23/27] drm/i915/gem: Honour O_NONBLOCK before throttling execbuf submissions Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 24/27] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 14:13 ` Mika Kuoppala [this message]
2019-11-12 14:13 ` Mika Kuoppala
2019-11-12 14:39 ` Chris Wilson
2019-11-12 14:39 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 25/27] drm/i915/gt: Tidy up debug-warns for the mocs control table Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 26/27] drm/i915/gt: Refactor mocs loops into single control macro Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 17:02 ` Mika Kuoppala
2019-11-12 17:02 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 18:12 ` Chris Wilson
2019-11-12 18:12 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 27/27] drm/i915/selftests: Add coverage of mocs registers Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/27] drm/i915: Flush context free work on cleanup Patchwork
2019-11-12 10:12 ` [Intel-gfx] " Patchwork
2019-11-12 10:23 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-12 10:23 ` [Intel-gfx] " Patchwork
2019-11-12 10:33 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-11-12 10:33 ` [Intel-gfx] " Patchwork
2019-11-12 14:23 ` [PATCH 01/27] " Mika Kuoppala
2019-11-12 14:23 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 14:39 ` Chris Wilson
2019-11-12 14:39 ` [Intel-gfx] " Chris Wilson
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