[PATCH 0/6] HPD support during suspend.

[PATCH 0/6] HPD support during suspend.

[Animesh Manna]

Along with below patches sharing some background details/design.
- On BXT, Display cannot generate an interrupt when in D3.
- Without display in D3, S0ix can be achieved, Power impact
will be zero if d3 is blocked. PMCSR for Graphics/Display
is irrelevant, as the power management for them is taken
care by the PUNIT using RC6/DC9 hints and *not* through
PMCSR write trigger.

So solution is based on below principles:
- Display should not be put into D3 for HPD to work.
- With D0+DC9 we can achieve S0ix and at the same time
helps to get the interrupt.
- Using pci_save_state() during suspend to take control
from OSPM and blocking D3, while resuming, giving back
to OSPM by pci_restore_state(). 
- _DSM method is used to program pmc hpd control register
to enable hpd during suspend.

Please have a look and send your comments/suggestions.

Animesh Manna (6):
  drm/i915/bxt: VBT changes for hpd as wakeup feature
  drm/i915/bxt: Added _DSM call to set HPD_CTL.
  drm/i915/bxt: Corrected the guid for bxt.
  drm/i915/bxt: Block D3 during suspend.
  drm/i915: Enable HPD interrupts with master ctl interrupt
  drm/i915/bxt: Enable HPD during suspend.

 drivers/gpu/drm/i915/i915_drv.c       |  6 ++++
 drivers/gpu/drm/i915/i915_drv.h       |  8 +++++
 drivers/gpu/drm/i915/i915_irq.c       | 56 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/i915_reg.h       | 13 ++++++++
 drivers/gpu/drm/i915/intel_acpi.c     | 53 ++++++++++++++++++++++++++++-----
 drivers/gpu/drm/i915/intel_bios.c     |  7 +++++
 drivers/gpu/drm/i915/intel_vbt_defs.h |  3 +-
 7 files changed, 134 insertions(+), 12 deletions(-)

-- 
2.0.2

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[PATCH 1/6] drm/i915/bxt: VBT changes for hpd as wakeup feature

[Animesh Manna]

To support hpd during sleep a new feature flag is
added in vbt and also in dev_priv for enabling/disabling
inside deiver. By default this feature will be
diabled and based on oem request this feature can
be enabled by changing vbt feature flag.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       | 8 ++++++++
 drivers/gpu/drm/i915/i915_reg.h       | 1 +
 drivers/gpu/drm/i915/intel_vbt_defs.h | 3 ++-
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index dd18772..445b80b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1429,6 +1429,11 @@ enum psr_lines_to_wait {
 	PSR_8_LINES_TO_WAIT
 };
 
+enum hpd_wakeup_state {
+	DISABLE_HOT_PLUG_AS_WAKE_EVENT = 0,
+	ENABLE_HOT_PLUG_AS_WAKE_EVENT
+};
+
 struct intel_vbt_data {
 	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
 	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
@@ -1485,6 +1490,9 @@ struct intel_vbt_data {
 		const u8 *sequence[MIPI_SEQ_MAX];
 	} dsi;
 
+	/* HPD as wakesoure for DC9 BXT */
+	enum hpd_wakeup_state hpd_wakeup_enabled;
+
 	int crt_ddc_pin;
 
 	int child_dev_num;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 12f5103..cc42bd9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6119,6 +6119,7 @@ enum skl_disp_power_wells {
 				 SDE_PORTB_HOTPLUG |	\
 				 SDE_PORTC_HOTPLUG |	\
 				 SDE_PORTD_HOTPLUG)
+
 #define SDE_TRANSB_CRC_DONE	(1 << 5)
 #define SDE_TRANSB_CRC_ERR	(1 << 4)
 #define SDE_TRANSB_FIFO_UNDER	(1 << 3)
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 749dcea..8e2b765 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -547,7 +547,8 @@ struct bdb_driver_features {
 	u16 tbt_enabled:1;
 	u16 psr_enabled:1;
 	u16 ips_enabled:1;
-	u16 reserved3:4;
+	u16 reserved3:3;
+	u16 hpd_wakeup_source:1;
 	u16 pc_feature_valid:1;
 } __packed;
 
-- 
2.0.2

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[PATCH 2/6] drm/i915/bxt: Added _DSM call to set HPD_CTL.

[Animesh Manna]

_DSM is added to program HPD_CTL(0x1094) register
of PMC from i915 driver which will be called
based on driver feature flag. PMC hpd control register
programming will enable PMC to get hpd interrupt
during dc9.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/intel_acpi.c | 45 +++++++++++++++++++++++++++++++++------
 1 file changed, 38 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_acpi.c b/drivers/gpu/drm/i915/intel_acpi.c
index eb638a1..8f3d672 100644
--- a/drivers/gpu/drm/i915/intel_acpi.c
+++ b/drivers/gpu/drm/i915/intel_acpi.c
@@ -10,6 +10,8 @@
 
 #define INTEL_DSM_REVISION_ID 1 /* For Calpella anyway... */
 #define INTEL_DSM_FN_PLATFORM_MUX_INFO 1 /* No args */
+#define INTEL_DSM_SET_HPD_WAKEUP 17
+#define HPD_WAKEUP_EN_VAL 0xFCF0
 
 static struct intel_dsm_priv {
 	acpi_handle dhandle;
@@ -110,23 +112,52 @@ static void intel_dsm_platform_mux_info(void)
 	ACPI_FREE(pkg);
 }
 
+static void intel_dsm_set_hpd_wakeup(void)
+{
+	union acpi_object *obj;
+	union acpi_object argv4 = {
+		.integer.type = ACPI_TYPE_INTEGER,
+		.integer.value = HPD_WAKEUP_EN_VAL,
+	};
+
+	obj = acpi_evaluate_dsm_typed(intel_dsm_priv.dhandle, intel_dsm_guid,
+			INTEL_DSM_REVISION_ID, INTEL_DSM_SET_HPD_WAKEUP,
+			&argv4, ACPI_TYPE_INTEGER);
+
+	if (!obj)
+		DRM_DEBUG_DRIVER("failed to evaluate _DSM\n");
+
+	ACPI_FREE(obj);
+}
+
 static bool intel_dsm_pci_probe(struct pci_dev *pdev)
 {
 	acpi_handle dhandle;
+	struct drm_device *dev = pci_get_drvdata(pdev);
+	struct drm_i915_private *dev_priv = dev->dev_private;
 
 	dhandle = ACPI_HANDLE(&pdev->dev);
-	if (!dhandle)
-		return false;
 
-	if (!acpi_check_dsm(dhandle, intel_dsm_guid, INTEL_DSM_REVISION_ID,
-			    1 << INTEL_DSM_FN_PLATFORM_MUX_INFO)) {
-		DRM_DEBUG_KMS("no _DSM method for intel device\n");
+	if (!dhandle)
 		return false;
-	}
 
 	intel_dsm_priv.dhandle = dhandle;
-	intel_dsm_platform_mux_info();
 
+	if (acpi_check_dsm(dhandle, intel_dsm_guid, INTEL_DSM_REVISION_ID,
+			    1 << INTEL_DSM_FN_PLATFORM_MUX_INFO))
+		intel_dsm_platform_mux_info();
+	else
+		DRM_DEBUG_KMS("no _DSM method for mux-info\n");
+
+	/* Need to ensure vbt parsing is completed. */
+	if (dev_priv->vbt.hpd_wakeup_enabled &&
+		acpi_check_dsm(dhandle, intel_dsm_guid, INTEL_DSM_REVISION_ID,
+			    1 << INTEL_DSM_SET_HPD_WAKEUP))
+		intel_dsm_set_hpd_wakeup();
+	else {
+		dev_priv->vbt.hpd_wakeup_enabled = false;
+		DRM_DEBUG_KMS("no _DSM method for hpd-enabling\n");
+	}
 	return true;
 }
 
-- 
2.0.2

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[PATCH 3/6] drm/i915/bxt: Corrected the guid for bxt.

[Animesh Manna]

Guid is changed for bxt platform, so corrected the guid for bxt.

Signed-off-by: Ananth Krishna R <ananth.krishna.r@intel.com>
Signed-off-by: Bharath K Veera <bharath.k.veera@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/intel_acpi.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_acpi.c b/drivers/gpu/drm/i915/intel_acpi.c
index 8f3d672..79b774b 100644
--- a/drivers/gpu/drm/i915/intel_acpi.c
+++ b/drivers/gpu/drm/i915/intel_acpi.c
@@ -17,7 +17,7 @@ static struct intel_dsm_priv {
 	acpi_handle dhandle;
 } intel_dsm_priv;
 
-static const u8 intel_dsm_guid[] = {
+static u8 intel_dsm_guid[] = {
 	0xd3, 0x73, 0xd8, 0x7e,
 	0xd0, 0xc2,
 	0x4f, 0x4e,
@@ -25,6 +25,9 @@ static const u8 intel_dsm_guid[] = {
 	0x0f, 0x13, 0x17, 0xb0, 0x1c, 0x2c
 };
 
+static u8 intel_bxt_dsm_guid[] __initdata =
+		"3E5B41C6-EB1D-4260-9D15-C71FBADAE414";
+
 static char *intel_dsm_port_name(u8 id)
 {
 	switch (id) {
@@ -143,6 +146,9 @@ static bool intel_dsm_pci_probe(struct pci_dev *pdev)
 
 	intel_dsm_priv.dhandle = dhandle;
 
+	if (IS_BROXTON(dev))
+		acpi_str_to_uuid(intel_bxt_dsm_guid, intel_dsm_guid);
+
 	if (acpi_check_dsm(dhandle, intel_dsm_guid, INTEL_DSM_REVISION_ID,
 			    1 << INTEL_DSM_FN_PLATFORM_MUX_INFO))
 		intel_dsm_platform_mux_info();
-- 
2.0.2

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[PATCH 4/6] drm/i915/bxt: Block D3 during suspend.

[Animesh Manna]

For BXT, display engine can not generate interrupt when in D3.
On the othen hand S0ix can be achieved without display in D3. So,
Display should not put into D3 for HPD to work and will not
have any power impact.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 020a31c..6b8c906 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1547,6 +1547,9 @@ static int intel_runtime_suspend(struct device *device)
 
 	assert_forcewakes_inactive(dev_priv);
 
+	if (dev_priv->vbt.hpd_wakeup_enabled)
+		pci_save_state(pdev);
+
 	DRM_DEBUG_KMS("Device suspended\n");
 	return 0;
 }
@@ -1563,6 +1566,9 @@ static int intel_runtime_resume(struct device *device)
 
 	DRM_DEBUG_KMS("Resuming device\n");
 
+	if (dev_priv->vbt.hpd_wakeup_enabled)
+		pci_restore_state(pdev);
+
 	WARN_ON_ONCE(atomic_read(&dev_priv->pm.wakeref_count));
 	disable_rpm_wakeref_asserts(dev_priv);
 
-- 
2.0.2

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[PATCH 5/6] drm/i915: Enable HPD interrupts with master ctl interrupt

[Animesh Manna]

While suspending the device hpd related interrupts are enabled
to get the interrupt when device is in suspend state.

Though display is in DC9 but system can be in S0 or S0i3 state.
Hot plug during S0 state will generate de_port_interrupt but if
system is in S0i3 state then display driver will get hotplug
interrupt as pcu_hpd_interrupt which will come via pmc. So
added the interrupt handling for pcu hpd interrupt.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 56 ++++++++++++++++++++++++++++++++++++++---
 drivers/gpu/drm/i915/i915_reg.h | 12 +++++++++
 2 files changed, 65 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c85eb8d..35d7423 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -110,9 +110,9 @@ static const u32 hpd_status_i915[HPD_NUM_PINS] = {
 
 /* BXT hpd list */
 static const u32 hpd_bxt[HPD_NUM_PINS] = {
-	[HPD_PORT_A] = BXT_DE_PORT_HP_DDIA,
-	[HPD_PORT_B] = BXT_DE_PORT_HP_DDIB,
-	[HPD_PORT_C] = BXT_DE_PORT_HP_DDIC
+	[HPD_PORT_A] = (BXT_DE_PORT_HP_DDIA | BXT_PCU_DC9_HP_DDIA),
+	[HPD_PORT_B] = (BXT_DE_PORT_HP_DDIB | BXT_PCU_DC9_HP_DDIB),
+	[HPD_PORT_C] = (BXT_DE_PORT_HP_DDIC | BXT_PCU_DC9_HP_DDIC)
 };
 
 /* IIR can theoretically queue up two events. Be paranoid. */
@@ -2337,6 +2337,22 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
 			DRM_ERROR("The master control interrupt lied (DE PORT)!\n");
 	}
 
+	if (master_ctl & GEN8_PCU_IRQ) {
+		iir = I915_READ(GEN8_PCU_IIR);
+		if (iir) {
+			u32 tmp_mask;
+			I915_WRITE(GEN8_PCU_IIR, iir);
+			ret = IRQ_HANDLED;
+			if (IS_BROXTON(dev)) {
+				tmp_mask = iir & BXT_PCU_DC9_HOTPLUG_MASK;
+				if (tmp_mask)
+					bxt_hpd_irq_handler(dev, tmp_mask, hpd_bxt);
+			} else
+				DRM_ERROR("Unexpected PCU interrupt\n");
+		} else
+			DRM_ERROR("The master control interrupt lied (PCU)!\n");
+	}
+
 	for_each_pipe(dev_priv, pipe) {
 		u32 flip_done, fault_errors;
 
@@ -4681,6 +4697,19 @@ void intel_irq_uninstall(struct drm_i915_private *dev_priv)
 	dev_priv->pm.irqs_enabled = false;
 }
 
+static void bxt_enable_pcu_interrupt(struct drm_i915_private *dev_priv)
+{
+	u32 de_pcu_hpd_enable_mask, de_pcu_imr, de_pcu_ier;
+
+	de_pcu_hpd_enable_mask = GEN9_DE_PCU_PORTA_HOTPLUG |
+				GEN9_DE_PCU_PORTB_HOTPLUG |
+				GEN9_DE_PCU_PORTC_HOTPLUG;
+
+	de_pcu_imr = (I915_READ(GEN8_PCU_IMR) & 0x0);
+	de_pcu_ier = (I915_READ(GEN8_PCU_IER) | de_pcu_hpd_enable_mask);
+	GEN5_IRQ_INIT(GEN8_PCU_, de_pcu_imr, de_pcu_ier);
+}
+
 /**
  * intel_runtime_pm_disable_interrupts - runtime interrupt disabling
  * @dev_priv: i915 device instance
@@ -4690,8 +4719,29 @@ void intel_irq_uninstall(struct drm_i915_private *dev_priv)
  */
 void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv)
 {
+	struct drm_device *dev = dev_priv->dev;
+	unsigned long flags = 0;
+
 	dev_priv->dev->driver->irq_uninstall(dev_priv->dev);
 	dev_priv->pm.irqs_enabled = false;
+
+	if (IS_BROXTON(dev) && dev_priv->vbt.hpd_wakeup_enabled) {
+
+		/* Enable HPD related interrupts during DC9 for HPD wakeup */
+
+		I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
+		POSTING_READ(GEN8_MASTER_IRQ);
+
+		spin_lock_irqsave(&dev_priv->irq_lock, flags);
+		if (dev_priv->display.hpd_irq_setup)
+			dev_priv->display.hpd_irq_setup(dev_priv->dev);
+		spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
+
+		bxt_enable_pcu_interrupt(dev_priv);
+
+		dev_priv->pm.irqs_enabled = true;
+	}
+
 	synchronize_irq(dev_priv->dev->irq);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cc42bd9..15f9021 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5954,6 +5954,18 @@ enum skl_disp_power_wells {
 #define GEN8_PCU_IIR _MMIO(0x444e8)
 #define GEN8_PCU_IER _MMIO(0x444ec)
 
+/* BXT PCU DC9 hotplug control */
+#define BXT_PCU_DC9_HP_DDIA		(1<<31)
+#define BXT_PCU_DC9_HP_DDIB		(1<<30)
+#define BXT_PCU_DC9_HP_DDIC		(1<<29)
+#define BXT_PCU_DC9_HOTPLUG_MASK	(BXT_PCU_DC9_HP_DDIA | \
+					 BXT_PCU_DC9_HP_DDIB | \
+					 BXT_PCU_DC9_HP_DDIC)
+
+#define GEN9_DE_PCU_PORTA_HOTPLUG      (1 << 31)
+#define GEN9_DE_PCU_PORTB_HOTPLUG      (1 << 30)
+#define GEN9_DE_PCU_PORTC_HOTPLUG      (1 << 29)
+
 #define ILK_DISPLAY_CHICKEN2	_MMIO(0x42004)
 /* Required on all Ironlake and Sandybridge according to the B-Spec. */
 #define  ILK_ELPIN_409_SELECT	(1 << 25)
-- 
2.0.2

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[PATCH 6/6] drm/i915/bxt: Enable HPD during suspend.

[Animesh Manna]

Based on vbt entry enabling i915 driver to act on
hpd support during suspend.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 9c406b0..8ed084a 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -529,6 +529,13 @@ parse_driver_features(struct drm_i915_private *dev_priv,
 	if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
 		dev_priv->vbt.edp.support = 1;
 
+	if (driver->hpd_wakeup_source) {
+		dev_priv->vbt.hpd_wakeup_enabled =
+				ENABLE_HOT_PLUG_AS_WAKE_EVENT;
+		DRM_DEBUG_KMS("HPD as wakeup feature is enabled\n");
+	} else
+		DRM_DEBUG_KMS("HPD wakeup source feature is disabled in VBT\n");
+
 	DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
 	/*
 	 * If DRRS is not supported, drrs_type has to be set to 0.
-- 
2.0.2

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Re: [PATCH 1/6] drm/i915/bxt: VBT changes for hpd as wakeup feature

[Jani Nikula]

On Tue, 05 Apr 2016, Animesh Manna <animesh.manna@intel.com> wrote:
> To support hpd during sleep a new feature flag is
> added in vbt and also in dev_priv for enabling/disabling
> inside deiver. By default this feature will be
> diabled and based on oem request this feature can
> be enabled by changing vbt feature flag.
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h       | 8 ++++++++
>  drivers/gpu/drm/i915/i915_reg.h       | 1 +
>  drivers/gpu/drm/i915/intel_vbt_defs.h | 3 ++-
>  3 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index dd18772..445b80b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1429,6 +1429,11 @@ enum psr_lines_to_wait {
>  	PSR_8_LINES_TO_WAIT
>  };
>  
> +enum hpd_wakeup_state {
> +	DISABLE_HOT_PLUG_AS_WAKE_EVENT = 0,
> +	ENABLE_HOT_PLUG_AS_WAKE_EVENT
> +};

Any reason to use an enum when a bool will do? In fact, you use it as a
bool in the following patches.

> +
>  struct intel_vbt_data {
>  	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
>  	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
> @@ -1485,6 +1490,9 @@ struct intel_vbt_data {
>  		const u8 *sequence[MIPI_SEQ_MAX];
>  	} dsi;
>  
> +	/* HPD as wakesoure for DC9 BXT */
> +	enum hpd_wakeup_state hpd_wakeup_enabled;
> +

Why don't you initialize the field in this patch? Patch 6/6 should be
part of this patch.

>  	int crt_ddc_pin;
>  
>  	int child_dev_num;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 12f5103..cc42bd9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6119,6 +6119,7 @@ enum skl_disp_power_wells {
>  				 SDE_PORTB_HOTPLUG |	\
>  				 SDE_PORTC_HOTPLUG |	\
>  				 SDE_PORTD_HOTPLUG)
> +

Superfluous whitespace change.

>  #define SDE_TRANSB_CRC_DONE	(1 << 5)
>  #define SDE_TRANSB_CRC_ERR	(1 << 4)
>  #define SDE_TRANSB_FIFO_UNDER	(1 << 3)
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index 749dcea..8e2b765 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -547,7 +547,8 @@ struct bdb_driver_features {
>  	u16 tbt_enabled:1;
>  	u16 psr_enabled:1;
>  	u16 ips_enabled:1;
> -	u16 reserved3:4;
> +	u16 reserved3:3;
> +	u16 hpd_wakeup_source:1;
>  	u16 pc_feature_valid:1;
>  } __packed;

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 3/6] drm/i915/bxt: Corrected the guid for bxt.

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 1141 bytes --]

Hi Animesh,

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20160405]
[cannot apply to v4.6-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Animesh-Manna/HPD-support-during-suspend/20160405-204154
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-n0-201614 (attached as .config)
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All warnings (new ones prefixed by >>):

>> WARNING: drivers/gpu/built-in.o(.text+0x22ff8e): Section mismatch in reference from the function intel_dsm_detect() to the variable .init.data:intel_bxt_dsm_guid
   The function intel_dsm_detect() references
   the variable __initdata intel_bxt_dsm_guid.
   This is often because intel_dsm_detect lacks a __initdata
   annotation or the annotation of intel_bxt_dsm_guid is wrong.

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 24185 bytes --]

[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

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✗ Fi.CI.BAT: failure for HPD support during suspend.

[Patchwork]

== Series Details ==

Series: HPD support during suspend.
URL   : https://patchwork.freedesktop.org/series/5322/
State : failure

== Summary ==

Series 5322v1 HPD support during suspend.
http://patchwork.freedesktop.org/api/1.0/series/5322/revisions/1/mbox/

Test drv_getparams_basic:
        Subgroup basic-subslice-total:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test gem_ctx_exec:
        Subgroup basic:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test gem_ctx_param_basic:
        Subgroup basic:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup invalid-size-set:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup non-root-set-no-zeromap:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup root-set-no-zeromap-disabled:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test gem_exec_basic:
        Subgroup basic-blt:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-render:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup gtt-vebox:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup readonly-bsd:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup readonly-vebox:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_exec_store:
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-render:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_exec_suspend:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_exec_whisper:
        Subgroup basic:
                pass       -> DMESG-FAIL (bsw-nuc-2)
Test gem_mmap_gtt:
        Subgroup basic-copy:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup basic-short:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup basic-write-read:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup basic-write-read-distinct:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test gem_pwrite:
        Subgroup basic:
                pass       -> INCOMPLETE (bsw-nuc-2)
Test gem_storedw_loop:
        Subgroup basic-default:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_sync:
        Subgroup basic-blt:
                pass       -> SKIP       (bsw-nuc-2)
        Subgroup basic-each:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup basic-vebox:
                pass       -> SKIP       (bsw-nuc-2)
Test kms_addfb_basic:
        Subgroup addfb25-bad-modifier:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup addfb25-yf-tiled:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup bad-pitch-1024:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup basic:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup framebuffer-vs-set-tiling:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup size-max:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup small-bo:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup too-wide:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test kms_flip:
        Subgroup basic-flip-vs-wf_vblank:
                fail       -> PASS       (snb-x220t)
                pass       -> DMESG-FAIL (bsw-nuc-2)
        Subgroup basic-plain-flip:
                pass       -> DMESG-FAIL (bsw-nuc-2)
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-a:
                pass       -> DMESG-WARN (ilk-hp8440p)
Test prime_self_import:
        Subgroup basic-llseek-size:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup basic-with_fd_dup:
                pass       -> DMESG-WARN (bsw-nuc-2)

bdw-ultra        total:196  pass:175  dwarn:0   dfail:0   fail:0   skip:21 
bsw-nuc-2        total:113  pass:55   dwarn:21  dfail:3   fail:0   skip:33 
byt-nuc          total:196  pass:161  dwarn:0   dfail:0   fail:0   skip:35 
hsw-brixbox      total:196  pass:174  dwarn:0   dfail:0   fail:0   skip:22 
hsw-gt2          total:196  pass:179  dwarn:0   dfail:0   fail:0   skip:17 
ilk-hp8440p      total:196  pass:131  dwarn:1   dfail:0   fail:0   skip:64 
ivb-t430s        total:196  pass:171  dwarn:0   dfail:0   fail:0   skip:25 
skl-i7k-2        total:196  pass:173  dwarn:0   dfail:0   fail:0   skip:23 
skl-nuci5        total:196  pass:185  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:196  pass:162  dwarn:0   dfail:0   fail:0   skip:34 
snb-x220t        total:196  pass:162  dwarn:0   dfail:0   fail:1   skip:33 

Results at /archive/results/CI_IGT_test/Patchwork_1802/

48d2a0497cd1d0630fbb59fb7871e4d678458307 drm-intel-nightly: 2016y-04m-05d-12h-30m-42s UTC integration manifest
be31d0b4db8731ec0071b3e124cd9771669f1e21 drm/i915/bxt: Enable HPD during suspend.
a52dd11d4f8d6c2f319b6e29905a72b25a8b8207 drm/i915: Enable HPD interrupts with master ctl interrupt
51c98e9cf995ad4c2986b8ac81d0c06660bf43b7 drm/i915/bxt: Block D3 during suspend.
a5bb3bad5e567a7529f1e9367879abd0c882f84c drm/i915/bxt: Corrected the guid for bxt.
86688c95d5cbc86193f575f919b352df42c298ff drm/i915/bxt: Added _DSM call to set HPD_CTL.
527e066138396199650ad7eee68e83cb70f8a7c9 drm/i915/bxt: VBT changes for hpd as wakeup feature

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Re: [PATCH 1/6] drm/i915/bxt: VBT changes for hpd as wakeup feature

[Animesh Manna]

On 4/5/2016 7:29 PM, Jani Nikula wrote:
> On Tue, 05 Apr 2016, Animesh Manna <animesh.manna@intel.com> wrote:
>> To support hpd during sleep a new feature flag is
>> added in vbt and also in dev_priv for enabling/disabling
>> inside deiver. By default this feature will be
>> diabled and based on oem request this feature can
>> be enabled by changing vbt feature flag.
>>
>> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
>> Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h       | 8 ++++++++
>>   drivers/gpu/drm/i915/i915_reg.h       | 1 +
>>   drivers/gpu/drm/i915/intel_vbt_defs.h | 3 ++-
>>   3 files changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index dd18772..445b80b 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1429,6 +1429,11 @@ enum psr_lines_to_wait {
>>   	PSR_8_LINES_TO_WAIT
>>   };
>>   
>> +enum hpd_wakeup_state {
>> +	DISABLE_HOT_PLUG_AS_WAKE_EVENT = 0,
>> +	ENABLE_HOT_PLUG_AS_WAKE_EVENT
>> +};
> Any reason to use an enum when a bool will do? In fact, you use it as a
> bool in the following patches.

Thanks Jani for review.
Agree, previously we are using more than 2 state so used enum ... but after
design discussion concluded to have only two state and bool can be used
instead of enum. Will update in my next patchset.

>
>> +
>>   struct intel_vbt_data {
>>   	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
>>   	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
>> @@ -1485,6 +1490,9 @@ struct intel_vbt_data {
>>   		const u8 *sequence[MIPI_SEQ_MAX];
>>   	} dsi;
>>   
>> +	/* HPD as wakesoure for DC9 BXT */
>> +	enum hpd_wakeup_state hpd_wakeup_enabled;
>> +
> Why don't you initialize the field in this patch? Patch 6/6 should be
> part of this patch.

Don't want to enable this feature at the first place, bcoz subsequent patches
will have the actual feature implementation, but as we have vbt control we can
add here, will update in next patchset.

>
>>   	int crt_ddc_pin;
>>   
>>   	int child_dev_num;
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 12f5103..cc42bd9 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -6119,6 +6119,7 @@ enum skl_disp_power_wells {
>>   				 SDE_PORTB_HOTPLUG |	\
>>   				 SDE_PORTC_HOTPLUG |	\
>>   				 SDE_PORTD_HOTPLUG)
>> +
> Superfluous whitespace change.

Will correct it.

>
>>   #define SDE_TRANSB_CRC_DONE	(1 << 5)
>>   #define SDE_TRANSB_CRC_ERR	(1 << 4)
>>   #define SDE_TRANSB_FIFO_UNDER	(1 << 3)
>> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
>> index 749dcea..8e2b765 100644
>> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
>> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
>> @@ -547,7 +547,8 @@ struct bdb_driver_features {
>>   	u16 tbt_enabled:1;
>>   	u16 psr_enabled:1;
>>   	u16 ips_enabled:1;
>> -	u16 reserved3:4;
>> +	u16 reserved3:3;
>> +	u16 hpd_wakeup_source:1;
>>   	u16 pc_feature_valid:1;
>>   } __packed;

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