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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Anusha Srivatsa <anusha.srivatsa@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/rpl-s: Add PCH ID
Date: Mon, 15 Nov 2021 14:08:54 +0200	[thread overview]
Message-ID: <87r1bh1uzt.fsf@intel.com> (raw)
In-Reply-To: <20211112210825.1489596-3-anusha.srivatsa@intel.com>

On Fri, 12 Nov 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Add the PCH ID for the same.

The same as what? Please use use commit messages that are
self-contained.

>
> Cc: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pch.c | 1 +
>  drivers/gpu/drm/i915/intel_pch.h | 1 +
>  include/drm/i915_pciids.h        | 5 ++++-

Were the new PCI IDs supposed to be in the previous patch? If here, why
are they not mentioned in the commit message?

BR,
Jani.

>  3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
> index d1d4b97b86f5..da8f82c2342f 100644
> --- a/drivers/gpu/drm/i915/intel_pch.c
> +++ b/drivers/gpu/drm/i915/intel_pch.c
> @@ -129,6 +129,7 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
>  		return PCH_JSP;
>  	case INTEL_PCH_ADP_DEVICE_ID_TYPE:
>  	case INTEL_PCH_ADP2_DEVICE_ID_TYPE:
> +	case INTEL_PCH_ADP3_DEVICE_ID_TYPE:
>  		drm_dbg_kms(&dev_priv->drm, "Found Alder Lake PCH\n");
>  		drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) &&
>  			    !IS_ALDERLAKE_P(dev_priv));
> diff --git a/drivers/gpu/drm/i915/intel_pch.h b/drivers/gpu/drm/i915/intel_pch.h
> index 7c0d83d292dc..6bff77521094 100644
> --- a/drivers/gpu/drm/i915/intel_pch.h
> +++ b/drivers/gpu/drm/i915/intel_pch.h
> @@ -57,6 +57,7 @@ enum intel_pch {
>  #define INTEL_PCH_JSP2_DEVICE_ID_TYPE		0x3880
>  #define INTEL_PCH_ADP_DEVICE_ID_TYPE		0x7A80
>  #define INTEL_PCH_ADP2_DEVICE_ID_TYPE		0x5180
> +#define INTEL_PCH_ADP3_DEVICE_ID_TYPE		0x7A00
>  #define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
>  #define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
>  #define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 00deb011b74c..0e112f56a9a8 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -675,6 +675,9 @@
>  	INTEL_VGA_DEVICE(0xA788, info), \
>  	INTEL_VGA_DEVICE(0xA789, info), \
>  	INTEL_VGA_DEVICE(0xA78A, info), \
> -	INTEL_VGA_DEVICE(0xA78B, info)
> +	INTEL_VGA_DEVICE(0xA78B, info), \
> +	INTEL_VGA_DEVICE(0x4690, info), \
> +	INTEL_VGA_DEVICE(0x4692, info), \
> +	INTEL_VGA_DEVICE(0x4693, info)
>  
>  #endif /* _I915_PCIIDS_H */

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2021-11-15 12:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-12 21:08 [Intel-gfx] [PATCH 0/3] Introduce Raptor Lake S Anusha Srivatsa
2021-11-12 21:08 ` [Intel-gfx] [PATCH 1/3] drm/i915/rpl-s: Add PCI IDS Anusha Srivatsa
2021-11-15 12:06   ` Jani Nikula
2021-11-16 18:08     ` Srivatsa, Anusha
2021-11-15 12:20   ` Tvrtko Ursulin
2021-11-12 21:08 ` [Intel-gfx] [PATCH 2/3] drm/i915/rpl-s: Add PCH ID Anusha Srivatsa
2021-11-15 12:08   ` Jani Nikula [this message]
2021-11-16 18:08     ` Srivatsa, Anusha
2021-11-12 21:08 ` [Intel-gfx] [PATCH 3/3] drm/i915/rpl-s: Enable guc submission by default Anusha Srivatsa
2021-11-15 12:10   ` Jani Nikula
2021-11-16 18:07     ` Srivatsa, Anusha
2021-11-12 21:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Raptor Lake S Patchwork
2021-11-12 21:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-12 21:56 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-11-12 22:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-13  1:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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