Re: [PATCH] drm/i915/gen11: enable support for headerless msgs

[Mika Kuoppala <mika.kuoppala@linux.intel.com>]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> From: Dongwon Kim <dongwon.kim@intel.com>
>
> Setting bit5 (headerless msg for preemptable GPGPU context) of SAMPLER_MODE
> register to enable support for the headless msgs on gen11. None of existing
> use cases will be affected by this as this change makes both types of message
> - headerless and w/ header supported at the same time. It also complies with
> the new recommendation for the default bit value for the next gen.
>
> v2: rewrote commit message to include more information
> v3: setting the bit in icl_ctx_workarounds_init()
>
> Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
> Merely kicking CI.
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h             | 1 +
>  2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 364696221fd7..e03181aeb451 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -575,6 +575,10 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
>  	WA_SET_FIELD_MASKED(GEN8_CS_CHICKEN1,
>  			    GEN9_PREEMPT_GPGPU_LEVEL_MASK,
>  			    GEN9_PREEMPT_GPGPU_THREAD_GROUP_LEVEL);
> +
> +	/* allow headerless messages for preemptable GPGPU context */
> +	WA_SET_BIT_MASKED(GEN10_SAMPLER_MODE,
> +			  GEN11_SAMPLER_ENABLE_HEADLESS_MSG);
>  }
>  
>  void intel_engine_init_ctx_wa(struct intel_engine_cs *engine)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index b74824f0b5b1..b45042f71c0a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8862,6 +8862,7 @@ enum {
>  #define   GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC	(1 << 7)
>  
>  #define GEN10_SAMPLER_MODE		_MMIO(0xE18C)
> +#define   GEN11_SAMPLER_ENABLE_HEADLESS_MSG	(1 << 5)
>  
>  /* IVYBRIDGE DPF */
>  #define GEN7_L3CDERRST1(slice)		_MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */
> -- 
> 2.20.1
>
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