* [Intel-gfx] [RESEND] drm/i915/dp: use drm_dp_phy_name() for logging
@ 2022-09-12 13:23 Jani Nikula
2022-09-12 18:57 ` Andrzej Hajda
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jani Nikula @ 2022-09-12 13:23 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Drop the local intel_dp_phy_name() function, and replace with
drm_dp_phy_name(). This lets us drop a number of local buffers.
v2: Rebase
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> # v1
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../drm/i915/display/intel_dp_link_training.c | 83 ++++++++-----------
1 file changed, 36 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index d213d8ad1ea5..3d3efcf02011 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -37,17 +37,6 @@ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = 0;
}
-static const char *intel_dp_phy_name(enum drm_dp_phy dp_phy,
- char *buf, size_t buf_size)
-{
- if (dp_phy == DP_PHY_DPRX)
- snprintf(buf, buf_size, "DPRX");
- else
- snprintf(buf, buf_size, "LTTPR %d", dp_phy - DP_PHY_LTTPR1 + 1);
-
- return buf;
-}
-
static u8 *intel_dp_lttpr_phy_caps(struct intel_dp *intel_dp,
enum drm_dp_phy dp_phy)
{
@@ -60,20 +49,19 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp,
{
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy);
- char phy_name[10];
-
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dpcd, dp_phy, phy_caps) < 0) {
drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
"[ENCODER:%d:%s][%s] failed to read the PHY caps\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
return;
}
drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
"[ENCODER:%d:%s][%s] PHY capabilities: %*ph\n",
- encoder->base.base.id, encoder->base.name, phy_name,
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy),
(int)sizeof(intel_dp->lttpr_phy_caps[0]),
phy_caps);
}
@@ -423,14 +411,13 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
{
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
- char phy_name[10];
int lane;
if (intel_dp_is_uhbr(crtc_state)) {
drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, "
"TX FFE request: " TRAIN_REQ_FMT "\n",
encoder->base.base.id, encoder->base.name,
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
+ drm_dp_phy_name(dp_phy),
crtc_state->lane_count,
TRAIN_REQ_TX_FFE_ARGS(link_status));
} else {
@@ -438,7 +425,7 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
"vswing request: " TRAIN_REQ_FMT ", "
"pre-emphasis request: " TRAIN_REQ_FMT "\n",
encoder->base.base.id, encoder->base.name,
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
+ drm_dp_phy_name(dp_phy),
crtc_state->lane_count,
TRAIN_REQ_VSWING_ARGS(link_status),
TRAIN_REQ_PREEMPH_ARGS(link_status));
@@ -503,13 +490,12 @@ intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
u8 train_pat = intel_dp_training_pattern_symbol(dp_train_pat);
- char phy_name[10];
if (train_pat != DP_TRAINING_PATTERN_DISABLE)
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] Using DP training pattern TPS%c\n",
encoder->base.base.id, encoder->base.name,
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
+ drm_dp_phy_name(dp_phy),
dp_training_pattern_name(train_pat));
intel_dp->set_link_train(intel_dp, crtc_state, dp_train_pat);
@@ -546,13 +532,12 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
{
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
- char phy_name[10];
if (intel_dp_is_uhbr(crtc_state)) {
drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, "
"TX FFE presets: " TRAIN_SET_FMT "\n",
encoder->base.base.id, encoder->base.name,
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
+ drm_dp_phy_name(dp_phy),
crtc_state->lane_count,
TRAIN_SET_TX_FFE_ARGS(intel_dp->train_set));
} else {
@@ -560,7 +545,7 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
"vswing levels: " TRAIN_SET_FMT ", "
"pre-emphasis levels: " TRAIN_SET_FMT "\n",
encoder->base.base.id, encoder->base.name,
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
+ drm_dp_phy_name(dp_phy),
crtc_state->lane_count,
TRAIN_SET_VSWING_ARGS(intel_dp->train_set),
TRAIN_SET_PREEMPH_ARGS(intel_dp->train_set));
@@ -754,12 +739,11 @@ intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
{
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
- char phy_name[10];
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",
encoder->base.base.id, encoder->base.name,
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
+ drm_dp_phy_name(dp_phy),
link_status[0], link_status[1], link_status[2],
link_status[3], link_status[4], link_status[5]);
}
@@ -779,21 +763,19 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
int voltage_tries, cr_tries, max_cr_tries;
u8 link_status[DP_LINK_STATUS_SIZE];
bool max_vswing_reached = false;
- char phy_name[10];
int delay_us;
delay_us = drm_dp_read_clock_recovery_delay(&intel_dp->aux,
intel_dp->dpcd, dp_phy,
intel_dp_is_uhbr(crtc_state));
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
-
/* clock recovery */
if (!intel_dp_reset_link_train(intel_dp, crtc_state, dp_phy,
DP_TRAINING_PATTERN_1 |
DP_LINK_SCRAMBLING_DISABLE)) {
drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to enable link training\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
return false;
}
@@ -817,14 +799,16 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, dp_phy,
link_status) < 0) {
drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to get link status\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
return false;
}
if (drm_dp_clock_recovery_ok(link_status, crtc_state->lane_count)) {
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] Clock recovery OK\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
return true;
}
@@ -832,7 +816,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] Same voltage tried 5 times\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
return false;
}
@@ -840,7 +825,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] Max Voltage Swing reached\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
return false;
}
@@ -850,7 +836,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) {
drm_err(&i915->drm,
"[ENCODER:%d:%s][%s] Failed to update link training\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
return false;
}
@@ -868,7 +855,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
drm_err(&i915->drm,
"[ENCODER:%d:%s][%s] Failed clock recovery %d times, giving up!\n",
- encoder->base.base.id, encoder->base.name, phy_name, max_cr_tries);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy), max_cr_tries);
return false;
}
@@ -946,15 +934,12 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
u32 training_pattern;
u8 link_status[DP_LINK_STATUS_SIZE];
bool channel_eq = false;
- char phy_name[10];
int delay_us;
delay_us = drm_dp_read_channel_eq_delay(&intel_dp->aux,
intel_dp->dpcd, dp_phy,
intel_dp_is_uhbr(crtc_state));
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
-
training_pattern = intel_dp_training_pattern(intel_dp, crtc_state, dp_phy);
/* Scrambling is disabled for TPS2/3 and enabled for TPS4 */
if (training_pattern != DP_TRAINING_PATTERN_4)
@@ -966,7 +951,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
drm_err(&i915->drm,
"[ENCODER:%d:%s][%s] Failed to start channel equalization\n",
encoder->base.base.id, encoder->base.name,
- phy_name);
+ drm_dp_phy_name(dp_phy));
return false;
}
@@ -977,7 +962,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
link_status) < 0) {
drm_err(&i915->drm,
"[ENCODER:%d:%s][%s] Failed to get link status\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
break;
}
@@ -988,7 +974,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] Clock recovery check failed, cannot "
"continue channel equalization\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
break;
}
@@ -997,7 +984,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
channel_eq = true;
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] Channel EQ done. DP Training successful\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
break;
}
@@ -1007,7 +995,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) {
drm_err(&i915->drm,
"[ENCODER:%d:%s][%s] Failed to update link training\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
break;
}
}
@@ -1017,7 +1006,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s][%s] Channel equalization failed 5 times\n",
- encoder->base.base.id, encoder->base.name, phy_name);
+ encoder->base.base.id, encoder->base.name,
+ drm_dp_phy_name(dp_phy));
}
return channel_eq;
@@ -1092,7 +1082,6 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp,
{
struct intel_connector *connector = intel_dp->attached_connector;
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
- char phy_name[10];
bool ret = false;
if (!intel_dp_link_training_clock_recovery(intel_dp, crtc_state, dp_phy))
@@ -1108,7 +1097,7 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp,
"[CONNECTOR:%d:%s][ENCODER:%d:%s][%s] Link Training %s at link rate = %d, lane count = %d\n",
connector->base.base.id, connector->base.name,
encoder->base.base.id, encoder->base.name,
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
+ drm_dp_phy_name(dp_phy),
ret ? "passed" : "failed",
crtc_state->port_clock, crtc_state->lane_count);
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [RESEND] drm/i915/dp: use drm_dp_phy_name() for logging
2022-09-12 13:23 [Intel-gfx] [RESEND] drm/i915/dp: use drm_dp_phy_name() for logging Jani Nikula
@ 2022-09-12 18:57 ` Andrzej Hajda
2022-09-13 7:29 ` Jani Nikula
2022-09-12 22:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-09-13 5:51 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2 siblings, 1 reply; 5+ messages in thread
From: Andrzej Hajda @ 2022-09-12 18:57 UTC (permalink / raw)
To: Jani Nikula, intel-gfx
On 12.09.2022 15:23, Jani Nikula wrote:
> Drop the local intel_dp_phy_name() function, and replace with
> drm_dp_phy_name(). This lets us drop a number of local buffers.
>
> v2: Rebase
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> # v1
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Regards
Andrzej
> ---
> .../drm/i915/display/intel_dp_link_training.c | 83 ++++++++-----------
> 1 file changed, 36 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index d213d8ad1ea5..3d3efcf02011 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -37,17 +37,6 @@ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
> DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = 0;
> }
>
> -static const char *intel_dp_phy_name(enum drm_dp_phy dp_phy,
> - char *buf, size_t buf_size)
> -{
> - if (dp_phy == DP_PHY_DPRX)
> - snprintf(buf, buf_size, "DPRX");
> - else
> - snprintf(buf, buf_size, "LTTPR %d", dp_phy - DP_PHY_LTTPR1 + 1);
> -
> - return buf;
> -}
> -
> static u8 *intel_dp_lttpr_phy_caps(struct intel_dp *intel_dp,
> enum drm_dp_phy dp_phy)
> {
> @@ -60,20 +49,19 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp,
> {
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy);
> - char phy_name[10];
> -
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
>
> if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dpcd, dp_phy, phy_caps) < 0) {
> drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
> "[ENCODER:%d:%s][%s] failed to read the PHY caps\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> return;
> }
>
> drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
> "[ENCODER:%d:%s][%s] PHY capabilities: %*ph\n",
> - encoder->base.base.id, encoder->base.name, phy_name,
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy),
> (int)sizeof(intel_dp->lttpr_phy_caps[0]),
> phy_caps);
> }
> @@ -423,14 +411,13 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> {
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> - char phy_name[10];
> int lane;
>
> if (intel_dp_is_uhbr(crtc_state)) {
> drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, "
> "TX FFE request: " TRAIN_REQ_FMT "\n",
> encoder->base.base.id, encoder->base.name,
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
> + drm_dp_phy_name(dp_phy),
> crtc_state->lane_count,
> TRAIN_REQ_TX_FFE_ARGS(link_status));
> } else {
> @@ -438,7 +425,7 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> "vswing request: " TRAIN_REQ_FMT ", "
> "pre-emphasis request: " TRAIN_REQ_FMT "\n",
> encoder->base.base.id, encoder->base.name,
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
> + drm_dp_phy_name(dp_phy),
> crtc_state->lane_count,
> TRAIN_REQ_VSWING_ARGS(link_status),
> TRAIN_REQ_PREEMPH_ARGS(link_status));
> @@ -503,13 +490,12 @@ intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> u8 train_pat = intel_dp_training_pattern_symbol(dp_train_pat);
> - char phy_name[10];
>
> if (train_pat != DP_TRAINING_PATTERN_DISABLE)
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] Using DP training pattern TPS%c\n",
> encoder->base.base.id, encoder->base.name,
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
> + drm_dp_phy_name(dp_phy),
> dp_training_pattern_name(train_pat));
>
> intel_dp->set_link_train(intel_dp, crtc_state, dp_train_pat);
> @@ -546,13 +532,12 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
> {
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> - char phy_name[10];
>
> if (intel_dp_is_uhbr(crtc_state)) {
> drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, "
> "TX FFE presets: " TRAIN_SET_FMT "\n",
> encoder->base.base.id, encoder->base.name,
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
> + drm_dp_phy_name(dp_phy),
> crtc_state->lane_count,
> TRAIN_SET_TX_FFE_ARGS(intel_dp->train_set));
> } else {
> @@ -560,7 +545,7 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
> "vswing levels: " TRAIN_SET_FMT ", "
> "pre-emphasis levels: " TRAIN_SET_FMT "\n",
> encoder->base.base.id, encoder->base.name,
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
> + drm_dp_phy_name(dp_phy),
> crtc_state->lane_count,
> TRAIN_SET_VSWING_ARGS(intel_dp->train_set),
> TRAIN_SET_PREEMPH_ARGS(intel_dp->train_set));
> @@ -754,12 +739,11 @@ intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
> {
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> - char phy_name[10];
>
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",
> encoder->base.base.id, encoder->base.name,
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
> + drm_dp_phy_name(dp_phy),
> link_status[0], link_status[1], link_status[2],
> link_status[3], link_status[4], link_status[5]);
> }
> @@ -779,21 +763,19 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
> int voltage_tries, cr_tries, max_cr_tries;
> u8 link_status[DP_LINK_STATUS_SIZE];
> bool max_vswing_reached = false;
> - char phy_name[10];
> int delay_us;
>
> delay_us = drm_dp_read_clock_recovery_delay(&intel_dp->aux,
> intel_dp->dpcd, dp_phy,
> intel_dp_is_uhbr(crtc_state));
>
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
> -
> /* clock recovery */
> if (!intel_dp_reset_link_train(intel_dp, crtc_state, dp_phy,
> DP_TRAINING_PATTERN_1 |
> DP_LINK_SCRAMBLING_DISABLE)) {
> drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to enable link training\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> return false;
> }
>
> @@ -817,14 +799,16 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
> if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, dp_phy,
> link_status) < 0) {
> drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to get link status\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> return false;
> }
>
> if (drm_dp_clock_recovery_ok(link_status, crtc_state->lane_count)) {
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] Clock recovery OK\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> return true;
> }
>
> @@ -832,7 +816,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] Same voltage tried 5 times\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> return false;
> }
>
> @@ -840,7 +825,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] Max Voltage Swing reached\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> return false;
> }
>
> @@ -850,7 +836,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
> if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) {
> drm_err(&i915->drm,
> "[ENCODER:%d:%s][%s] Failed to update link training\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> return false;
> }
>
> @@ -868,7 +855,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
> drm_err(&i915->drm,
> "[ENCODER:%d:%s][%s] Failed clock recovery %d times, giving up!\n",
> - encoder->base.base.id, encoder->base.name, phy_name, max_cr_tries);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy), max_cr_tries);
>
> return false;
> }
> @@ -946,15 +934,12 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
> u32 training_pattern;
> u8 link_status[DP_LINK_STATUS_SIZE];
> bool channel_eq = false;
> - char phy_name[10];
> int delay_us;
>
> delay_us = drm_dp_read_channel_eq_delay(&intel_dp->aux,
> intel_dp->dpcd, dp_phy,
> intel_dp_is_uhbr(crtc_state));
>
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
> -
> training_pattern = intel_dp_training_pattern(intel_dp, crtc_state, dp_phy);
> /* Scrambling is disabled for TPS2/3 and enabled for TPS4 */
> if (training_pattern != DP_TRAINING_PATTERN_4)
> @@ -966,7 +951,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
> drm_err(&i915->drm,
> "[ENCODER:%d:%s][%s] Failed to start channel equalization\n",
> encoder->base.base.id, encoder->base.name,
> - phy_name);
> + drm_dp_phy_name(dp_phy));
> return false;
> }
>
> @@ -977,7 +962,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
> link_status) < 0) {
> drm_err(&i915->drm,
> "[ENCODER:%d:%s][%s] Failed to get link status\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> break;
> }
>
> @@ -988,7 +974,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] Clock recovery check failed, cannot "
> "continue channel equalization\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> break;
> }
>
> @@ -997,7 +984,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
> channel_eq = true;
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] Channel EQ done. DP Training successful\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> break;
> }
>
> @@ -1007,7 +995,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
> if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) {
> drm_err(&i915->drm,
> "[ENCODER:%d:%s][%s] Failed to update link training\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> break;
> }
> }
> @@ -1017,7 +1006,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s][%s] Channel equalization failed 5 times\n",
> - encoder->base.base.id, encoder->base.name, phy_name);
> + encoder->base.base.id, encoder->base.name,
> + drm_dp_phy_name(dp_phy));
> }
>
> return channel_eq;
> @@ -1092,7 +1082,6 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp,
> {
> struct intel_connector *connector = intel_dp->attached_connector;
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> - char phy_name[10];
> bool ret = false;
>
> if (!intel_dp_link_training_clock_recovery(intel_dp, crtc_state, dp_phy))
> @@ -1108,7 +1097,7 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp,
> "[CONNECTOR:%d:%s][ENCODER:%d:%s][%s] Link Training %s at link rate = %d, lane count = %d\n",
> connector->base.base.id, connector->base.name,
> encoder->base.base.id, encoder->base.name,
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
> + drm_dp_phy_name(dp_phy),
> ret ? "passed" : "failed",
> crtc_state->port_clock, crtc_state->lane_count);
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: use drm_dp_phy_name() for logging
2022-09-12 13:23 [Intel-gfx] [RESEND] drm/i915/dp: use drm_dp_phy_name() for logging Jani Nikula
2022-09-12 18:57 ` Andrzej Hajda
@ 2022-09-12 22:55 ` Patchwork
2022-09-13 5:51 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2022-09-12 22:55 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5177 bytes --]
== Series Details ==
Series: drm/i915/dp: use drm_dp_phy_name() for logging
URL : https://patchwork.freedesktop.org/series/108436/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12123 -> Patchwork_108436v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/index.html
Participating hosts (42 -> 41)
------------------------------
Additional (2): bat-jsl-1 bat-jsl-3
Missing (3): fi-ctg-p8600 fi-bdw-samus fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_108436v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-rkl-11600: NOTRUN -> [FAIL][1] ([fdo#103375])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/fi-rkl-11600/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@gt_engines:
- bat-dg1-5: [PASS][2] -> [INCOMPLETE][3] ([i915#4418])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/bat-dg1-5/igt@i915_selftest@live@gt_engines.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/bat-dg1-5/igt@i915_selftest@live@gt_engines.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][4] -> [DMESG-FAIL][5] ([i915#4528])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/fi-blb-e6850/igt@i915_selftest@live@requests.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-rkl-11600: NOTRUN -> [SKIP][6] ([fdo#111827])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/fi-rkl-11600/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka: [PASS][7] -> [FAIL][8] ([i915#6298])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
* igt@runner@aborted:
- bat-dg1-5: NOTRUN -> [FAIL][9] ([i915#4312] / [i915#5257])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/bat-dg1-5/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_gttfill@basic:
- {bat-rpls-2}: [DMESG-WARN][10] -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/bat-rpls-2/igt@gem_exec_gttfill@basic.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/bat-rpls-2/igt@gem_exec_gttfill@basic.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600: [INCOMPLETE][12] ([i915#5982]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4418]: https://gitlab.freedesktop.org/drm/intel/issues/4418
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
Build changes
-------------
* Linux: CI_DRM_12123 -> Patchwork_108436v1
CI-20190529: 20190529
CI_DRM_12123: 5dd153b15e2e3198fca3d84db9e155f454645f91 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6650: f7aff600ab16d6405f0704b1743d2b7909715752 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_108436v1: 5dd153b15e2e3198fca3d84db9e155f454645f91 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
290dae62bc13 drm/i915/dp: use drm_dp_phy_name() for logging
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/index.html
[-- Attachment #2: Type: text/html, Size: 5381 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: use drm_dp_phy_name() for logging
2022-09-12 13:23 [Intel-gfx] [RESEND] drm/i915/dp: use drm_dp_phy_name() for logging Jani Nikula
2022-09-12 18:57 ` Andrzej Hajda
2022-09-12 22:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2022-09-13 5:51 ` Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2022-09-13 5:51 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 24893 bytes --]
== Series Details ==
Series: drm/i915/dp: use drm_dp_phy_name() for logging
URL : https://patchwork.freedesktop.org/series/108436/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12123_full -> Patchwork_108436v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-rkl
Known issues
------------
Here are the changes found in Patchwork_108436v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][1] -> [FAIL][2] ([i915#6268])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-tglb7/igt@gem_ctx_exec@basic-nohangcheck.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb1/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@in-flight-contexts-10ms:
- shard-tglb: [PASS][3] -> [TIMEOUT][4] ([i915#3063])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-tglb5/igt@gem_eio@in-flight-contexts-10ms.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb2/igt@gem_eio@in-flight-contexts-10ms.html
* igt@gem_eio@kms:
- shard-tglb: [PASS][5] -> [FAIL][6] ([i915#5784])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-tglb7/igt@gem_eio@kms.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [PASS][7] -> [SKIP][8] ([i915#4525]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb1/igt@gem_exec_balancer@parallel-bb-first.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb6/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][9] -> [FAIL][10] ([i915#2842]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb7/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][11] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html
- shard-iclb: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_lmem_swapping@random-engines:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#4613])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@gem_lmem_swapping@random-engines.html
* igt@gem_pxp@fail-invalid-protected-context:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#4270])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@gem_pxp@fail-invalid-protected-context.html
* igt@gen9_exec_parse@bb-large:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#2527] / [i915#2856])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@gen9_exec_parse@bb-large.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-iclb: [PASS][19] -> [INCOMPLETE][20] ([i915#6598])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb4/igt@i915_suspend@basic-s3-without-i915.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb3/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-180:
- shard-tglb: NOTRUN -> [SKIP][21] ([i915#5286])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-tglb: NOTRUN -> [SKIP][22] ([fdo#111614])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-apl: NOTRUN -> [SKIP][23] ([fdo#109271]) +32 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl6/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][24] ([i915#3689] / [i915#3886])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
- shard-tglb: NOTRUN -> [SKIP][25] ([i915#3689] / [i915#6095])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_ccs@pipe-c-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3886]) +2 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl6/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-bad-aux-stride-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#3689]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_ccs@pipe-d-bad-aux-stride-y_tiled_ccs.html
* igt@kms_chamelium@hdmi-crc-single:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [fdo#111827])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl6/igt@kms_chamelium@hdmi-crc-single.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-tglb: NOTRUN -> [SKIP][29] ([fdo#109274] / [fdo#111825])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk: [PASS][30] -> [FAIL][31] ([i915#2346])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [SKIP][32] ([fdo#109271])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-glk7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible:
- shard-iclb: NOTRUN -> [SKIP][33] ([fdo#109274])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb5/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-tglb: NOTRUN -> [SKIP][34] ([fdo#109274] / [fdo#111825] / [i915#3637])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][35] -> [FAIL][36] ([i915#2122])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-glk8/igt@kms_flip@2x-plain-flip-ts-check@ab-hdmi-a1-hdmi-a2.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-glk2/igt@kms_flip@2x-plain-flip-ts-check@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][37] ([i915#3555])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][38] ([i915#2587] / [i915#2672]) +3 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][39] ([i915#2672]) +5 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][40] ([i915#2672] / [i915#3555])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt:
- shard-tglb: NOTRUN -> [SKIP][41] ([fdo#109280] / [fdo#111825]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#6497])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
* igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1:
- shard-apl: [PASS][43] -> [DMESG-WARN][44] ([i915#180]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-apl7/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl1/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html
* igt@kms_plane_lowres@tiling-4:
- shard-tglb: NOTRUN -> [SKIP][45] ([fdo#112054] / [i915#5288])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_plane_lowres@tiling-4.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-d-edp-1:
- shard-tglb: NOTRUN -> [SKIP][46] ([i915#5176]) +3 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-d-edp-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1:
- shard-iclb: [PASS][47] -> [SKIP][48] ([i915#5235]) +2 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [PASS][49] -> [SKIP][50] ([fdo#109441])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb5/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@nouveau_crc@pipe-d-ctx-flip-skip-current-frame:
- shard-tglb: NOTRUN -> [SKIP][51] ([i915#2530])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@nouveau_crc@pipe-d-ctx-flip-skip-current-frame.html
* igt@sysfs_clients@sema-25:
- shard-apl: NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#2994])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl6/igt@sysfs_clients@sema-25.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][53] ([i915#658]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb4/igt@feature_discovery@psr2.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_ctx_exec@basic-close-race:
- shard-iclb: [INCOMPLETE][55] -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb6/igt@gem_ctx_exec@basic-close-race.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb5/igt@gem_ctx_exec@basic-close-race.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-iclb: [SKIP][57] ([i915#4525]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb3/igt@gem_exec_balancer@parallel-balancer.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb1/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][59] ([i915#2842]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [DMESG-WARN][61] ([i915#5566] / [i915#716]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-apl2/igt@gen9_exec_parse@allowed-single.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl6/igt@gen9_exec_parse@allowed-single.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-tglb: [INCOMPLETE][63] ([i915#6775]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-tglb3/igt@i915_module_load@reload-with-fault-injection.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-tglb3/igt@i915_module_load@reload-with-fault-injection.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-iclb: [SKIP][65] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb4/igt@kms_psr2_su@frontbuffer-xrgb8888.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-iclb: [SKIP][67] ([fdo#109441]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb1/igt@kms_psr@psr2_sprite_mmap_cpu.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@perf@polling-parameterized:
- shard-glk: [FAIL][69] ([i915#5639]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-glk1/igt@perf@polling-parameterized.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-glk6/igt@perf@polling-parameterized.html
#### Warnings ####
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][71] ([i915#588]) -> [SKIP][72] ([i915#658])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
- shard-iclb: [SKIP][73] ([i915#2920]) -> [SKIP][74] ([i915#658])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb5/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-iclb: [SKIP][75] ([fdo#111068] / [i915#658]) -> [SKIP][76] ([i915#2920]) +2 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb1/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-iclb: [SKIP][77] ([i915#2920]) -> [SKIP][78] ([fdo#111068] / [i915#658])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-iclb: [FAIL][79] ([i915#5939]) -> [SKIP][80] ([fdo#109642] / [fdo#111068] / [i915#658])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-iclb2/igt@kms_psr2_su@page_flip-nv12.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-iclb5/igt@kms_psr2_su@page_flip-nv12.html
* igt@runner@aborted:
- shard-apl: ([FAIL][81], [FAIL][82], [FAIL][83]) ([fdo#109271] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][84], [FAIL][85], [FAIL][86], [FAIL][87]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-apl8/igt@runner@aborted.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-apl2/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12123/shard-apl7/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl1/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl7/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl8/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/shard-apl8/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5182]: https://gitlab.freedesktop.org/drm/intel/issues/5182
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5639]: https://gitlab.freedesktop.org/drm/intel/issues/5639
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#5939]: https://gitlab.freedesktop.org/drm/intel/issues/5939
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
[i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
[i915#6775]: https://gitlab.freedesktop.org/drm/intel/issues/6775
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
Build changes
-------------
* Linux: CI_DRM_12123 -> Patchwork_108436v1
CI-20190529: 20190529
CI_DRM_12123: 5dd153b15e2e3198fca3d84db9e155f454645f91 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6650: f7aff600ab16d6405f0704b1743d2b7909715752 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_108436v1: 5dd153b15e2e3198fca3d84db9e155f454645f91 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108436v1/index.html
[-- Attachment #2: Type: text/html, Size: 27531 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [RESEND] drm/i915/dp: use drm_dp_phy_name() for logging
2022-09-12 18:57 ` Andrzej Hajda
@ 2022-09-13 7:29 ` Jani Nikula
0 siblings, 0 replies; 5+ messages in thread
From: Jani Nikula @ 2022-09-13 7:29 UTC (permalink / raw)
To: Andrzej Hajda, intel-gfx
On Mon, 12 Sep 2022, Andrzej Hajda <andrzej.hajda@intel.com> wrote:
> On 12.09.2022 15:23, Jani Nikula wrote:
>> Drop the local intel_dp_phy_name() function, and replace with
>> drm_dp_phy_name(). This lets us drop a number of local buffers.
>>
>> v2: Rebase
>>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> # v1
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Thanks, pushed to drm-intel-next.
BR,
Jani.
>
> Regards
> Andrzej
>
>> ---
>> .../drm/i915/display/intel_dp_link_training.c | 83 ++++++++-----------
>> 1 file changed, 36 insertions(+), 47 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> index d213d8ad1ea5..3d3efcf02011 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> @@ -37,17 +37,6 @@ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
>> DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = 0;
>> }
>>
>> -static const char *intel_dp_phy_name(enum drm_dp_phy dp_phy,
>> - char *buf, size_t buf_size)
>> -{
>> - if (dp_phy == DP_PHY_DPRX)
>> - snprintf(buf, buf_size, "DPRX");
>> - else
>> - snprintf(buf, buf_size, "LTTPR %d", dp_phy - DP_PHY_LTTPR1 + 1);
>> -
>> - return buf;
>> -}
>> -
>> static u8 *intel_dp_lttpr_phy_caps(struct intel_dp *intel_dp,
>> enum drm_dp_phy dp_phy)
>> {
>> @@ -60,20 +49,19 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp,
>> {
>> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy);
>> - char phy_name[10];
>> -
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
>>
>> if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dpcd, dp_phy, phy_caps) < 0) {
>> drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
>> "[ENCODER:%d:%s][%s] failed to read the PHY caps\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> return;
>> }
>>
>> drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
>> "[ENCODER:%d:%s][%s] PHY capabilities: %*ph\n",
>> - encoder->base.base.id, encoder->base.name, phy_name,
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy),
>> (int)sizeof(intel_dp->lttpr_phy_caps[0]),
>> phy_caps);
>> }
>> @@ -423,14 +411,13 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
>> {
>> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> - char phy_name[10];
>> int lane;
>>
>> if (intel_dp_is_uhbr(crtc_state)) {
>> drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, "
>> "TX FFE request: " TRAIN_REQ_FMT "\n",
>> encoder->base.base.id, encoder->base.name,
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
>> + drm_dp_phy_name(dp_phy),
>> crtc_state->lane_count,
>> TRAIN_REQ_TX_FFE_ARGS(link_status));
>> } else {
>> @@ -438,7 +425,7 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
>> "vswing request: " TRAIN_REQ_FMT ", "
>> "pre-emphasis request: " TRAIN_REQ_FMT "\n",
>> encoder->base.base.id, encoder->base.name,
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
>> + drm_dp_phy_name(dp_phy),
>> crtc_state->lane_count,
>> TRAIN_REQ_VSWING_ARGS(link_status),
>> TRAIN_REQ_PREEMPH_ARGS(link_status));
>> @@ -503,13 +490,12 @@ intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
>> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> u8 train_pat = intel_dp_training_pattern_symbol(dp_train_pat);
>> - char phy_name[10];
>>
>> if (train_pat != DP_TRAINING_PATTERN_DISABLE)
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] Using DP training pattern TPS%c\n",
>> encoder->base.base.id, encoder->base.name,
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
>> + drm_dp_phy_name(dp_phy),
>> dp_training_pattern_name(train_pat));
>>
>> intel_dp->set_link_train(intel_dp, crtc_state, dp_train_pat);
>> @@ -546,13 +532,12 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
>> {
>> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> - char phy_name[10];
>>
>> if (intel_dp_is_uhbr(crtc_state)) {
>> drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, "
>> "TX FFE presets: " TRAIN_SET_FMT "\n",
>> encoder->base.base.id, encoder->base.name,
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
>> + drm_dp_phy_name(dp_phy),
>> crtc_state->lane_count,
>> TRAIN_SET_TX_FFE_ARGS(intel_dp->train_set));
>> } else {
>> @@ -560,7 +545,7 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
>> "vswing levels: " TRAIN_SET_FMT ", "
>> "pre-emphasis levels: " TRAIN_SET_FMT "\n",
>> encoder->base.base.id, encoder->base.name,
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
>> + drm_dp_phy_name(dp_phy),
>> crtc_state->lane_count,
>> TRAIN_SET_VSWING_ARGS(intel_dp->train_set),
>> TRAIN_SET_PREEMPH_ARGS(intel_dp->train_set));
>> @@ -754,12 +739,11 @@ intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
>> {
>> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> - char phy_name[10];
>>
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n",
>> encoder->base.base.id, encoder->base.name,
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
>> + drm_dp_phy_name(dp_phy),
>> link_status[0], link_status[1], link_status[2],
>> link_status[3], link_status[4], link_status[5]);
>> }
>> @@ -779,21 +763,19 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
>> int voltage_tries, cr_tries, max_cr_tries;
>> u8 link_status[DP_LINK_STATUS_SIZE];
>> bool max_vswing_reached = false;
>> - char phy_name[10];
>> int delay_us;
>>
>> delay_us = drm_dp_read_clock_recovery_delay(&intel_dp->aux,
>> intel_dp->dpcd, dp_phy,
>> intel_dp_is_uhbr(crtc_state));
>>
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
>> -
>> /* clock recovery */
>> if (!intel_dp_reset_link_train(intel_dp, crtc_state, dp_phy,
>> DP_TRAINING_PATTERN_1 |
>> DP_LINK_SCRAMBLING_DISABLE)) {
>> drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to enable link training\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> return false;
>> }
>>
>> @@ -817,14 +799,16 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
>> if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, dp_phy,
>> link_status) < 0) {
>> drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to get link status\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> return false;
>> }
>>
>> if (drm_dp_clock_recovery_ok(link_status, crtc_state->lane_count)) {
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] Clock recovery OK\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> return true;
>> }
>>
>> @@ -832,7 +816,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
>> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] Same voltage tried 5 times\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> return false;
>> }
>>
>> @@ -840,7 +825,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
>> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] Max Voltage Swing reached\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> return false;
>> }
>>
>> @@ -850,7 +836,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
>> if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) {
>> drm_err(&i915->drm,
>> "[ENCODER:%d:%s][%s] Failed to update link training\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> return false;
>> }
>>
>> @@ -868,7 +855,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp,
>> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
>> drm_err(&i915->drm,
>> "[ENCODER:%d:%s][%s] Failed clock recovery %d times, giving up!\n",
>> - encoder->base.base.id, encoder->base.name, phy_name, max_cr_tries);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy), max_cr_tries);
>>
>> return false;
>> }
>> @@ -946,15 +934,12 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>> u32 training_pattern;
>> u8 link_status[DP_LINK_STATUS_SIZE];
>> bool channel_eq = false;
>> - char phy_name[10];
>> int delay_us;
>>
>> delay_us = drm_dp_read_channel_eq_delay(&intel_dp->aux,
>> intel_dp->dpcd, dp_phy,
>> intel_dp_is_uhbr(crtc_state));
>>
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name));
>> -
>> training_pattern = intel_dp_training_pattern(intel_dp, crtc_state, dp_phy);
>> /* Scrambling is disabled for TPS2/3 and enabled for TPS4 */
>> if (training_pattern != DP_TRAINING_PATTERN_4)
>> @@ -966,7 +951,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>> drm_err(&i915->drm,
>> "[ENCODER:%d:%s][%s] Failed to start channel equalization\n",
>> encoder->base.base.id, encoder->base.name,
>> - phy_name);
>> + drm_dp_phy_name(dp_phy));
>> return false;
>> }
>>
>> @@ -977,7 +962,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>> link_status) < 0) {
>> drm_err(&i915->drm,
>> "[ENCODER:%d:%s][%s] Failed to get link status\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> break;
>> }
>>
>> @@ -988,7 +974,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] Clock recovery check failed, cannot "
>> "continue channel equalization\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> break;
>> }
>>
>> @@ -997,7 +984,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>> channel_eq = true;
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] Channel EQ done. DP Training successful\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> break;
>> }
>>
>> @@ -1007,7 +995,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>> if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) {
>> drm_err(&i915->drm,
>> "[ENCODER:%d:%s][%s] Failed to update link training\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> break;
>> }
>> }
>> @@ -1017,7 +1006,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp,
>> intel_dp_dump_link_status(intel_dp, dp_phy, link_status);
>> drm_dbg_kms(&i915->drm,
>> "[ENCODER:%d:%s][%s] Channel equalization failed 5 times\n",
>> - encoder->base.base.id, encoder->base.name, phy_name);
>> + encoder->base.base.id, encoder->base.name,
>> + drm_dp_phy_name(dp_phy));
>> }
>>
>> return channel_eq;
>> @@ -1092,7 +1082,6 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp,
>> {
>> struct intel_connector *connector = intel_dp->attached_connector;
>> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> - char phy_name[10];
>> bool ret = false;
>>
>> if (!intel_dp_link_training_clock_recovery(intel_dp, crtc_state, dp_phy))
>> @@ -1108,7 +1097,7 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp,
>> "[CONNECTOR:%d:%s][ENCODER:%d:%s][%s] Link Training %s at link rate = %d, lane count = %d\n",
>> connector->base.base.id, connector->base.name,
>> encoder->base.base.id, encoder->base.name,
>> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)),
>> + drm_dp_phy_name(dp_phy),
>> ret ? "passed" : "failed",
>> crtc_state->port_clock, crtc_state->lane_count);
>>
>
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-09-13 7:29 UTC | newest]
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2022-09-12 13:23 [Intel-gfx] [RESEND] drm/i915/dp: use drm_dp_phy_name() for logging Jani Nikula
2022-09-12 18:57 ` Andrzej Hajda
2022-09-13 7:29 ` Jani Nikula
2022-09-12 22:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
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