[PATCH igt] tests: Add a random load generator

[PATCH igt] tests: Add a random load generator

[Chris Wilson]

Apply a random load to one or all engines in order to apply stress to
RPS as it tries to constantly adjust the GPU frequency to meet the
changing workload.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/Makefile.sources |   1 +
 tests/gem_exec_load.c  | 124 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+)
 create mode 100644 tests/gem_exec_load.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 6d3857949..5c6242bca 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -83,6 +83,7 @@ TESTS_progs = \
 	gem_exec_gttfill \
 	gem_exec_latency \
 	gem_exec_lut_handle \
+	gem_exec_load \
 	gem_exec_nop \
 	gem_exec_parallel \
 	gem_exec_params \
diff --git a/tests/gem_exec_load.c b/tests/gem_exec_load.c
new file mode 100644
index 000000000..d3618f6c0
--- /dev/null
+++ b/tests/gem_exec_load.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_rand.h"
+#include "igt_sysfs.h"
+
+IGT_TEST_DESCRIPTION("Apply a random load to each engine");
+
+static inline uint32_t randmax(uint32_t *state, uint32_t ep_ro)
+{
+	return (uint64_t)hars_petruska_f54_1_random(state) * ep_ro >> 32;
+}
+
+static void one(int fd, unsigned int engine, int scale, unsigned int timeout)
+{
+	struct timespec tv = {};
+	uint32_t prng = engine;
+	igt_spin_t *spin[2] = {};
+	unsigned int max;
+	int sysfs;
+
+	sysfs = igt_sysfs_open(fd, NULL);
+
+	max = sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz");
+
+	do {
+		/*
+		 * For every second, we randomly assign a desire % busyness
+		 * and the frequency with which to submit a batch, defining
+		 * a pulse-width modulation (pwm).
+		 */
+		unsigned int pwm = randmax(&prng, 1000);
+		unsigned int load = randmax(&prng, pwm / scale);
+		const unsigned int interval = 1e6 / pwm;
+		unsigned int cur =
+			sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_cur_freq_mhz");
+
+		while (pwm--) {
+			if (randmax(&prng, pwm * cur) <= load * max) {
+				spin[1] = __igt_spin_batch_new(fd, 0, engine, 0);
+				load--;
+			}
+			igt_spin_batch_free(fd, spin[0]);
+			spin[0] = spin[1];
+			spin[1] = NULL;
+
+			usleep(interval);
+		}
+	} while (igt_seconds_elapsed(&tv) < timeout);
+	igt_spin_batch_free(fd, spin[0]);
+
+	close(sysfs);
+}
+
+static void all(int fd, unsigned int timeout)
+{
+	unsigned int engines[16];
+	unsigned int nengine;
+	unsigned int engine;
+
+	nengine = 0;
+	for_each_engine(fd, engine)
+		engines[nengine++] = engine;
+	igt_require(nengine > 1);
+
+	for (unsigned int n = 0; n < nengine; n++)
+		igt_fork(child, 1)
+			one(fd, engines[n], nengine/2, timeout);
+	igt_waitchildren();
+}
+
+igt_main
+{
+	const struct intel_execution_engine *e;
+	int fd = -1;
+
+	igt_skip_on_simulation();
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_INTEL);
+		igt_require_gem(fd);
+		igt_fork_hang_detector(fd);
+	}
+
+	for (e = intel_execution_engines; e->name; e++) {
+		/* default exec-id is purely symbolic */
+		if (e->exec_id == 0)
+			continue;
+
+		igt_subtest_f("%s", e->name) {
+			gem_require_ring(fd, e->exec_id | e->flags);
+			one(fd, e->exec_id | e->flags, 1, 150);
+		}
+	}
+
+	igt_subtest("all")
+		all(fd, 900);
+
+	igt_fixture {
+		igt_stop_hang_detector();
+		close(fd);
+	}
+}
-- 
2.15.1

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[PATCH igt v2] tests: Add a random load generator

[Chris Wilson]

Apply a random load to one or all engines in order to apply stress to
RPS as it tries to constantly adjust the GPU frequency to meet the
changing workload.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/Makefile.sources |   1 +
 tests/gem_exec_load.c  | 178 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 179 insertions(+)
 create mode 100644 tests/gem_exec_load.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 6d3857949..5c6242bca 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -83,6 +83,7 @@ TESTS_progs = \
 	gem_exec_gttfill \
 	gem_exec_latency \
 	gem_exec_lut_handle \
+	gem_exec_load \
 	gem_exec_nop \
 	gem_exec_parallel \
 	gem_exec_params \
diff --git a/tests/gem_exec_load.c b/tests/gem_exec_load.c
new file mode 100644
index 000000000..d8e29a47c
--- /dev/null
+++ b/tests/gem_exec_load.c
@@ -0,0 +1,178 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_rand.h"
+#include "igt_sysfs.h"
+
+IGT_TEST_DESCRIPTION("Apply a random load to each engine");
+
+static inline uint32_t randmax(uint32_t *state, uint32_t ep_ro)
+{
+	return (uint64_t)hars_petruska_f54_1_random(state) * ep_ro >> 32;
+}
+
+static void one(int fd, unsigned int engine, int scale, unsigned int timeout)
+{
+	struct timespec tv = {};
+	uint32_t prng = engine;
+	igt_spin_t *spin[2] = {};
+	unsigned int max;
+	int sysfs;
+
+	sysfs = igt_sysfs_open(fd, NULL);
+
+	max = sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz");
+
+	do {
+		/*
+		 * For every second, we randomly assign a desire % busyness
+		 * and the frequency with which to submit a batch, defining
+		 * a pulse-width modulation (pwm).
+		 */
+		unsigned int pwm = randmax(&prng, 1000);
+		unsigned int load = randmax(&prng, pwm / scale);
+		const unsigned int interval = 1e6 / pwm;
+		unsigned int cur =
+			sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_cur_freq_mhz");
+
+		while (pwm--) {
+			if (randmax(&prng, pwm * cur) <= load * max) {
+				spin[1] = __igt_spin_batch_new(fd, 0, engine, 0);
+				load--;
+			}
+			igt_spin_batch_free(fd, spin[0]);
+			spin[0] = spin[1];
+			spin[1] = NULL;
+
+			usleep(interval);
+		}
+	} while (igt_seconds_elapsed(&tv) < timeout);
+	igt_spin_batch_free(fd, spin[0]);
+
+	close(sysfs);
+}
+
+static void all(int fd, unsigned int timeout)
+{
+	unsigned int engines[16];
+	unsigned int nengine;
+	unsigned int engine;
+
+	nengine = 0;
+	for_each_engine(fd, engine)
+		engines[nengine++] = engine;
+	igt_require(nengine > 1);
+
+	for (unsigned int n = 0; n < nengine; n++)
+		igt_fork(child, 1)
+			one(fd, engines[n], nengine/2, timeout);
+	igt_waitchildren();
+}
+
+static void pulse(int fd, unsigned int timeout)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		{ .flags = EXEC_OBJECT_WRITE },
+	};
+	struct timespec tv = {};
+	unsigned int engines[16];
+	unsigned int nengine;
+	unsigned int engine;
+
+	nengine = 0;
+	for_each_engine(fd, engine) {
+		if (engine == 0)
+			continue;
+
+		engines[nengine++] = engine;
+	}
+	igt_require(nengine);
+
+	obj[1].handle = gem_create(fd, 4096);
+	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
+	do {
+		for (unsigned int s = 0; s < nengine; s++) {
+			int64_t boost = 10e6; /* 10ms, long enough to sleep */
+			igt_spin_t *spin;
+
+			spin = __igt_spin_batch_new(fd, 0, engines[s], 0);
+			obj[0].handle = spin->handle;
+			for (unsigned int n = 0; n < nengine; n++) {
+				struct drm_i915_gem_execbuffer2 eb = {
+					.buffer_count = 2,
+					.buffers_ptr = to_user_pointer(obj),
+					.flags = engines[n],
+				};
+				for (unsigned int repeat = 0;
+				     repeat < 64;
+				     repeat++)
+					gem_execbuf(fd, &eb);
+			}
+			gem_wait(fd, spin->handle, &boost);
+			igt_spin_batch_free(fd, spin);
+
+			gem_quiescent_gpu(fd);
+		}
+	} while (igt_seconds_elapsed(&tv) < timeout);
+
+	gem_close(fd, obj[1].handle);
+}
+
+igt_main
+{
+	const struct intel_execution_engine *e;
+	int fd = -1;
+
+	igt_skip_on_simulation();
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_INTEL);
+		igt_require_gem(fd);
+		igt_fork_hang_detector(fd);
+	}
+
+	for (e = intel_execution_engines; e->name; e++) {
+		/* default exec-id is purely symbolic */
+		if (e->exec_id == 0)
+			continue;
+
+		igt_subtest_f("%s", e->name) {
+			gem_require_ring(fd, e->exec_id | e->flags);
+			one(fd, e->exec_id | e->flags, 1, 150);
+		}
+	}
+
+	igt_subtest("all")
+		all(fd, 900);
+
+	igt_subtest("pulse")
+		pulse(fd, 900);
+
+	igt_fixture {
+		igt_stop_hang_detector();
+		close(fd);
+	}
+}
-- 
2.15.1

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Re: [igt-dev] [PATCH igt] tests: Add a random load generator

[Antonio Argenziano]

On 21/01/18 12:20, Chris Wilson wrote:
> Apply a random load to one or all engines in order to apply stress to
> RPS as it tries to constantly adjust the GPU frequency to meet the
> changing workload.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/Makefile.sources |   1 +
>   tests/gem_exec_load.c  | 124 +++++++++++++++++++++++++++++++++++++++++++++++++
>   2 files changed, 125 insertions(+)
>   create mode 100644 tests/gem_exec_load.c
> 
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index 6d3857949..5c6242bca 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -83,6 +83,7 @@ TESTS_progs = \
>   	gem_exec_gttfill \
>   	gem_exec_latency \
>   	gem_exec_lut_handle \
> +	gem_exec_load \
>   	gem_exec_nop \
>   	gem_exec_parallel \
>   	gem_exec_params \
> diff --git a/tests/gem_exec_load.c b/tests/gem_exec_load.c
> new file mode 100644
> index 000000000..d3618f6c0
> --- /dev/null
> +++ b/tests/gem_exec_load.c
> @@ -0,0 +1,124 @@
> +/*
> + * Copyright © 2018 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "igt_rand.h"
> +#include "igt_sysfs.h"
> +
> +IGT_TEST_DESCRIPTION("Apply a random load to each engine");
> +
> +static inline uint32_t randmax(uint32_t *state, uint32_t ep_ro)
> +{
> +	return (uint64_t)hars_petruska_f54_1_random(state) * ep_ro >> 32;
> +}
> +
> +static void one(int fd, unsigned int engine, int scale, unsigned int timeout)
> +{
> +	struct timespec tv = {};
> +	uint32_t prng = engine;
> +	igt_spin_t *spin[2] = {};
> +	unsigned int max;
> +	int sysfs;
> +
> +	sysfs = igt_sysfs_open(fd, NULL);
> +
> +	max = sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz");
> +
> +	do {
> +		/*
> +		 * For every second, we randomly assign a desire % busyness
> +		 * and the frequency with which to submit a batch, defining
> +		 * a pulse-width modulation (pwm).
> +		 */
> +		unsigned int pwm = randmax(&prng, 1000);
> +		unsigned int load = randmax(&prng, pwm / scale);
> +		const unsigned int interval = 1e6 / pwm;
> +		unsigned int cur =
> +			sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_cur_freq_mhz");
> +
> +		while (pwm--) {
> +			if (randmax(&prng, pwm * cur) <= load * max) {
> +				spin[1] = __igt_spin_batch_new(fd, 0, engine, 0);
> +				load--;
> +			}
> +			igt_spin_batch_free(fd, spin[0]);
> +			spin[0] = spin[1];
> +			spin[1] = NULL;
> +
> +			usleep(interval);
> +		}
> +	} while (igt_seconds_elapsed(&tv) < timeout);

Why not igt_until_timeout()?

-Antonio
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Re: [igt-dev] [PATCH igt] tests: Add a random load generator

[Chris Wilson]

Quoting Antonio Argenziano (2018-01-23 19:03:48)
> 
> 
> On 21/01/18 12:20, Chris Wilson wrote:
> > Apply a random load to one or all engines in order to apply stress to
> > RPS as it tries to constantly adjust the GPU frequency to meet the
> > changing workload.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >   tests/Makefile.sources |   1 +
> >   tests/gem_exec_load.c  | 124 +++++++++++++++++++++++++++++++++++++++++++++++++
> >   2 files changed, 125 insertions(+)
> >   create mode 100644 tests/gem_exec_load.c
> > 
> > diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> > index 6d3857949..5c6242bca 100644
> > --- a/tests/Makefile.sources
> > +++ b/tests/Makefile.sources
> > @@ -83,6 +83,7 @@ TESTS_progs = \
> >       gem_exec_gttfill \
> >       gem_exec_latency \
> >       gem_exec_lut_handle \
> > +     gem_exec_load \
> >       gem_exec_nop \
> >       gem_exec_parallel \
> >       gem_exec_params \
> > diff --git a/tests/gem_exec_load.c b/tests/gem_exec_load.c
> > new file mode 100644
> > index 000000000..d3618f6c0
> > --- /dev/null
> > +++ b/tests/gem_exec_load.c
> > @@ -0,0 +1,124 @@
> > +/*
> > + * Copyright © 2018 Intel Corporation
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the "Software"),
> > + * to deal in the Software without restriction, including without limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice (including the next
> > + * paragraph) shall be included in all copies or substantial portions of the
> > + * Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > + * IN THE SOFTWARE.
> > + */
> > +
> > +#include "igt.h"
> > +#include "igt_rand.h"
> > +#include "igt_sysfs.h"
> > +
> > +IGT_TEST_DESCRIPTION("Apply a random load to each engine");
> > +
> > +static inline uint32_t randmax(uint32_t *state, uint32_t ep_ro)
> > +{
> > +     return (uint64_t)hars_petruska_f54_1_random(state) * ep_ro >> 32;
> > +}
> > +
> > +static void one(int fd, unsigned int engine, int scale, unsigned int timeout)
> > +{
> > +     struct timespec tv = {};
> > +     uint32_t prng = engine;
> > +     igt_spin_t *spin[2] = {};
> > +     unsigned int max;
> > +     int sysfs;
> > +
> > +     sysfs = igt_sysfs_open(fd, NULL);
> > +
> > +     max = sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz");
> > +
> > +     do {
> > +             /*
> > +              * For every second, we randomly assign a desire % busyness
> > +              * and the frequency with which to submit a batch, defining
> > +              * a pulse-width modulation (pwm).
> > +              */
> > +             unsigned int pwm = randmax(&prng, 1000);
> > +             unsigned int load = randmax(&prng, pwm / scale);
> > +             const unsigned int interval = 1e6 / pwm;
> > +             unsigned int cur =
> > +                     sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_cur_freq_mhz");
> > +
> > +             while (pwm--) {
> > +                     if (randmax(&prng, pwm * cur) <= load * max) {
> > +                             spin[1] = __igt_spin_batch_new(fd, 0, engine, 0);
> > +                             load--;
> > +                     }
> > +                     igt_spin_batch_free(fd, spin[0]);
> > +                     spin[0] = spin[1];
> > +                     spin[1] = NULL;
> > +
> > +                     usleep(interval);
> > +             }
> > +     } while (igt_seconds_elapsed(&tv) < timeout);
> 
> Why not igt_until_timeout()?

I wasn't expecting it to be so simple and forgot about
igt_until_timeout. So no reason other than oversight.
-Chris
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[PATCH igt v2] tests: Add a random load generator

[Chris Wilson]

Apply a random load to one or all engines in order to apply stress to
RPS as it tries to constantly adjust the GPU frequency to meet the
changing workload.

This can be used to reproduce the byt (j1900) system hang.

v2: igt_until_timeout

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/Makefile.sources |   1 +
 tests/gem_exec_load.c  | 176 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 177 insertions(+)
 create mode 100644 tests/gem_exec_load.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 870c90935..8b5a18680 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -79,6 +79,7 @@ TESTS_progs = \
 	gem_exec_gttfill \
 	gem_exec_latency \
 	gem_exec_lut_handle \
+	gem_exec_load \
 	gem_exec_nop \
 	gem_exec_parallel \
 	gem_exec_params \
diff --git a/tests/gem_exec_load.c b/tests/gem_exec_load.c
new file mode 100644
index 000000000..ba88466a9
--- /dev/null
+++ b/tests/gem_exec_load.c
@@ -0,0 +1,176 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_rand.h"
+#include "igt_sysfs.h"
+
+IGT_TEST_DESCRIPTION("Apply a random load to each engine");
+
+static inline uint32_t randmax(uint32_t *state, uint32_t ep_ro)
+{
+	return (uint64_t)hars_petruska_f54_1_random(state) * ep_ro >> 32;
+}
+
+static void one(int fd, unsigned int engine, int scale, unsigned int timeout)
+{
+	uint32_t prng = engine;
+	igt_spin_t *spin[2] = {};
+	unsigned int max;
+	int sysfs;
+
+	sysfs = igt_sysfs_open(fd, NULL);
+
+	max = sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz");
+
+	igt_until_timeout(timeout) {
+		/*
+		 * For every second, we randomly assign a desire % busyness
+		 * and the frequency with which to submit a batch, defining
+		 * a pulse-width modulation (pwm).
+		 */
+		unsigned int pwm = randmax(&prng, 1000);
+		unsigned int load = randmax(&prng, pwm / scale);
+		const unsigned int interval = 1e6 / pwm;
+		unsigned int cur =
+			max > 1 ? igt_sysfs_get_u32(sysfs, "gt_cur_freq_mhz") : 1;
+
+		while (pwm--) {
+			if (randmax(&prng, pwm * cur) <= load * max) {
+				spin[1] = __igt_spin_batch_new(fd, 0, engine, 0);
+				load--;
+			}
+			igt_spin_batch_free(fd, spin[0]);
+			spin[0] = spin[1];
+			spin[1] = NULL;
+
+			usleep(interval);
+		}
+	}
+	igt_spin_batch_free(fd, spin[0]);
+
+	close(sysfs);
+}
+
+static void all(int fd, unsigned int timeout)
+{
+	unsigned int engines[16];
+	unsigned int nengine;
+	unsigned int engine;
+
+	nengine = 0;
+	for_each_engine(fd, engine)
+		engines[nengine++] = engine;
+	igt_require(nengine > 1);
+
+	for (unsigned int n = 0; n < nengine; n++)
+		igt_fork(child, 1)
+			one(fd, engines[n], nengine/2, timeout);
+	igt_waitchildren();
+}
+
+static void pulse(int fd, unsigned int timeout)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		{ .flags = EXEC_OBJECT_WRITE },
+	};
+	unsigned int engines[16];
+	unsigned int nengine;
+	unsigned int engine;
+
+	nengine = 0;
+	for_each_engine(fd, engine) {
+		if (engine == 0)
+			continue;
+
+		engines[nengine++] = engine;
+	}
+	igt_require(nengine);
+
+	obj[1].handle = gem_create(fd, 4096);
+	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
+	igt_until_timeout(timeout) {
+		for (unsigned int s = 0; s < nengine; s++) {
+			int64_t boost = 10e6; /* 10ms, long enough to sleep */
+			igt_spin_t *spin;
+
+			spin = __igt_spin_batch_new(fd, 0, engines[s], 0);
+			obj[0].handle = spin->handle;
+			for (unsigned int n = 0; n < nengine; n++) {
+				struct drm_i915_gem_execbuffer2 eb = {
+					.buffer_count = 2,
+					.buffers_ptr = to_user_pointer(obj),
+					.flags = engines[n],
+				};
+				for (unsigned int repeat = 0;
+				     repeat < 64;
+				     repeat++)
+					gem_execbuf(fd, &eb);
+			}
+			gem_wait(fd, spin->handle, &boost);
+			igt_spin_batch_free(fd, spin);
+
+			gem_quiescent_gpu(fd);
+		}
+	}
+
+	gem_close(fd, obj[1].handle);
+}
+
+igt_main
+{
+	const struct intel_execution_engine *e;
+	int fd = -1;
+
+	igt_skip_on_simulation();
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_INTEL);
+		igt_require_gem(fd);
+		igt_fork_hang_detector(fd);
+	}
+
+	for (e = intel_execution_engines; e->name; e++) {
+		/* default exec-id is purely symbolic */
+		if (e->exec_id == 0)
+			continue;
+
+		igt_subtest_f("%s", e->name) {
+			gem_require_ring(fd, e->exec_id | e->flags);
+			one(fd, e->exec_id | e->flags, 1, 150);
+		}
+	}
+
+	igt_subtest("all")
+		all(fd, 900);
+
+	igt_subtest("pulse")
+		pulse(fd, 900);
+
+	igt_fixture {
+		igt_stop_hang_detector();
+		close(fd);
+	}
+}
-- 
2.15.1

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✓ Fi.CI.BAT: success for tests: Add a random load generator

[Patchwork]

== Series Details ==

Series: tests: Add a random load generator
URL   : https://patchwork.freedesktop.org/series/37601/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
c219cc5307474cb53612ca759354f9473955e110 tools: Clear unused fields in register spec

with latest DRM-Tip kernel build CI_DRM_3720
2e76a2952923 drm-tip: 2018y-02m-02d-20h-33m-12s UTC integration manifest

Testlist changes:
+igt@gem_exec_load@all
+igt@gem_exec_load@blt
+igt@gem_exec_load@bsd
+igt@gem_exec_load@bsd1
+igt@gem_exec_load@bsd2
+igt@gem_exec_load@pulse
+igt@gem_exec_load@render
+igt@gem_exec_load@vebox

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:420s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:424s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:374s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:487s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:282s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:481s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:487s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:470s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:461s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:566s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:416s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:281s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:517s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:392s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:399s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:413s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:450s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:417s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:457s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:494s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:454s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:501s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:574s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:432s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:508s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:527s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:493s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:488s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:417s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:430s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:406s
Blacklisted hosts:
fi-glk-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:470s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_860/issues.html
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✗ Fi.CI.IGT: warning for tests: Add a random load generator

[Patchwork]

== Series Details ==

Series: tests: Add a random load generator
URL   : https://patchwork.freedesktop.org/series/37601/
State : warning

== Summary ==

Test kms_setmode:
        Subgroup basic:
                fail       -> PASS       (shard-hsw) fdo#99912
Test gem_linear_blits:
        Subgroup normal:
                pass       -> SKIP       (shard-apl)
Test kms_flip:
        Subgroup 2x-plain-flip-ts-check:
                fail       -> PASS       (shard-hsw)
        Subgroup 2x-flip-vs-expired-vblank-interruptible:
                fail       -> PASS       (shard-hsw) fdo#102887
        Subgroup blocking-wf_vblank:
                pass       -> DMESG-FAIL (shard-hsw) fdo#103928
        Subgroup 2x-plain-flip-fb-recreate:
                pass       -> FAIL       (shard-hsw) fdo#100368
Test perf:
        Subgroup oa-exponents:
                pass       -> FAIL       (shard-apl) fdo#102254
        Subgroup polling:
                pass       -> FAIL       (shard-hsw) fdo#102252
Test gem_eio:
        Subgroup in-flight-contexts:
                dmesg-warn -> PASS       (shard-snb) fdo#104058 +1
        Subgroup in-flight-suspend:
                fail       -> PASS       (shard-hsw) fdo#104676
Test kms_cursor_legacy:
        Subgroup flip-vs-cursor-atomic:
                fail       -> PASS       (shard-hsw) fdo#102670

fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102254 https://bugs.freedesktop.org/show_bug.cgi?id=102254
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#104058 https://bugs.freedesktop.org/show_bug.cgi?id=104058
fdo#104676 https://bugs.freedesktop.org/show_bug.cgi?id=104676
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670

shard-apl        total:2750 pass:1682 dwarn:1   dfail:0   fail:21  skip:1044 time:11875s
shard-hsw        total:2750 pass:1667 dwarn:1   dfail:1   fail:11  skip:1067 time:11629s
shard-snb        total:2750 pass:1273 dwarn:1   dfail:1   fail:10  skip:1463 time:6461s
Blacklisted hosts:
shard-kbl        total:2720 pass:1778 dwarn:1   dfail:1   fail:21  skip:916 time:9355s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_860/shards.html
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Re: [PATCH igt v2] tests: Add a random load generator

[Antonio Argenziano]

On 03/02/18 02:33, Chris Wilson wrote:
> Apply a random load to one or all engines in order to apply stress to
> RPS as it tries to constantly adjust the GPU frequency to meet the
> changing workload.
> 
> This can be used to reproduce the byt (j1900) system hang.
> 
> v2: igt_until_timeout
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>

> ---
>   tests/Makefile.sources |   1 +
>   tests/gem_exec_load.c  | 176 +++++++++++++++++++++++++++++++++++++++++++++++++
>   2 files changed, 177 insertions(+)
>   create mode 100644 tests/gem_exec_load.c
> 
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index 870c90935..8b5a18680 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -79,6 +79,7 @@ TESTS_progs = \
>   	gem_exec_gttfill \
>   	gem_exec_latency \
>   	gem_exec_lut_handle \
> +	gem_exec_load \
>   	gem_exec_nop \
>   	gem_exec_parallel \
>   	gem_exec_params \
> diff --git a/tests/gem_exec_load.c b/tests/gem_exec_load.c
> new file mode 100644
> index 000000000..ba88466a9
> --- /dev/null
> +++ b/tests/gem_exec_load.c
> @@ -0,0 +1,176 @@
> +/*
> + * Copyright © 2018 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "igt_rand.h"
> +#include "igt_sysfs.h"
> +
> +IGT_TEST_DESCRIPTION("Apply a random load to each engine");
> +
> +static inline uint32_t randmax(uint32_t *state, uint32_t ep_ro)
> +{
> +	return (uint64_t)hars_petruska_f54_1_random(state) * ep_ro >> 32;
> +}
> +
> +static void one(int fd, unsigned int engine, int scale, unsigned int timeout)
> +{
> +	uint32_t prng = engine;
> +	igt_spin_t *spin[2] = {};
> +	unsigned int max;
> +	int sysfs;
> +
> +	sysfs = igt_sysfs_open(fd, NULL);
> +
> +	max = sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz");
> +
> +	igt_until_timeout(timeout) {
> +		/*
> +		 * For every second, we randomly assign a desire % busyness
> +		 * and the frequency with which to submit a batch, defining
> +		 * a pulse-width modulation (pwm).
> +		 */
> +		unsigned int pwm = randmax(&prng, 1000);
> +		unsigned int load = randmax(&prng, pwm / scale);
> +		const unsigned int interval = 1e6 / pwm;
> +		unsigned int cur =
> +			max > 1 ? igt_sysfs_get_u32(sysfs, "gt_cur_freq_mhz") : 1;
> +
> +		while (pwm--) {
> +			if (randmax(&prng, pwm * cur) <= load * max) {
> +				spin[1] = __igt_spin_batch_new(fd, 0, engine, 0);
> +				load--;
> +			}
> +			igt_spin_batch_free(fd, spin[0]);
> +			spin[0] = spin[1];
> +			spin[1] = NULL;
> +
> +			usleep(interval);
> +		}
> +	}
> +	igt_spin_batch_free(fd, spin[0]);
> +
> +	close(sysfs);
> +}
> +
> +static void all(int fd, unsigned int timeout)
> +{
> +	unsigned int engines[16];
> +	unsigned int nengine;
> +	unsigned int engine;
> +
> +	nengine = 0;
> +	for_each_engine(fd, engine)
> +		engines[nengine++] = engine;
> +	igt_require(nengine > 1);
> +
> +	for (unsigned int n = 0; n < nengine; n++)
> +		igt_fork(child, 1)
> +			one(fd, engines[n], nengine/2, timeout);
> +	igt_waitchildren();
> +}
> +
> +static void pulse(int fd, unsigned int timeout)
> +{
> +	const uint32_t bbe = MI_BATCH_BUFFER_END;
> +	struct drm_i915_gem_exec_object2 obj[2] = {
> +		{ .flags = EXEC_OBJECT_WRITE },
> +	};
> +	unsigned int engines[16];
> +	unsigned int nengine;
> +	unsigned int engine;
> +
> +	nengine = 0;
> +	for_each_engine(fd, engine) {
> +		if (engine == 0)
> +			continue;
> +
> +		engines[nengine++] = engine;
> +	}
> +	igt_require(nengine);
> +
> +	obj[1].handle = gem_create(fd, 4096);
> +	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
> +
> +	igt_until_timeout(timeout) {
> +		for (unsigned int s = 0; s < nengine; s++) {
> +			int64_t boost = 10e6; /* 10ms, long enough to sleep */
> +			igt_spin_t *spin;
> +
> +			spin = __igt_spin_batch_new(fd, 0, engines[s], 0);
> +			obj[0].handle = spin->handle;
> +			for (unsigned int n = 0; n < nengine; n++) {
> +				struct drm_i915_gem_execbuffer2 eb = {
> +					.buffer_count = 2,
> +					.buffers_ptr = to_user_pointer(obj),
> +					.flags = engines[n],
> +				};
> +				for (unsigned int repeat = 0;
> +				     repeat < 64;
> +				     repeat++)
> +					gem_execbuf(fd, &eb);
> +			}
> +			gem_wait(fd, spin->handle, &boost);
> +			igt_spin_batch_free(fd, spin);
> +
> +			gem_quiescent_gpu(fd);
> +		}
> +	}
> +
> +	gem_close(fd, obj[1].handle);
> +}
> +
> +igt_main
> +{
> +	const struct intel_execution_engine *e;
> +	int fd = -1;
> +
> +	igt_skip_on_simulation();
> +
> +	igt_fixture {
> +		fd = drm_open_driver(DRIVER_INTEL);
> +		igt_require_gem(fd);
> +		igt_fork_hang_detector(fd);
> +	}
> +
> +	for (e = intel_execution_engines; e->name; e++) {
> +		/* default exec-id is purely symbolic */
> +		if (e->exec_id == 0)
> +			continue;
> +
> +		igt_subtest_f("%s", e->name) {
> +			gem_require_ring(fd, e->exec_id | e->flags);
> +			one(fd, e->exec_id | e->flags, 1, 150);
> +		}
> +	}
> +
> +	igt_subtest("all")
> +		all(fd, 900);
> +
> +	igt_subtest("pulse")
> +		pulse(fd, 900);
> +
> +	igt_fixture {
> +		igt_stop_hang_detector();
> +		close(fd);
> +	}
> +}
> 
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Re: [PATCH igt v2] tests: Add a random load generator

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Apply a random load to one or all engines in order to apply stress to
> RPS as it tries to constantly adjust the GPU frequency to meet the
> changing workload.
>
> This can be used to reproduce the byt (j1900) system hang.
>
> v2: igt_until_timeout
>

References: https://bugzilla.kernel.org/show_bug.cgi?id=109051

> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  tests/Makefile.sources |   1 +
>  tests/gem_exec_load.c  | 176 +++++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 177 insertions(+)
>  create mode 100644 tests/gem_exec_load.c
>
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index 870c90935..8b5a18680 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -79,6 +79,7 @@ TESTS_progs = \
>  	gem_exec_gttfill \
>  	gem_exec_latency \
>  	gem_exec_lut_handle \
> +	gem_exec_load \
>  	gem_exec_nop \
>  	gem_exec_parallel \
>  	gem_exec_params \
> diff --git a/tests/gem_exec_load.c b/tests/gem_exec_load.c
> new file mode 100644
> index 000000000..ba88466a9
> --- /dev/null
> +++ b/tests/gem_exec_load.c
> @@ -0,0 +1,176 @@
> +/*
> + * Copyright © 2018 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "igt_rand.h"
> +#include "igt_sysfs.h"
> +
> +IGT_TEST_DESCRIPTION("Apply a random load to each engine");
> +
> +static inline uint32_t randmax(uint32_t *state, uint32_t ep_ro)
> +{
> +	return (uint64_t)hars_petruska_f54_1_random(state) * ep_ro >> 32;
> +}
> +
> +static void one(int fd, unsigned int engine, int scale, unsigned int timeout)
> +{
> +	uint32_t prng = engine;
> +	igt_spin_t *spin[2] = {};
> +	unsigned int max;
> +	int sysfs;
> +
> +	sysfs = igt_sysfs_open(fd, NULL);
> +
> +	max = sysfs < 0 ? 1 : igt_sysfs_get_u32(sysfs, "gt_max_freq_mhz");
> +
> +	igt_until_timeout(timeout) {
> +		/*
> +		 * For every second, we randomly assign a desire % busyness
> +		 * and the frequency with which to submit a batch, defining
> +		 * a pulse-width modulation (pwm).
> +		 */
> +		unsigned int pwm = randmax(&prng, 1000);
> +		unsigned int load = randmax(&prng, pwm / scale);
> +		const unsigned int interval = 1e6 / pwm;
> +		unsigned int cur =
> +			max > 1 ? igt_sysfs_get_u32(sysfs, "gt_cur_freq_mhz") : 1;
> +
> +		while (pwm--) {
> +			if (randmax(&prng, pwm * cur) <= load * max) {
> +				spin[1] = __igt_spin_batch_new(fd, 0, engine, 0);
> +				load--;
> +			}
> +			igt_spin_batch_free(fd, spin[0]);
> +			spin[0] = spin[1];
> +			spin[1] = NULL;
> +
> +			usleep(interval);
> +		}
> +	}
> +	igt_spin_batch_free(fd, spin[0]);
> +
> +	close(sysfs);
> +}
> +
> +static void all(int fd, unsigned int timeout)
> +{
> +	unsigned int engines[16];
> +	unsigned int nengine;
> +	unsigned int engine;
> +
> +	nengine = 0;
> +	for_each_engine(fd, engine)
> +		engines[nengine++] = engine;
> +	igt_require(nengine > 1);
> +
> +	for (unsigned int n = 0; n < nengine; n++)
> +		igt_fork(child, 1)
> +			one(fd, engines[n], nengine/2, timeout);

nengine/2 a little unexpected. You want a more load on
multiengine tests?

> +	igt_waitchildren();
> +}
> +
> +static void pulse(int fd, unsigned int timeout)
> +{
> +	const uint32_t bbe = MI_BATCH_BUFFER_END;
> +	struct drm_i915_gem_exec_object2 obj[2] = {
> +		{ .flags = EXEC_OBJECT_WRITE },
> +	};
> +	unsigned int engines[16];
> +	unsigned int nengine;
> +	unsigned int engine;
> +
> +	nengine = 0;
> +	for_each_engine(fd, engine) {
> +		if (engine == 0)
> +			continue;
> +
> +		engines[nengine++] = engine;
> +	}
> +	igt_require(nengine);
> +
> +	obj[1].handle = gem_create(fd, 4096);
> +	gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
> +
> +	igt_until_timeout(timeout) {
> +		for (unsigned int s = 0; s < nengine; s++) {
> +			int64_t boost = 10e6; /* 10ms, long enough to sleep */

..long enough to let cpu sleep

> +			igt_spin_t *spin;
> +
> +			spin = __igt_spin_batch_new(fd, 0, engines[s], 0);
> +			obj[0].handle = spin->handle;
> +			for (unsigned int n = 0; n < nengine; n++) {
> +				struct drm_i915_gem_execbuffer2 eb = {
> +					.buffer_count = 2,
> +					.buffers_ptr = to_user_pointer(obj),
> +					.flags = engines[n],
> +				};
> +				for (unsigned int repeat = 0;
> +				     repeat < 64;
> +				     repeat++)
> +					gem_execbuf(fd, &eb);

As discussed in irc, there is not builtin randomness here. The
question is:  should there be? Regardless, this test did manage
to system hang j1900 so there is great value in here,
which should be preserved. Perhaps by casting this pattern to bronze
and doing improvements on another subtest until it proves
to be more effective on hanging :)

Thanks for the effort to make a more deterministic way
of bringing this nasty bugger closer to daylight.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> +			}
> +			gem_wait(fd, spin->handle, &boost);
> +			igt_spin_batch_free(fd, spin);
> +
> +			gem_quiescent_gpu(fd);
> +		}
> +	}
> +
> +	gem_close(fd, obj[1].handle);
> +}
> +
> +igt_main
> +{
> +	const struct intel_execution_engine *e;
> +	int fd = -1;
> +
> +	igt_skip_on_simulation();
> +
> +	igt_fixture {
> +		fd = drm_open_driver(DRIVER_INTEL);
> +		igt_require_gem(fd);
> +		igt_fork_hang_detector(fd);
> +	}
> +
> +	for (e = intel_execution_engines; e->name; e++) {
> +		/* default exec-id is purely symbolic */
> +		if (e->exec_id == 0)
> +			continue;
> +
> +		igt_subtest_f("%s", e->name) {
> +			gem_require_ring(fd, e->exec_id | e->flags);
> +			one(fd, e->exec_id | e->flags, 1, 150);
> +		}
> +	}
> +
> +	igt_subtest("all")
> +		all(fd, 900);
> +
> +	igt_subtest("pulse")
> +		pulse(fd, 900);
> +
> +	igt_fixture {
> +		igt_stop_hang_detector();
> +		close(fd);
> +	}
> +}
> -- 
> 2.15.1
>
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Re: [PATCH igt v2] tests: Add a random load generator

[Arkadiusz Hiler]

On Mon, Jan 22, 2018 at 11:14:01AM +0200, Chris Wilson wrote:
> Apply a random load to one or all engines in order to apply stress to
> RPS as it tries to constantly adjust the GPU frequency to meet the
> changing workload.

Doing some IGT archeology here.

Seems like both 'all' and 'pulse' subtests cause nasty incompletes.
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_809/shards-all.html#igt@gem_exec_load@all

What are the plans for the gem_exec_load nowadays?

- Arek
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Re: [PATCH igt v2] tests: Add a random load generator

[Chris Wilson]

Quoting Arkadiusz Hiler (2018-02-28 12:11:41)
> On Mon, Jan 22, 2018 at 11:14:01AM +0200, Chris Wilson wrote:
> > Apply a random load to one or all engines in order to apply stress to
> > RPS as it tries to constantly adjust the GPU frequency to meet the
> > changing workload.
> 
> Doing some IGT archeology here.
> 
> Seems like both 'all' and 'pulse' subtests cause nasty incompletes.
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_809/shards-all.html#igt@gem_exec_load@all

Not nasty, just a failure in the test runner. They are intentionally
long running tests as the problem may take days to manifest.
-Chris
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