Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: Introduce for_each_shared_dpll()
Date: Tue, 04 Oct 2022 12:36:52 +0300	[thread overview]
Message-ID: <87wn9gszez.fsf@intel.com> (raw)
In-Reply-To: <20220926191341.5495-4-ville.syrjala@linux.intel.com>

On Mon, 26 Sep 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index b8dce4e9ac54..d419f4f98d28 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -36,6 +36,10 @@
>  	(void) (&__a == &__b);			\
>  	__a > __b ? (__a - __b) : (__b - __a); })
>  
> +#define for_each_shared_dpll(__i915, __pll, __i) \
> +	for ((__i) = 0; (__i) < (__i915)->display.dpll.num_shared_dpll && \
> +		     ((__pll) = &(__i915)->display.dpll.shared_dplls[(__i)]); (__i)++)
> +

A follow-up could drop dpll.num_shared_dpll altogether, and use
ARRAY_SIZE() to loop. This anyway stops at first NULL value.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center

  parent reply	other threads:[~2022-10-04  9:37 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-26 19:13 [Intel-gfx] [PATCH v2 0/4] drm/i915: Start cleaning up the DPLL ID mess Ville Syrjala
2022-09-26 19:13 ` [Intel-gfx] [PATCH v2 1/4] drm/i915: Stop requiring PLL index == PLL ID Ville Syrjala
2022-09-26 19:13 ` [Intel-gfx] [PATCH v2 2/4] drm/i915: Decouple I915_NUM_PLLS from PLL IDs Ville Syrjala
2022-09-26 19:13 ` [Intel-gfx] [PATCH v2 3/4] drm/i915: Introduce for_each_shared_dpll() Ville Syrjala
2022-10-04  9:34   ` Jani Nikula
2022-10-04  9:36   ` Jani Nikula [this message]
2022-09-26 19:13 ` [Intel-gfx] [PATCH v2 4/4] drm/i915: s/dev_priv/i915/ in the shared_dpll code Ville Syrjala
2022-09-27  0:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start cleaning up the DPLL ID mess (rev2) Patchwork
2022-09-27  0:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-27  1:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-27 12:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-10-04  9:37 ` [Intel-gfx] [PATCH v2 0/4] drm/i915: Start cleaning up the DPLL ID mess Jani Nikula

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87wn9gszez.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox