From: Jani Nikula <jani.nikula@linux.intel.com>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: Re: [PATCH] drm/i915: dp aux irq support for g4x/vlv
Date: Thu, 31 Oct 2013 10:44:00 +0200 [thread overview]
Message-ID: <87wqktde3z.fsf@intel.com> (raw)
In-Reply-To: <1383164379-16985-1-git-send-email-daniel.vetter@ffwll.ch>
On Wed, 30 Oct 2013, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> Now we have this everywhere. Next up would be to wire up the DP
> hotplug pin to speed up panel power sequencing for eDP panels ...
>
> I've decided to leave the has_aux_irq logic in the code, it should
> come handy for hw bringup.
>
> For testing/fail-safety the dp aux code already has a timeout when
> waiting for interrupts to signal completion and screams rather loud if
> they don't arrive in time. Given that we need a real piece of hw to
> talk to anyway this is probably as good as it gets.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 6 ++++++
> drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 3 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 2a44816..7c075a2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1375,6 +1375,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
>
> intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
>
> + if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
> + dp_aux_irq_handler(dev);
> +
> I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
> I915_READ(PORT_HOTPLUG_STAT);
> }
> @@ -3256,6 +3259,9 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
> intel_hpd_irq_handler(dev, hotplug_trigger,
> IS_G4X(dev) ? hpd_status_gen4 : hpd_status_i915);
>
> + if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
> + dp_aux_irq_handler(dev);
Should the condition have && IS_G4X(dev) there too? Bits 4:3 are sync
polarity on 965 per my spec. Not that it matters much since that won't
have DP anyway.
Otherwise looks okay as far as I can tell. The above fixed or not,
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> +
> I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
> I915_READ(PORT_HOTPLUG_STAT);
> }
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 4d2db59..447fd83 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2116,6 +2116,10 @@
> #define CRT_HOTPLUG_MONITOR_COLOR (3 << 8)
> #define CRT_HOTPLUG_MONITOR_MONO (2 << 8)
> #define CRT_HOTPLUG_MONITOR_NONE (0 << 8)
> +#define DP_AUX_CHANNEL_D_INT_STATUS_G4X (1 << 6)
> +#define DP_AUX_CHANNEL_C_INT_STATUS_G4X (1 << 5)
> +#define DP_AUX_CHANNEL_B_INT_STATUS_G4X (1 << 4)
> +#define DP_AUX_CHANNEL_MASK_INT_STATUS_G4X (1 << 4)
> /* SDVO is different across gen3/4 */
> #define SDVOC_HOTPLUG_INT_STATUS_G4X (1 << 3)
> #define SDVOB_HOTPLUG_INT_STATUS_G4X (1 << 2)
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index b3cc333..7fa4518 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -404,7 +404,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> int i, ret, recv_bytes;
> uint32_t status;
> int try, precharge, clock = 0;
> - bool has_aux_irq = INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev);
> + bool has_aux_irq = true;
>
> /* dp aux is extremely sensitive to irq latency, hence request the
> * lowest possible wakeup latency and so prevent the cpu from going into
> --
> 1.8.4.rc3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
next prev parent reply other threads:[~2013-10-31 8:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-30 20:19 [PATCH] drm/i915: dp aux irq support for g4x/vlv Daniel Vetter
2013-10-31 8:44 ` Jani Nikula [this message]
2013-10-31 8:53 ` Daniel Vetter
2013-11-18 8:01 ` Daniel Vetter
[not found] ` <10352_1384761690_5289C95A_10352_731_1_20131118080117.GA8203@phenom.ffwll.local>
2013-11-18 9:42 ` [PATCH] Watermark level workaround for i830 Thomas Richter
2013-11-19 9:55 ` Fwd: " Thomas Richter
2013-11-19 10:24 ` Daniel Vetter
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