[PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[Matt Roper]

Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
this just extends the upper limit; we will continue to honor the max
data rate specified in the VBT in cases where it is lower than HBR3.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 24b56b2a76c8..b099a9dc28fd 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
 	enum port port = dig_port->base.port;
 
 	if (intel_port_is_combophy(dev_priv, port) &&
+	    !IS_ELKHARTLAKE(dev_priv) &&
 	    !intel_dp_is_edp(intel_dp))
 		return 540000;
 
-- 
2.14.5

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Re: [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[Manasi Navare]

On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
> Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
> this just extends the upper limit; we will continue to honor the max
> data rate specified in the VBT in cases where it is lower than HBR3.
> 
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Yes looks good to me.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 24b56b2a76c8..b099a9dc28fd 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
>  	enum port port = dig_port->base.port;
>  
>  	if (intel_port_is_combophy(dev_priv, port) &&
> +	    !IS_ELKHARTLAKE(dev_priv) &&
>  	    !intel_dp_is_edp(intel_dp))
>  		return 540000;
>  
> -- 
> 2.14.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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✓ Fi.CI.BAT: success for drm/i915/ehl: Support HBR3 on EHL combo PHY

[Patchwork]

== Series Details ==

Series: drm/i915/ehl: Support HBR3 on EHL combo PHY
URL   : https://patchwork.freedesktop.org/series/61690/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6198 -> Patchwork_13185
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/

Known issues
------------

  Here are the changes found in Patchwork_13185 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@read_all_entries:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/fi-icl-u3/igt@debugfs_test@read_all_entries.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/fi-icl-u3/igt@debugfs_test@read_all_entries.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u3:          [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#108569])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/fi-icl-u3/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-cml-u2:          [PASS][5] -> [FAIL][6] ([fdo#110627])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html

  
#### Possible fixes ####

  * igt@core_auth@basic-auth:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/fi-icl-u3/igt@core_auth@basic-auth.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/fi-icl-u3/igt@core_auth@basic-auth.html

  * igt@gem_ctx_switch@basic-default:
    - {fi-icl-guc}:       [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/fi-icl-guc/igt@gem_ctx_switch@basic-default.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/fi-icl-guc/igt@gem_ctx_switch@basic-default.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [FAIL][11] ([fdo#103167]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627


Participating hosts (52 -> 46)
------------------------------

  Additional (1): fi-icl-dsi 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7560u fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_6198 -> Patchwork_13185

  CI_DRM_6198: 5550e8de34053c54224724c876cda34db56fc15c @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5041: 4f2b9f5930fa33d091cf89637dc6e7f76f632a88 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13185: 3288b87377675b05d743dee4cf458ba48e6f3e54 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

3288b8737767 drm/i915/ehl: Support HBR3 on EHL combo PHY

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[Matt Roper]

On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
> On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
> > Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
> > this just extends the upper limit; we will continue to honor the max
> > data rate specified in the VBT in cases where it is lower than HBR3.
> > 
> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> 
> Yes looks good to me.
> 
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> 
> Manasi

Thanks for the quick review.  CI looks happy too, so pushed to dinq.


Matt

> 
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 24b56b2a76c8..b099a9dc28fd 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
> >  	enum port port = dig_port->base.port;
> >  
> >  	if (intel_port_is_combophy(dev_priv, port) &&
> > +	    !IS_ELKHARTLAKE(dev_priv) &&
> >  	    !intel_dp_is_edp(intel_dp))
> >  		return 540000;
> >  
> > -- 
> > 2.14.5
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[Jani Nikula]

On Wed, 05 Jun 2019, Matt Roper <matthew.d.roper@intel.com> wrote:
> On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
>> On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
>> > Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
>> > this just extends the upper limit; we will continue to honor the max
>> > data rate specified in the VBT in cases where it is lower than HBR3.
>> > 
>> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>> 
>> Yes looks good to me.
>> 
>> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
>> 
>> Manasi
>
> Thanks for the quick review.  CI looks happy too, so pushed to dinq.

CI didn't actually report full IGT runs yet, just the BAT results.

BR,
Jani.


>
>
> Matt
>
>> 
>> > ---
>> >  drivers/gpu/drm/i915/intel_dp.c | 1 +
>> >  1 file changed, 1 insertion(+)
>> > 
>> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> > index 24b56b2a76c8..b099a9dc28fd 100644
>> > --- a/drivers/gpu/drm/i915/intel_dp.c
>> > +++ b/drivers/gpu/drm/i915/intel_dp.c
>> > @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
>> >  	enum port port = dig_port->base.port;
>> >  
>> >  	if (intel_port_is_combophy(dev_priv, port) &&
>> > +	    !IS_ELKHARTLAKE(dev_priv) &&
>> >  	    !intel_dp_is_edp(intel_dp))
>> >  		return 540000;
>> >  
>> > -- 
>> > 2.14.5
>> > 
>> > _______________________________________________
>> > Intel-gfx mailing list
>> > Intel-gfx@lists.freedesktop.org
>> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[Rodrigo Vivi]

On Wed, Jun 05, 2019 at 03:15:22PM -0700, Matt Roper wrote:
> On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
> > On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
> > > Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
> > > this just extends the upper limit; we will continue to honor the max
> > > data rate specified in the VBT in cases where it is lower than HBR3.
> > > 
> > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > 
> > Yes looks good to me.
> > 
> > Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> > 
> > Manasi
> 
> Thanks for the quick review.  CI looks happy too, so pushed to dinq.
> 
> 
> Matt
> 
> > 
> > > ---
> > >  drivers/gpu/drm/i915/intel_dp.c | 1 +
> > >  1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > index 24b56b2a76c8..b099a9dc28fd 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
> > >  	enum port port = dig_port->base.port;
> > >  
> > >  	if (intel_port_is_combophy(dev_priv, port) &&
> > > +	    !IS_ELKHARTLAKE(dev_priv) &&

I wonder if we shouldn't use IS_ICELAKE instead of !IS_ELKHARTLAKE here...
but it seems to late...

But something to remember to pay attention on any upcoming platform...

> > >  	    !intel_dp_is_edp(intel_dp))
> > >  		return 540000;
> > >  
> > > -- 
> > > 2.14.5
> > > 
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[Lucas De Marchi]

On Thu, Jun 06, 2019 at 09:00:56AM -0700, Rodrigo Vivi wrote:
>On Wed, Jun 05, 2019 at 03:15:22PM -0700, Matt Roper wrote:
>> On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
>> > On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
>> > > Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
>> > > this just extends the upper limit; we will continue to honor the max
>> > > data rate specified in the VBT in cases where it is lower than HBR3.
>> > >
>> > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>> >
>> > Yes looks good to me.
>> >
>> > Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
>> >
>> > Manasi
>>
>> Thanks for the quick review.  CI looks happy too, so pushed to dinq.
>>
>>
>> Matt
>>
>> >
>> > > ---
>> > >  drivers/gpu/drm/i915/intel_dp.c | 1 +
>> > >  1 file changed, 1 insertion(+)
>> > >
>> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> > > index 24b56b2a76c8..b099a9dc28fd 100644
>> > > --- a/drivers/gpu/drm/i915/intel_dp.c
>> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
>> > > @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
>> > >  	enum port port = dig_port->base.port;
>> > >
>> > >  	if (intel_port_is_combophy(dev_priv, port) &&
>> > > +	    !IS_ELKHARTLAKE(dev_priv) &&
>
>I wonder if we shouldn't use IS_ICELAKE instead of !IS_ELKHARTLAKE here...
>but it seems to late...

if we apply the principle we have been adopting of always using the last
platform for the next one... I agree, this should be IS_ICELAKE().

Lucas De Marchi

>
>But something to remember to pay attention on any upcoming platform...
>
>> > >  	    !intel_dp_is_edp(intel_dp))
>> > >  		return 540000;
>> > >
>> > > --
>> > > 2.14.5
>> > >
>> > > _______________________________________________
>> > > Intel-gfx mailing list
>> > > Intel-gfx@lists.freedesktop.org
>> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>
>> --
>> Matt Roper
>> Graphics Software Engineer
>> IoTG Platform Enabling & Development
>> Intel Corporation
>> (916) 356-2795
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915/ehl: Support HBR3 on EHL combo PHY

[Matt Roper]

On Thu, Jun 06, 2019 at 09:09:08AM -0700, Lucas De Marchi wrote:
> On Thu, Jun 06, 2019 at 09:00:56AM -0700, Rodrigo Vivi wrote:
> > On Wed, Jun 05, 2019 at 03:15:22PM -0700, Matt Roper wrote:
> > > On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
> > > > On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
> > > > > Unlike ICL, EHL's combo PHYs can support HBR3 data rates.  Note that
> > > > > this just extends the upper limit; we will continue to honor the max
> > > > > data rate specified in the VBT in cases where it is lower than HBR3.
> > > > >
> > > > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > > >
> > > > Yes looks good to me.
> > > >
> > > > Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> > > >
> > > > Manasi
> > > 
> > > Thanks for the quick review.  CI looks happy too, so pushed to dinq.
> > > 
> > > 
> > > Matt
> > > 
> > > >
> > > > > ---
> > > > >  drivers/gpu/drm/i915/intel_dp.c | 1 +
> > > > >  1 file changed, 1 insertion(+)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > > > > index 24b56b2a76c8..b099a9dc28fd 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > > @@ -332,6 +332,7 @@ static int icl_max_source_rate(struct intel_dp *intel_dp)
> > > > >  	enum port port = dig_port->base.port;
> > > > >
> > > > >  	if (intel_port_is_combophy(dev_priv, port) &&
> > > > > +	    !IS_ELKHARTLAKE(dev_priv) &&
> > 
> > I wonder if we shouldn't use IS_ICELAKE instead of !IS_ELKHARTLAKE here...
> > but it seems to late...
> 
> if we apply the principle we have been adopting of always using the last
> platform for the next one... I agree, this should be IS_ICELAKE().

Makes sense.  I assumed this was something more tied to EHL's lack of TC
ports rather than something that would necessarily be carried forward to
future platforms, but as you point out I probably shouldn't make guesses
about future platforms like that and should just follow our existing
convention of inheriting all features.  I'll send a follow-up patch to
flip this to IS_ICELAKE in a little bit.


Matt

> 
> Lucas De Marchi
> 
> > 
> > But something to remember to pay attention on any upcoming platform...
> > 
> > > > >  	    !intel_dp_is_edp(intel_dp))
> > > > >  		return 540000;
> > > > >
> > > > > --
> > > > > 2.14.5
> > > > >
> > > > > _______________________________________________
> > > > > Intel-gfx mailing list
> > > > > Intel-gfx@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > 
> > > --
> > > Matt Roper
> > > Graphics Software Engineer
> > > IoTG Platform Enabling & Development
> > > Intel Corporation
> > > (916) 356-2795
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.IGT: failure for drm/i915/ehl: Support HBR3 on EHL combo PHY

[Patchwork]

== Series Details ==

Series: drm/i915/ehl: Support HBR3 on EHL combo PHY
URL   : https://patchwork.freedesktop.org/series/61690/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6198_full -> Patchwork_13185_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_13185_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_13185_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_13185_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_mmap_write_crc@main:
    - shard-skl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-skl9/igt@kms_mmap_write_crc@main.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-skl6/igt@kms_mmap_write_crc@main.html

  
Known issues
------------

  Here are the changes found in Patchwork_13185_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +4 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-apl1/igt@gem_softpin@noreloc-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-apl8/igt@gem_softpin@noreloc-s3.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
    - shard-glk:          [PASS][5] -> [INCOMPLETE][6] ([fdo#103359] / [k.org#198133])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-glk5/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-glk2/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-apl:          [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][9] -> [FAIL][10] ([fdo#103167]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite:
    - shard-hsw:          [PASS][11] -> [SKIP][12] ([fdo#109271]) +18 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-hsw7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#109642])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-iclb7/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_sequence@get-forked-busy:
    - shard-hsw:          [PASS][15] -> [INCOMPLETE][16] ([fdo#103540])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-hsw5/igt@kms_sequence@get-forked-busy.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-hsw2/igt@kms_sequence@get-forked-busy.html

  
#### Possible fixes ####

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          [FAIL][17] ([fdo#109661]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-snb1/igt@gem_eio@unwedge-stress.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-snb4/igt@gem_eio@unwedge-stress.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-iclb:         [FAIL][19] ([fdo#108686]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-iclb4/igt@gem_tiled_swapping@non-threaded.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-iclb8/igt@gem_tiled_swapping@non-threaded.html
    - shard-hsw:          [INCOMPLETE][21] ([fdo#103540]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-hsw5/igt@gem_tiled_swapping@non-threaded.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-hsw2/igt@gem_tiled_swapping@non-threaded.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-hsw:          [SKIP][23] ([fdo#109271]) -> [PASS][24] +23 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-hsw1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-hsw8/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][25] ([fdo#102887] / [fdo#105363]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [INCOMPLETE][27] ([fdo#109507]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-skl10/igt@kms_flip@flip-vs-suspend-interruptible.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-skl9/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-glk:          [INCOMPLETE][29] ([fdo#103359] / [k.org#198133]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-glk2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-glk8/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render:
    - shard-iclb:         [FAIL][31] ([fdo#103167]) -> [PASS][32] +3 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt:
    - shard-skl:          [FAIL][33] ([fdo#103167]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [SKIP][35] ([fdo#109441]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-iclb5/igt@kms_psr@psr2_basic.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-iclb2/igt@kms_psr@psr2_basic.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][37] ([fdo#99912]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-apl5/igt@kms_setmode@basic.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-apl4/igt@kms_setmode@basic.html

  * igt@kms_sysfs_edid_timing:
    - shard-iclb:         [FAIL][39] ([fdo#100047]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-iclb3/igt@kms_sysfs_edid_timing.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-iclb5/igt@kms_sysfs_edid_timing.html

  
#### Warnings ####

  * igt@gem_tiled_swapping@non-threaded:
    - shard-apl:          [FAIL][41] ([fdo#108686]) -> [DMESG-WARN][42] ([fdo#108686])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6198/shard-apl8/igt@gem_tiled_swapping@non-threaded.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/shard-apl6/igt@gem_tiled_swapping@non-threaded.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#110851]: https://bugs.freedesktop.org/show_bug.cgi?id=110851
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_6198 -> Patchwork_13185

  CI_DRM_6198: 5550e8de34053c54224724c876cda34db56fc15c @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5041: 4f2b9f5930fa33d091cf89637dc6e7f76f632a88 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13185: 3288b87377675b05d743dee4cf458ba48e6f3e54 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13185/
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