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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/6] drm/i915: Generalize the PPS vlv_pipe_check() stuff
Date: Wed, 09 Nov 2022 17:24:31 +0200	[thread overview]
Message-ID: <87zgd05exc.fsf@intel.com> (raw)
In-Reply-To: <20221109111649.23062-4-ville.syrjala@linux.intel.com>

On Wed, 09 Nov 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Restate the vlv_pipe_check() stuff in terms of PPS index
> (rather than pipe, which it is on VLV/CHV) so that we can
> reuse this same mechanim on other platforms as well.
>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_pps.c | 27 ++++++++++--------------
>  1 file changed, 11 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 22f5e08d396b..84265096f751 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -233,31 +233,26 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
>  	return backlight_controller;
>  }
>  
> -typedef bool (*vlv_pipe_check)(struct drm_i915_private *dev_priv,
> -			       enum pipe pipe);
> +typedef bool (*pps_check)(struct drm_i915_private *dev_priv, int pps_idx);
>  
> -static bool vlv_pipe_has_pp_on(struct drm_i915_private *dev_priv,
> -			       enum pipe pipe)
> +static bool pps_has_pp_on(struct drm_i915_private *dev_priv, int pps_idx)
>  {
> -	return intel_de_read(dev_priv, PP_STATUS(pipe)) & PP_ON;
> +	return intel_de_read(dev_priv, PP_STATUS(pps_idx)) & PP_ON;
>  }
>  
> -static bool vlv_pipe_has_vdd_on(struct drm_i915_private *dev_priv,
> -				enum pipe pipe)
> +static bool pps_has_vdd_on(struct drm_i915_private *dev_priv, int pps_idx)
>  {
> -	return intel_de_read(dev_priv, PP_CONTROL(pipe)) & EDP_FORCE_VDD;
> +	return intel_de_read(dev_priv, PP_CONTROL(pps_idx)) & EDP_FORCE_VDD;
>  }
>  
> -static bool vlv_pipe_any(struct drm_i915_private *dev_priv,
> -			 enum pipe pipe)
> +static bool pps_any(struct drm_i915_private *dev_priv, int pps_idx)
>  {
>  	return true;
>  }
>  
>  static enum pipe
>  vlv_initial_pps_pipe(struct drm_i915_private *dev_priv,
> -		     enum port port,
> -		     vlv_pipe_check pipe_check)
> +		     enum port port, pps_check check)
>  {
>  	enum pipe pipe;
>  
> @@ -268,7 +263,7 @@ vlv_initial_pps_pipe(struct drm_i915_private *dev_priv,
>  		if (port_sel != PANEL_PORT_SELECT_VLV(port))
>  			continue;
>  
> -		if (!pipe_check(dev_priv, pipe))
> +		if (!check(dev_priv, pipe))
>  			continue;
>  
>  		return pipe;
> @@ -289,15 +284,15 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
>  	/* try to find a pipe with this port selected */
>  	/* first pick one where the panel is on */
>  	intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
> -						      vlv_pipe_has_pp_on);
> +						      pps_has_pp_on);
>  	/* didn't find one? pick one where vdd is on */
>  	if (intel_dp->pps.pps_pipe == INVALID_PIPE)
>  		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
> -							      vlv_pipe_has_vdd_on);
> +							      pps_has_vdd_on);
>  	/* didn't find one? pick one with just the correct port */
>  	if (intel_dp->pps.pps_pipe == INVALID_PIPE)
>  		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
> -							      vlv_pipe_any);
> +							      pps_any);
>  
>  	/* didn't find one? just let vlv_power_sequencer_pipe() pick one when needed */
>  	if (intel_dp->pps.pps_pipe == INVALID_PIPE) {

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2022-11-09 15:24 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-09 11:16 [Intel-gfx] [PATCH 0/6] drm/i915: Fake dual eDP VBT fixes Ville Syrjala
2022-11-09 11:16 ` [Intel-gfx] [PATCH 1/6] drm/i915: Introduce intel_panel_init_alloc() Ville Syrjala
2022-11-09 14:49   ` Jani Nikula
2022-11-09 11:16 ` [Intel-gfx] [PATCH 2/6] drm/i915: Do panel VBT init early if the VBT declares an explicit panel type Ville Syrjala
2022-11-09 14:59   ` Jani Nikula
2022-11-09 11:16 ` [Intel-gfx] [PATCH 3/6] drm/i915: Generalize the PPS vlv_pipe_check() stuff Ville Syrjala
2022-11-09 15:24   ` Jani Nikula [this message]
2022-11-09 11:16 ` [Intel-gfx] [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially on bxt/glk Ville Syrjala
2022-11-10 13:56   ` Manna, Animesh
2022-11-10 14:41     ` Ville Syrjälä
2022-11-10 19:30       ` Ville Syrjälä
2022-11-09 11:16 ` [Intel-gfx] [PATCH 5/6] drm/915: Extend dual PPS handlind for ICP+ Ville Syrjala
2022-11-10 14:09   ` Manna, Animesh
2022-11-10 14:45   ` Ville Syrjälä
2022-11-09 11:16 ` [Intel-gfx] [PATCH 6/6] drm/i915: Ignore LFP2 for now Ville Syrjala
2022-11-09 11:31   ` Ville Syrjälä
2022-11-09 14:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fake dual eDP VBT fixes Patchwork
2022-11-09 14:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-09 19:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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