Re: [PATCH v2 09/10] drm/i915/cmtg: enable cmtg in secondary mode

[Jani Nikula <jani.nikula@intel.com>]

On Tue, 03 Feb 2026, Animesh Manna <animesh.manna@intel.com> wrote:
> From: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
>
> Wait for CMTG_SYNC_TO_PORT bit clear in cmtg enable sequence
> and then enable secondary mode for cmtg.
>
> Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cmtg.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
> index f7364c7408d5..d1ec9b79cef2 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> @@ -277,4 +277,18 @@ void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
>  
>  	/* Program Enable Cmtg */
>  	intel_cmtg_ctl_enable(crtc_state);
> +
> +	if (intel_de_wait_for_clear_ms(display, TRANS_CMTG_CTL(cpu_transcoder),
> +				       CMTG_SYNC_TO_PORT, 50)) {
> +		drm_WARN(display->drm, 1, "CMTG:%d enable timeout\n", cpu_transcoder);
> +		return;
> +	}

This should be part of the previous patch, right?

> +
> +	/*
> +	 *  eDP transcoder registers as secondary to CMTG by setting
> +	 *  TRANS_DDI_FUNC_CTL2[CMTG Secondary Mode].

What does this even mean?

> +	 */
> +	intel_de_rmw(display, TRANS_DDI_FUNC_CTL2(display, cpu_transcoder), 0, CMTG_SECONDARY_MODE);
> +
> +	drm_dbg_kms(display->drm, "CMTG:%d enabled\n", cpu_transcoder);

See transcoder_name().

>  }

-- 
Jani Nikula, Intel