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From: Jani Nikula <jani.nikula@intel.com>
To: "Kandpal, Suraj" <suraj.kandpal@intel.com>,
	"Manna, Animesh" <animesh.manna@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Cc: Dibin Moolakadan Subrahmanian
	<dibin.moolakadan.subrahmanian@intel.com>,
	"Manna, Animesh" <animesh.manna@intel.com>,
	"Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>,
	"Shankar, Uma" <uma.shankar@intel.com>
Subject: RE: [PATCH v2 01/10] drm/i915/cmtg: enable cmtg LNL onwards
Date: Thu, 05 Feb 2026 10:43:14 +0200	[thread overview]
Message-ID: <6205ad21c44367b94dcaa09964d63a6494c861cf@intel.com> (raw)
In-Reply-To: <DM3PPF208195D8D827F4A684F2F77BFDA37E399A@DM3PPF208195D8D.namprd11.prod.outlook.com>

On Thu, 05 Feb 2026, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> Subject: [PATCH v2 01/10] drm/i915/cmtg: enable cmtg LNL onwards
>> 
>> Introduce a flag for cmtg. LNL onwards CMTG support will be added.
>> Set the flag as per DISPLAY_VER() check.
>> 
>
> Use Capitalized versions of acronyms unless unavoidable(if you mention it as a part of a function)
> both in commit subject and message, this review stands for all patch in series it should be *CMTG
>
> Also please Bspec references to registers, sequences on all patches this makes life very easy to review
> This is also a review for all the patches in the series
>
>> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_display_types.h | 4 ++++
>>  drivers/gpu/drm/i915/display/intel_dp.c            | 4 ++++
>>  2 files changed, 8 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
>> b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index e6298279dc89..1081615a14fb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -1569,6 +1569,10 @@ struct intel_crtc {  #endif
>> 
>>  	bool vblank_psr_notify;
>> +
>> +	struct {
>> +		bool enable;
>> +	} cmtg;
>>  };
>> 
>>  struct intel_plane_error {
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index e2fd01d1a1e4..ecf8ed0c0265 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -3445,6 +3445,7 @@ intel_dp_compute_config(struct intel_encoder
>> *encoder,
>>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>>  	const struct drm_display_mode *fixed_mode;
>>  	struct intel_connector *connector = intel_dp->attached_connector;
>> +	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>>  	int ret = 0, link_bpp_x16;
>> 
>>  	fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
>> @@ -3549,6 +3550,9 @@ intel_dp_compute_config(struct intel_encoder
>> *encoder,
>>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp,
>> pipe_config, conn_state);
>> 
>> +	if (DISPLAY_VER(display) >= 15 && intel_dp_is_edp(intel_dp))
>> +		crtc->cmtg.enable = true;
>
> Should be >= 20 since LNL's version was 20.
> Also I don't see a point of having this as a variable in intel_crtc this can be checked as a macro or a function

Yeah, compute config should not modify anything but the crtc state.

BR,
Jani.


> Maybe you have to use intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) instead on intel_dp_is_edp but it should be better option
> According to me.
>
> Regards,
> Suraj Kandpal
>
>> +
>>  	return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp,
>> connector,
>>  							pipe_config);
>>  }
>> --
>> 2.29.0
>

-- 
Jani Nikula, Intel

  reply	other threads:[~2026-02-05  8:43 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-03 13:43 [PATCH v2 00/10] CMTG enablement Animesh Manna
2026-02-03 13:43 ` [PATCH v2 01/10] drm/i915/cmtg: enable cmtg LNL onwards Animesh Manna
2026-02-05  5:18   ` Kandpal, Suraj
2026-02-05  8:43     ` Jani Nikula [this message]
2026-02-03 13:43 ` [PATCH v2 02/10] drm/i915/cmtg: cmtg set clock select Animesh Manna
2026-02-05  5:25   ` Kandpal, Suraj
2026-02-03 13:44 ` [PATCH v2 03/10] drm/i915/cmtg: set timings for cmtg Animesh Manna
2026-02-05  5:35   ` Kandpal, Suraj
2026-02-05  8:47   ` Jani Nikula
2026-02-06  5:50     ` Manna, Animesh
2026-02-03 13:44 ` [PATCH v2 04/10] drm/i915/cmtg: program vrr registers of cmtg Animesh Manna
2026-02-06  2:54   ` Kandpal, Suraj
2026-02-03 13:44 ` [PATCH v2 05/10] drm/i915/cmtg: program set context latency " Animesh Manna
2026-02-06  3:08   ` Kandpal, Suraj
2026-02-03 13:44 ` [PATCH v2 06/10] drm/i915/cmtg: set transcoder mn for cmtg Animesh Manna
2026-02-06  3:22   ` Kandpal, Suraj
2026-02-03 13:44 ` [PATCH v2 07/10] drm/i915/cmtg: program sync to port " Animesh Manna
2026-02-06  3:28   ` Kandpal, Suraj
2026-02-03 13:44 ` [PATCH v2 08/10] drm/i915/cmtg: enable cmtg ctl Animesh Manna
2026-02-05  8:50   ` Jani Nikula
2026-02-06  5:52     ` Manna, Animesh
2026-02-03 13:44 ` [PATCH v2 09/10] drm/i915/cmtg: enable cmtg in secondary mode Animesh Manna
2026-02-05  8:53   ` Jani Nikula
2026-02-06  5:56     ` Manna, Animesh
2026-02-03 13:44 ` [PATCH v2 10/10] drm/i915/cmtg: disable CMTG on transcoder disable Animesh Manna
2026-02-06  3:31   ` Kandpal, Suraj
2026-02-03 14:52 ` ✗ i915.CI.BAT: failure for CMTG enablement (rev2) Patchwork

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