* [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution
@ 2019-04-10 11:43 Tvrtko Ursulin
2019-04-10 11:48 ` Chris Wilson
0 siblings, 1 reply; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-04-10 11:43 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Some displays might not support hardcoded 1024x768.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109294
---
tests/prime_vgem.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 60bb951c8cbe..458846add9ee 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -744,8 +744,22 @@ static void flip_to_vgem(int i915, int vgem,
static void test_flip(int i915, int vgem, unsigned hang)
{
- struct vgem_bo bo[2];
+ drmModeModeInfo *mode = NULL;
uint32_t fb_id[2], handle[2], crtc_id;
+ igt_display_t display;
+ igt_output_t *output;
+ struct vgem_bo bo[2];
+ enum pipe pipe;
+
+ igt_display_require(&display, i915);
+ igt_display_require_output(&display);
+
+ for_each_pipe_with_valid_output(&display, pipe, output) {
+ mode = igt_output_get_mode(output);
+ break;
+ }
+
+ igt_assert(mode);
signal(SIGHUP, sighandler);
@@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem, unsigned hang)
uint32_t offsets[4] = {};
int fd;
- bo[i].width = 1024;
- bo[i].height = 768;
+ bo[i].width = mode->hdisplay;
+ bo[i].height = mode->vdisplay;
bo[i].bpp = 32;
vgem_create(vgem, &bo[i]);
--
2.19.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution
2019-04-10 11:43 [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution Tvrtko Ursulin
@ 2019-04-10 11:48 ` Chris Wilson
2019-04-10 12:11 ` Tvrtko Ursulin
0 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2019-04-10 11:48 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2019-04-10 12:43:22)
> @@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem, unsigned hang)
> uint32_t offsets[4] = {};
> int fd;
>
> - bo[i].width = 1024;
> - bo[i].height = 768;
> + bo[i].width = mode->hdisplay;
> + bo[i].height = mode->vdisplay;
> bo[i].bpp = 32;
> vgem_create(vgem, &bo[i]);
That may not result in a buffer that we are able to flip to. :|
width = ALIGN(hdisplay, 16); vdisplay should be ok.
I would query what happened to the scalers though :)
-Chris
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution
2019-04-10 11:48 ` Chris Wilson
@ 2019-04-10 12:11 ` Tvrtko Ursulin
2019-05-07 8:14 ` [igt-dev] " Tvrtko Ursulin
2019-05-09 10:51 ` Kahola, Mika
0 siblings, 2 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-04-10 12:11 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Intel-gfx
On 10/04/2019 12:48, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-04-10 12:43:22)
>> @@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem, unsigned hang)
>> uint32_t offsets[4] = {};
>> int fd;
>>
>> - bo[i].width = 1024;
>> - bo[i].height = 768;
>> + bo[i].width = mode->hdisplay;
>> + bo[i].height = mode->vdisplay;
>> bo[i].bpp = 32;
>> vgem_create(vgem, &bo[i]);
>
> That may not result in a buffer that we are able to flip to. :|
> width = ALIGN(hdisplay, 16); vdisplay should be ok.
Oh.. well I don't know. Maarten helpfully described in the BZ that the
skip is due BO being too small for the FB. Aligning width would then
make it too large. Is that OK? Who assigned this display related IGT bug
to me anyway? :))
> I would query what happened to the scalers though :)
Are they supposed to automagicaly apply any fb to any output? Or an
explicit step is required? Regardless - it may be better to involve less
of the driver and hardware stack in a simple test.
Regards,
Tvrtko
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [igt-dev] [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution
2019-04-10 12:11 ` Tvrtko Ursulin
@ 2019-05-07 8:14 ` Tvrtko Ursulin
2019-05-09 10:51 ` Kahola, Mika
1 sibling, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-05-07 8:14 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Intel-gfx
+Maarten - could you please have a quick look at this patch to see if it
makes sense to you? (https://patchwork.freedesktop.org/series/59284/ -
if you don't have the mailing list history.)
Thanks,
Tvrtko
On 10/04/2019 13:11, Tvrtko Ursulin wrote:
>
> On 10/04/2019 12:48, Chris Wilson wrote:
>> Quoting Tvrtko Ursulin (2019-04-10 12:43:22)
>>> @@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem,
>>> unsigned hang)
>>> uint32_t offsets[4] = {};
>>> int fd;
>>> - bo[i].width = 1024;
>>> - bo[i].height = 768;
>>> + bo[i].width = mode->hdisplay;
>>> + bo[i].height = mode->vdisplay;
>>> bo[i].bpp = 32;
>>> vgem_create(vgem, &bo[i]);
>>
>> That may not result in a buffer that we are able to flip to. :|
>> width = ALIGN(hdisplay, 16); vdisplay should be ok.
>
> Oh.. well I don't know. Maarten helpfully described in the BZ that the
> skip is due BO being too small for the FB. Aligning width would then
> make it too large. Is that OK? Who assigned this display related IGT bug
> to me anyway? :))
>
>> I would query what happened to the scalers though :)
>
> Are they supposed to automagicaly apply any fb to any output? Or an
> explicit step is required? Regardless - it may be better to involve less
> of the driver and hardware stack in a simple test.
>
> Regards,
>
> Tvrtko
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution
2019-04-10 12:11 ` Tvrtko Ursulin
2019-05-07 8:14 ` [igt-dev] " Tvrtko Ursulin
@ 2019-05-09 10:51 ` Kahola, Mika
2019-05-09 12:14 ` Tvrtko Ursulin
1 sibling, 1 reply; 6+ messages in thread
From: Kahola, Mika @ 2019-05-09 10:51 UTC (permalink / raw)
To: igt-dev@lists.freedesktop.org, chris@chris-wilson.co.uk,
tvrtko.ursulin@linux.intel.com
Cc: Intel-gfx@lists.freedesktop.org
On Wed, 2019-04-10 at 13:11 +0100, Tvrtko Ursulin wrote:
> On 10/04/2019 12:48, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-04-10 12:43:22)
> > > @@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem,
> > > unsigned hang)
> > > uint32_t offsets[4] = {};
> > > int fd;
> > >
> > > - bo[i].width = 1024;
> > > - bo[i].height = 768;
> > > + bo[i].width = mode->hdisplay;
> > > + bo[i].height = mode->vdisplay;
> > > bo[i].bpp = 32;
> > > vgem_create(vgem, &bo[i]);
> >
> > That may not result in a buffer that we are able to flip to. :|
> > width = ALIGN(hdisplay, 16); vdisplay should be ok.
>
> Oh.. well I don't know. Maarten helpfully described in the BZ that
> the
> skip is due BO being too small for the FB. Aligning width would then
> make it too large. Is that OK? Who assigned this display related IGT
> bug
> to me anyway? :))
I don't know about that. I have a task to improve the test in my
backlog too :)
This patch definitely improves the test. However, I wasn't able to
apply the patch cleanly on my tree. Maybe it needs a rebase? Anyway, CI
seems to be happy with the change.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
>
> > I would query what happened to the scalers though :)
>
> Are they supposed to automagicaly apply any fb to any output? Or an
> explicit step is required? Regardless - it may be better to involve
> less
> of the driver and hardware stack in a simple test.
>
> Regards,
>
> Tvrtko
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution
2019-05-09 10:51 ` Kahola, Mika
@ 2019-05-09 12:14 ` Tvrtko Ursulin
0 siblings, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-05-09 12:14 UTC (permalink / raw)
To: Kahola, Mika, igt-dev@lists.freedesktop.org,
chris@chris-wilson.co.uk
Cc: Intel-gfx@lists.freedesktop.org
On 09/05/2019 11:51, Kahola, Mika wrote:
> On Wed, 2019-04-10 at 13:11 +0100, Tvrtko Ursulin wrote:
>> On 10/04/2019 12:48, Chris Wilson wrote:
>>> Quoting Tvrtko Ursulin (2019-04-10 12:43:22)
>>>> @@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem,
>>>> unsigned hang)
>>>> uint32_t offsets[4] = {};
>>>> int fd;
>>>>
>>>> - bo[i].width = 1024;
>>>> - bo[i].height = 768;
>>>> + bo[i].width = mode->hdisplay;
>>>> + bo[i].height = mode->vdisplay;
>>>> bo[i].bpp = 32;
>>>> vgem_create(vgem, &bo[i]);
>>>
>>> That may not result in a buffer that we are able to flip to. :|
>>> width = ALIGN(hdisplay, 16); vdisplay should be ok.
>>
>> Oh.. well I don't know. Maarten helpfully described in the BZ that
>> the
>> skip is due BO being too small for the FB. Aligning width would then
>> make it too large. Is that OK? Who assigned this display related IGT
>> bug
>> to me anyway? :))
> I don't know about that. I have a task to improve the test in my
> backlog too :)
>
> This patch definitely improves the test. However, I wasn't able to
> apply the patch cleanly on my tree. Maybe it needs a rebase? Anyway, CI
> seems to be happy with the change.
>
> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Thanks, pushed!
One less thing on your todo list now. :)
Regards,
Tvrtko
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^ permalink raw reply [flat|nested] 6+ messages in thread
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2019-04-10 11:43 [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution Tvrtko Ursulin
2019-04-10 11:48 ` Chris Wilson
2019-04-10 12:11 ` Tvrtko Ursulin
2019-05-07 8:14 ` [igt-dev] " Tvrtko Ursulin
2019-05-09 10:51 ` Kahola, Mika
2019-05-09 12:14 ` Tvrtko Ursulin
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