From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
"Bloomfield, Jon" <jon.bloomfield@intel.com>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
Matthew Auld <matthew.auld@intel.com>,
Ramalingam C <ramalingam.c@intel.com>
Subject: Re: [Intel-gfx] Small bar recovery vs compressed content on DG2
Date: Thu, 17 Mar 2022 10:35:10 +0100 [thread overview]
Message-ID: <9eb06b576948707f9a0527b07b58b9640821bf19.camel@linux.intel.com> (raw)
In-Reply-To: <164750662822.7267.9355161518284202141@jlahtine-mobl.ger.corp.intel.com>
On Thu, 2022-03-17 at 10:43 +0200, Joonas Lahtinen wrote:
> Quoting Thomas Hellström (2022-03-16 09:25:16)
> > Hi!
> >
> > Do we somehow need to clarify in the headers the semantics for
> > this?
> >
> > From my understanding when discussing the CCS migration series
> > with
> > Ram, the kernel will never do any resolving (compressing /
> > decompressing) migrations or evictions which basically implies the
> > following:
> >
> > *) Compressed data must have LMEM only placement, otherwise the GPU
> > would read garbage if accessing from SMEM.
>
> This has always been the case, so it should be documented in the uAPI
> headers and kerneldocs.
>
> > *) Compressed data can't be assumed to be mappable by the CPU,
> > because
> > in order to ensure that on small BAR, the placement needs to be
> > LMEM+SMEM.
>
> Not strictly true, as we could always migrate to the mappable region
> in
> the CPU fault handler. Will need the same set of tricks as with
> limited
> mappable GGTT in past.
In addition to Matt's reply:
Yes, if there is sufficient space. I'm not sure we want to complicate
this to migrate only part of the buffer to mappable on a fault basis?
Otherwise this is likely to fail.
One option is to allow cpu-mapping from SYSTEM like TTM is doing for
evicted buffers, even if SYSTEM is not in the placement list, and then
migrate back to LMEM for gpu access.
But can user-space even interpret the compressed data when CPU-mapping?
without access to the CCS metadata?
>
> > *) Neither can compressed data be part of a CAPTURE buffer, because
> > that
> > requires the data to be CPU-mappable.
>
> Especially this will be too big of a limitation which we can't really
> afford
> when it comes to debugging.
Same here WRT user-space interpretation.
This will become especially tricky on small BAR, because either we need
to fit all compressed buffers in the mappable portion, or be able to
blit the contents of the capture buffers from within the fence
signalling critical section, which will require a lot of work I guess.
/Thomas
>
> Regards, Joonas
>
> > Are we (and user-mode drivers) OK with these restrictions, or do we
> > need
> > to rethink?
> >
> > Thanks,
> >
> > Thomas
> >
> >
next prev parent reply other threads:[~2022-03-17 9:35 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-16 7:25 [Intel-gfx] Small bar recovery vs compressed content on DG2 Thomas Hellström
2022-03-17 8:43 ` Joonas Lahtinen
2022-03-17 9:29 ` Matthew Auld
2022-03-17 9:35 ` Thomas Hellström [this message]
2022-03-17 18:21 ` Bloomfield, Jon
2022-03-18 9:48 ` Thomas Hellström
2022-03-18 16:25 ` Bloomfield, Jon
2022-03-18 18:12 ` Daniel Vetter
2022-03-21 6:53 ` Thomas Hellström
2022-03-31 9:25 ` Matthew Auld
2022-04-04 9:04 ` Thomas Hellström
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