Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
 messages from 2024-06-06 16:02:24 to 2024-06-10 16:13:28 UTC [more...]

[PATCH v2 00/21] drm/i915/dp_mst: Enable link training fallback
 2024-06-10 16:13 UTC  (4+ messages)
` [PATCH v2 03/21] drm/i915/dp: Move link train fallback to intel_dp_link_training.c

[PATCH] drm: add missing MODULE_DESCRIPTION() macros
 2024-06-10 16:06 UTC  (4+ messages)
` (subset) "
` ✗ Fi.CI.SPARSE: warning for "
` ✓ Fi.CI.BAT: success "

[PATCH v2 0/6] drm/i915: gvt register macro cleanups, unused macro removals
 2024-06-10 10:58 UTC  (13+ messages)
` [PATCH v2 1/6] drm/i915/gvt: remove the unused end parameter from calc_index()
` [PATCH v2 2/6] drm/i915/gvt: use proper i915_reg_t for calc_index() parameters
` [PATCH v2 3/6] drm/i915/gvt: rename range variable to stride
` [PATCH v2 4/6] drm/i915/gvt: do not use implict dev_priv in DSPSURF_TO_PIPE()
` [PATCH v2 5/6] drm/i915: relocate some DSPCNTR reg bit definitions
` [PATCH v2 6/6] drm/i915: remove unused pipe/plane B register macros
` ✗ Fi.CI.SPARSE: warning for drm/i915: gvt register macro cleanups, unused macro removals (rev2)
` ✗ Fi.CI.BAT: failure "

[PATCH v1 1/1] treewide: Align match_string() with sysfs_match_string()
 2024-06-10  8:08 UTC  (3+ messages)

[PATCH 00/10] drm/i915: PREEMPT_RT related fixups
 2024-06-10 13:36 UTC  (2+ messages)
` ✗ Fi.CI.BUILD: failure for drm/i915: PREEMPT_RT related fixups. (rev7)

[PATCH] drm/i915/gt: Delete the live_hearbeat_fast selftest
 2024-06-10 13:00 UTC  (4+ messages)

[PATCH] drm/edid: reduce DisplayID log spamming
 2024-06-10 12:04 UTC  (2+ messages)

[PATCH v6] drm/i915/panelreplay: Panel replay workaround with VRR
 2024-06-10 11:19 UTC  (3+ messages)
` ✓ Fi.CI.BAT: success for drm/i915/panelreplay: Panel replay workaround with VRR (rev6)
` ✗ Fi.CI.IGT: failure "

[PATCH v16 0/9] Implement CMRR Support
 2024-06-10 10:49 UTC  (15+ messages)
` [PATCH v16 1/9] drm/i915: Update indentation for VRR registers and bits
` [PATCH v16 2/9] drm/i915: Separate VRR related register definitions
` [PATCH v16 3/9] drm/i915: Define and compute Transcoder CMRR registers
` [PATCH v16 4/9] drm/i915: Update trans_vrr_ctl flag when cmrr is computed
` [PATCH v16 5/9] drm/dp: Add refresh rate divider to struct representing AS SDP
` [PATCH v16 6/9] drm/i915/display: Add support for pack and unpack
` [PATCH v16 7/9] drm/i915/display: Compute Adaptive sync SDP params
` [PATCH v16 8/9] drm/i915/display: Compute vrr vsync params
` [PATCH v16 9/9] drm/i915: Compute CMRR and calculate vtotal
` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev17)
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
` ✓ Fi.CI.IGT: success "

[core-for-CI PATCH] Revert "e1000e: move force SMBUS near the end of enable_ulp function"
 2024-06-10 10:15 UTC  (7+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "

[PATCH 00/13] Panel Replay eDP prepare
 2024-06-10  9:30 UTC  (19+ messages)
` [PATCH 01/13] drm/i915/alpm: Do not use fast_wake_lines for aux less wake time
` [PATCH 02/13] drm/i915/alpm: Write also AUX Less Wake lines into ALPM_CTL
` [PATCH 03/13] drm/i915/display: Take panel replay into account in vsc sdp unpacking
` [PATCH 04/13] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes
` [PATCH 05/13] drm/display: Add missing Panel Replay Enable SU Region ET bit
` [PATCH 06/13] drm/i915/psr: Split enabling sink for PSR and Panel Replay
` [PATCH 07/13] drm/i915/alpm: Share alpm support checks with PSR code
` [PATCH 08/13] drm/i915/psr: Add Panel Replay support to intel_psr2_config_et_valid
` [PATCH 09/13] drm/i915/psr: Print Panel Replay status instead of frame lock status
` [PATCH 10/13] drm/i915/psr: Move vblank length check to separate function
` [PATCH 11/13] drm/i915/psr: Take into account SU SDP scanline indication in vblank check
` [PATCH 12/13] drm/i915/psr: Check vblank against IO buffer wake time on Lunarlake
` [PATCH 13/13] drm/i915/psr: Wake time is aux less wake time for Panel Replay
` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay eDP prepare
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "

[PATCH] drm/i915/gt: debugfs: Evaluate forcewake usage within locks
 2024-06-10  9:24 UTC  (5+ messages)
` ✓ Fi.CI.BAT: success for "
` ✗ Fi.CI.IGT: failure "

[PATCH 0/2] Implement WA to fix increased power usage
 2024-06-10  4:54 UTC  (7+ messages)
` [PATCH 2/2] drm/i915/psr: Implment WA to help reach PC10

[PATCH v15 0/9] Implement CMRR Support
 2024-06-10  4:53 UTC  (16+ messages)
` [PATCH v15 1/9] gpu/drm/i915: Update indentation for VRR registers and bits
` [PATCH v15 2/9] drm/i915: Separate VRR related register definitions
` [PATCH v15 3/9] drm/i915: Define and compute Transcoder CMRR registers
` [PATCH v15 4/9] drm/i915: Update trans_vrr_ctl flag when cmrr is computed
` [PATCH v15 5/9] drm/dp: Add refresh rate divider to struct representing AS SDP
` [PATCH v15 6/9] drm/i915/display: Add support for pack and unpack
` [PATCH v15 7/9] drm/i915/display: Compute Adaptive sync SDP params
` [PATCH v15 8/9] drm/i915/display: Compute vrr vsync params
` [PATCH v15 9/9] drm/i915: Compute CMRR and calculate vtotal
` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev16)
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "

[PATCH v13 0/9] Implement CMRR Support
 2024-06-07 22:07 UTC  (9+ messages)
` [PATCH v13 1/9] gpu/drm/i915: Update indentation for VRR registers and bits
  ` [PATCH v14 "
` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev15)
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "

[PATCH 0/2] drm/i915 & drm/xe: drop ACPI_BUTTON
 2024-06-07 21:01 UTC  (7+ messages)
` [PATCH 1/2] drm/i915: do not select ACPI_BUTTON
` [PATCH 2/2] drm/xe: "
` ✓ Fi.CI.BAT: success for drm/i915 & drm/xe: drop ACPI_BUTTON
` ✗ Fi.CI.IGT: failure "

[PATCH] drm/i915/display/bmg: Add platform descriptor
 2024-06-07 20:59 UTC  (3+ messages)

[PATCH 0/3] Ultrajoiner basic functionality series
 2024-06-07 20:49 UTC  (4+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for Ultrajoiner basic functionality series (rev3)
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "

[PATCH] drm/i915/gt/uc: Evaluate GuC priority within locks
 2024-06-07 20:03 UTC  (4+ messages)
` ✓ Fi.CI.BAT: success for drm/i915/gt/uc: Evaluate GuC priority within locks (rev3)
` ✗ Fi.CI.IGT: failure "

[PATCH 0/6] drm/i915: gvt register macro cleanups, unused macro removals
 2024-06-07 15:09 UTC  (17+ messages)
` [PATCH 1/6] drm/i915/gvt: remove the unused end parameter from calc_index()
` [PATCH 2/6] drm/i915/gvt: use proper i915_reg_t for calc_index() parameters
` [PATCH 3/6] drm/i915/gvt: rename range variable to stride
` [PATCH 4/6] drm/i915/gvt: do not use implict dev_priv in DSPSURF_TO_PIPE()
` [PATCH 5/6] drm/i915: remove unused pipe/plane B register macros
` [PATCH 6/6] drm/i915: remove unused HSW_STEREO_3D_CTL "
` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: gvt register macro cleanups, unused macro removals
` ✓ Fi.CI.BAT: success "

[PATCH v6 00/26] Panel Replay eDP support
 2024-06-07 13:37 UTC  (21+ messages)
` [PATCH v6 06/26] drm/i915/psr: Split enabling sink for PSR and Panel Replay
` [PATCH v6 10/26] drm/i915/psr: Print Panel Replay status instead of frame lock status
` [PATCH v6 11/26] drm/i915/psr: Move vblank length check to separate function
` [PATCH v6 14/26] dmr/i915/psr: Wake time is aux less wake time for Panel Replay

[PATCH v2 00/14] drm/i915: mem/fsb/rawclk freq cleanups
 2024-06-07 11:48 UTC  (2+ messages)

[PATCH 00/65] drm/i915: finish the job of removing implicit dev_priv
 2024-06-07 10:48 UTC  (71+ messages)
` [PATCH 32/65] drm/i915: pass dev_priv explicitly to CHV_CANVAS
` [PATCH 33/65] drm/i915: pass dev_priv explicitly to SWF0
` [PATCH 34/65] drm/i915: pass dev_priv explicitly to SWF1
` [PATCH 35/65] drm/i915: pass dev_priv explicitly to SWF3
` [PATCH 36/65] drm/i915: pass dev_priv explicitly to _PIPEBDSL
` [PATCH 37/65] drm/i915: pass dev_priv explicitly to _TRANSBCONF
` [PATCH 38/65] drm/i915: pass dev_priv explicitly to _PIPEBSTAT
` [PATCH 39/65] drm/i915: pass dev_priv explicitly to _PIPEB_FRMCOUNT_G4X
` [PATCH 40/65] drm/i915: pass dev_priv explicitly to _PIPEB_FLIPCOUNT_G4X
` [PATCH 41/65] drm/i915: pass dev_priv explicitly to _DSPBCNTR
` [PATCH 42/65] drm/i915: pass dev_priv explicitly to _DSPBADDR
` [PATCH 43/65] drm/i915: pass dev_priv explicitly to _DSPBSTRIDE
` [PATCH 44/65] drm/i915: pass dev_priv explicitly to _DSPBPOS
` [PATCH 45/65] drm/i915: pass dev_priv explicitly to _DSPBSIZE
` [PATCH 46/65] drm/i915: pass dev_priv explicitly to _DSPBSURF
` [PATCH 47/65] drm/i915: pass dev_priv explicitly to _DSPBTILEOFF
` [PATCH 48/65] drm/i915: pass dev_priv explicitly to _DSPBOFFSET
` [PATCH 49/65] drm/i915: pass dev_priv explicitly to _DSPBSURFLIVE
` [PATCH 50/65] drm/i915: pass dev_priv explicitly to PIPE_DATA_M1
` [PATCH 51/65] drm/i915: pass dev_priv explicitly to PIPE_DATA_N1
` [PATCH 52/65] drm/i915: pass dev_priv explicitly to PIPE_DATA_M2
` [PATCH 53/65] drm/i915: pass dev_priv explicitly to PIPE_DATA_N2
` [PATCH 54/65] drm/i915: pass dev_priv explicitly to PIPE_LINK_M1
` [PATCH 55/65] drm/i915: pass dev_priv explicitly to PIPE_LINK_N1
` [PATCH 56/65] drm/i915: pass dev_priv explicitly to PIPE_LINK_M2
` [PATCH 57/65] drm/i915: pass dev_priv explicitly to PIPE_LINK_N2
` [PATCH 58/65] drm/i915: pass dev_priv explicitly to HSW_STEREO_3D_CTL
` [PATCH 59/65] drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTL
` [PATCH 60/65] drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTL2
` [PATCH 61/65] drm/i915: pass dev_priv explicitly to TGL_DP_TP_CTL
` [PATCH 62/65] drm/i915: pass dev_priv explicitly to TGL_DP_TP_STATUS
` [PATCH 63/65] drm/i915: pass dev_priv explicitly to TRANS_MSA_MISC
` [PATCH 64/65] drm/i915: pass dev_priv explicitly to TRANS_SET_CONTEXT_LATENCY
` [PATCH 65/65] drm/i915: pass dev_priv explicitly to MTL_CLKGATE_DIS_TRANS

[PATCH v13 2/9] drm/i915: Separate VRR related register definitions
 2024-06-07 10:17 UTC  (2+ messages)
` [PATCH v14 "

[PATCH 1/3] drm/i915: Rename all bigjoiner to joiner
 2024-06-07  7:54 UTC  (2+ messages)

[PATCH 1/2] drm/i915/dmc: convert intel_dmc_print_error_state() to drm_printer
 2024-06-07  7:19 UTC  (8+ messages)
` [PATCH 2/2] drm/i915/overlay: convert intel_overlay_print_error_state() "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/dmc: convert intel_dmc_print_error_state() "
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "

[PATCH v5] drm/i915/panelreplay: Panel replay workaround with VRR
 2024-06-07  5:30 UTC  (2+ messages)

[PATCH] drm/i915/gt: Fix potential UAF by revoke of fence registers
 2024-06-07  4:44 UTC  (4+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Fix potential UAF by revoke of fence registers (rev3)
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "

[PULL] drm-misc-next-fixes
 2024-06-06 22:12 UTC 

[PULL] drm-misc-fixes
 2024-06-06 22:09 UTC 

[PULL] drm-xe-next
 2024-06-06 21:43 UTC 

[PATCH v2] drm/i915/guc: Enable w/a 16021333562 for DG2, MTL and ARL
 2024-06-06 21:25 UTC  (2+ messages)

[PATCH 0/4] drm/i915/dsb: A bit of polish
 2024-06-06 18:57 UTC  (9+ messages)
` [PATCH 1/4] drm/i915/dsb: Polish the DSB ID enum
` [PATCH 2/4] drm/i915/dsb: Move DSB ID definition to the header
` [PATCH 3/4] drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare()
` [PATCH 4/4] drm/i915/dsb: Use intel_color_uses_dsb()

[linux-next:master] BUILD REGRESSION ee78a17615ad0cfdbbc27182b1047cd36c9d4d5f
 2024-06-06 17:51 UTC  (2+ messages)


This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox