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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check
Date: Tue, 24 Jan 2023 13:43:00 -0500	[thread overview]
Message-ID: <Y9AmtJtmmcFfL/N+@intel.com> (raw)
In-Reply-To: <20230116111937.875-3-stanislav.lisovskiy@intel.com>

On Mon, Jan 16, 2023 at 01:19:37PM +0200, Stanislav Lisovskiy wrote:
> According to spec, we should check if output_bpp * pixel_rate is less
> than DDI clock * 72, if UHBR is used.
> 
> HSDES: 1406899791
> BSPEC: 49259
> 
> v2: - Removed wrong comment(Rodrigo Vivi)
>     - Added HSDES to the commit msg(Rodrigo Vivi)
>     - Moved UHBR check to the MST specific code
> 
> v3: - Changed commit subject(Rodrigo Vivi)
>     - Fixed the error message if check fails(Rodrigo Vivi)
> 
> v4: - Move UHBR check to new helper function
>     - Now both for non-DSC/DSC we use that new check as
>       one of the constraints, when figuring out output bpp
>       to be used(Ville Syrjälä)
> 
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index e3e7c305fece..b95051fed23d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -47,8 +47,19 @@
>  
>  static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
>  					  const struct drm_display_mode *adjusted_mode,
> -					  struct intel_crtc_state *crtc_state)
> +					  struct intel_crtc_state *pipe_config)
>  {
> +	if (intel_dp_is_uhbr(pipe_config)) {
> +		int output_bpp = bpp;
> +
> +		if (output_bpp * adjusted_mode->crtc_clock >=
> +		    pipe_config->port_clock * 72) {
> +			drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n",
> +				    output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72);
> +			return -EINVAL;
> +		}
> +	}
> +

the check looks correct to me, but let's wait for Ville to comment on the placement
since he was the one who first noticed the other one during commit was too late.

>  	return 0;
>  }
>  
> -- 
> 2.37.3
> 

  reply	other threads:[~2023-01-24 18:43 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy
2023-01-16 11:19 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy
2023-01-16 11:19 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy
2023-01-24 18:43   ` Rodrigo Vivi [this message]
2023-01-31 15:00   ` Ville Syrjälä
2023-01-31 15:20     ` Lisovskiy, Stanislav
2023-01-31 15:41       ` Ville Syrjälä
2023-02-01 11:00         ` Lisovskiy, Stanislav
2023-02-01 12:47           ` Ville Syrjälä
2023-01-16 12:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR Patchwork
2023-01-16 13:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-02-02  9:47 [Intel-gfx] [PATCH 0/2] " Stanislav Lisovskiy
2023-02-02  9:47 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy
2023-02-02 10:05   ` Jani Nikula

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