From: Daniel Vetter <daniel@ffwll.ch>
To: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, matthew.auld@intel.com,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 0/9] Prereqs for TTM accelerated migration
Date: Wed, 9 Jun 2021 13:48:43 +0200 [thread overview]
Message-ID: <YMCqm48rZIKLYk/s@phenom.ffwll.local> (raw)
In-Reply-To: <20210609063436.284332-1-thomas.hellstrom@linux.intel.com>
On Wed, Jun 09, 2021 at 08:34:27AM +0200, Thomas Hellström wrote:
> A couple of patches from Chris which implement pipelined migration and
> clears by atomically writing the PTEs in place before performing the
> actual blit.
>
> Some ww utilities mainly for the accompanying selftests added by Thomas,
> as well as modified the above patches for ww locking- and lmem support.
>
> The actual hook up to the i915 ttm backend is being worked on and not
> included yet, so this is considered to be an early review opportunity.
>
> v2:
> - A couple of minor style fixes pointed out by Matthew Auld
> - Export and use intel_engine_destroy_pinned_context() to address a
>ls CI warning / failure.
Just to check my understanding of the plan: These are the new windowed
clear/blt functions which we plan to use everywhere, because less nasty
locking implications? And the clear/blt we currently have in upstream will
be replaced?
If so would be nice if this patch set includes that replacement work (I
think right now all we have is the clear for lmem), including updating of
selftests and stuff like that. Just to avoid having two ways to do the
same thing in the driver.
-Daniel
>
> Chris Wilson (6):
> drm/i915/gt: Add an insert_entry for gen8_ppgtt
> drm/i915/gt: Add a routine to iterate over the pagetables of a GTT
> drm/i915/gt: Export the pinned context constructor and destructor
> drm/i915/gt: Pipelined page migration
> drm/i915/gt: Pipelined clear
> drm/i915/gt: Setup a default migration context on the GT
>
> Thomas Hellström (3):
> drm/i915: Reference objects on the ww object list
> drm/i915: Break out dma_resv ww locking utilities to separate files
> drm/i915: Introduce a ww transaction helper
>
> drivers/gpu/drm/i915/Makefile | 2 +
> drivers/gpu/drm/i915/gem/i915_gem_object.h | 9 +-
> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 68 ++
> drivers/gpu/drm/i915/gt/intel_engine.h | 12 +
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 27 +-
> drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +
> drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +
> drivers/gpu/drm/i915/gt/intel_gtt.h | 7 +
> drivers/gpu/drm/i915/gt/intel_migrate.c | 685 ++++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_migrate.h | 65 ++
> drivers/gpu/drm/i915/gt/intel_migrate_types.h | 15 +
> drivers/gpu/drm/i915/gt/intel_renderstate.h | 1 +
> drivers/gpu/drm/i915/gt/intel_ring.h | 1 +
> drivers/gpu/drm/i915/gt/selftest_migrate.c | 671 +++++++++++++++++
> drivers/gpu/drm/i915/i915_gem.c | 52 --
> drivers/gpu/drm/i915/i915_gem.h | 12 -
> drivers/gpu/drm/i915/i915_gem_ww.c | 63 ++
> drivers/gpu/drm/i915/i915_gem_ww.h | 50 ++
> .../drm/i915/selftests/i915_live_selftests.h | 1 +
> .../drm/i915/selftests/i915_perf_selftests.h | 1 +
> 21 files changed, 1675 insertions(+), 76 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.c
> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.h
> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate_types.h
> create mode 100644 drivers/gpu/drm/i915/gt/selftest_migrate.c
> create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.c
> create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.h
>
> --
> 2.31.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2021-06-09 11:48 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-09 6:34 [Intel-gfx] [PATCH v2 0/9] Prereqs for TTM accelerated migration Thomas Hellström
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Reference objects on the ww object list Thomas Hellström
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Break out dma_resv ww locking utilities to separate files Thomas Hellström
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Introduce a ww transaction helper Thomas Hellström
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 4/9] drm/i915/gt: Add an insert_entry for gen8_ppgtt Thomas Hellström
2021-06-09 7:44 ` Matthew Auld
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 5/9] drm/i915/gt: Add a routine to iterate over the pagetables of a GTT Thomas Hellström
2021-06-09 7:48 ` Matthew Auld
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 6/9] drm/i915/gt: Export the pinned context constructor and destructor Thomas Hellström
2021-06-09 8:00 ` Matthew Auld
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 7/9] drm/i915/gt: Pipelined page migration Thomas Hellström
2021-06-09 12:14 ` Matthew Auld
2021-06-09 12:48 ` Matthew Auld
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 8/9] drm/i915/gt: Pipelined clear Thomas Hellström
2021-06-09 13:42 ` Matthew Auld
2021-06-09 6:34 ` [Intel-gfx] [PATCH v2 9/9] drm/i915/gt: Setup a default migration context on the GT Thomas Hellström
2021-06-09 14:17 ` Matthew Auld
2021-06-09 7:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Prereqs for TTM accelerated migration (rev2) Patchwork
2021-06-09 8:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-09 8:23 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-09 9:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2021-06-09 11:48 ` Daniel Vetter [this message]
2021-06-09 12:16 ` [Intel-gfx] [PATCH v2 0/9] Prereqs for TTM accelerated migration Thomas Hellström
2021-06-09 12:20 ` Matthew Auld
2021-06-09 13:08 ` Thomas Hellström
2021-06-09 14:35 ` Thomas Hellström
2021-06-09 14:54 ` Daniel Vetter
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