From: Andi Shyti <andi.shyti@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>,
dri-devel@lists.freedesktop.org,
Matthew Auld <matthew.auld@intel.com>
Subject: Re: [Intel-gfx] [PATCH v3 03/10] drm/i915: Restructure probe to handle multi-tile platforms
Date: Mon, 1 Nov 2021 23:58:52 +0100 [thread overview]
Message-ID: <YYBxLCH4bn3pnwKB@intel.intel> (raw)
In-Reply-To: <20211029032817.3747750-4-matthew.d.roper@intel.com>
Hi Matt,
On Thu, Oct 28, 2021 at 08:28:10PM -0700, Matt Roper wrote:
> On a multi-tile platform, each tile has its own registers + GGTT space,
> and BAR 0 is extended to cover all of them. Upcoming patches will start
> exposing the tiles as multiple GTs within a single PCI device. In
> preparation for supporting such setups, restructure the driver's probe
> code a bit.
>
> Only the primary/root tile is initialized for now; the other tiles will
> be detected and plugged in by future patches once the necessary
> infrastructure is in place to handle them.
>
> v2:
> - Rename for naming prefix consistency. (Jani, Lucas)
>
> Original-author: Abdiel Janulgue
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Looks correct to me:
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Andi
next prev parent reply other threads:[~2021-11-01 22:59 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-29 3:28 [Intel-gfx] [PATCH v3 00/10] i915: Initial multi-tile support Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 01/10] drm/i915: rework some irq functions to take intel_gt as argument Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 02/10] drm/i915: split general MMIO setup from per-GT uncore init Matt Roper
2021-11-11 5:12 ` Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 03/10] drm/i915: Restructure probe to handle multi-tile platforms Matt Roper
2021-11-01 22:58 ` Andi Shyti [this message]
2021-11-01 23:21 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 04/10] drm/i915: Store backpointer to GT in uncore Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 05/10] drm/i915: Prepare for multiple gts Matt Roper
2021-11-01 23:11 ` Andi Shyti
2021-11-02 9:36 ` Tvrtko Ursulin
2021-11-02 11:26 ` Andi Shyti
2021-11-02 13:58 ` Tvrtko Ursulin
2021-11-02 21:08 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 06/10] drm/i915: Initial support for per-tile uncore Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 07/10] drm/i915/xehp: Determine which tile raised an interrupt Matt Roper
2021-11-01 23:33 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 08/10] drm/i915/xehp: Make IRQ reset and postinstall multi-tile aware Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 09/10] drm/i915/guc: Update CT debug macro for multi-tile Matt Roper
2021-11-01 23:35 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 10/10] drm/i915/xehpsdv: Initialize multi-tiles Matt Roper
2021-10-29 3:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support (rev3) Patchwork
2021-10-29 4:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-29 10:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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