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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH 2/6] drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGV
Date: Tue, 15 Feb 2022 21:18:53 +0200	[thread overview]
Message-ID: <Ygv8nWzNP7F6c2Db@intel.com> (raw)
In-Reply-To: <Ygvbu30Mo1yqgwgw@intel.com>

On Tue, Feb 15, 2022 at 06:58:35PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 15, 2022 at 06:52:51PM +0200, Ville Syrjälä wrote:
> > On Tue, Feb 15, 2022 at 06:33:42PM +0200, Lisovskiy, Stanislav wrote:
> > > On Tue, Feb 15, 2022 at 01:26:50PM +0200, Ville Syrjälä wrote:
> > > > On Tue, Feb 15, 2022 at 01:02:48PM +0200, Lisovskiy, Stanislav wrote:
> > > > > Anyway my point here is that, we probably shouldn't use new_bw_state as a way to 
> > > > > check that plane allocations had changed. Thats just confusing.
> > > > 
> > > > We are not checking if plane allocations have changed. We are
> > > > trying to determine if anything in the bw_state has changed.
> > > > If we have said state already then something in it may have 
> > > > changed and we have to recalculate anything that may depend
> > > > on those changed things, namely pipe_sagv_reject->qgv_point_mask.
> > > 
> > > I think it is just not very intuitive that we use the fact whether
> > > we can get new_bw_state or not, as a way to check if something had
> > > changed.
> > > Would be nice to put it in somekind of a wrapper like "has_new_bw_state"
> > > or "bw_state_changed". Because for anyone not quite familiar with
> > > that state paradigm we use, that would look pretty confusing that first
> > > we get new_bw_state using intel_atomic_get_new_bw_state, then immediately
> > > override it with intel_atomic_get_bw_state.
> > > And whether we can get new_bw_state or not is just acting like a check,
> > > that we don't have anything changed in bw_state.
> > 
> > I think the only thing we'd achieve is something like this:
> > 
> > new_bw_state = NULL;
> > if (has_new_bw_state())
> > 	new_bw_state = get_new_bw_state();
> > ...
> > if (!new_bw_state)
> > 	return 0;
> > 
> > instead of just
> > 
> > new_bw_state = get_new_bw_state();
> > ...
> > if (!new_bw_state)
> > 	return 0;
> > 
> > I don't know why that would be an improvement.
> 
> Though I suppose a comment might be in order pointing the
> reader towards intel_compute_sagv_mask().

Although, I guess one idea would be to extract that data_rate
loop thing into a separate function and then we'd just end up with
something along the lines of:

ret = intel_bw_check_data_rate(state);
if (ret)
	return ret;

new_bw_state = intel_atomic_get_new_bw_state(state);
if (!new_bw_state)
	return 0;

...

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-02-15 19:19 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-14  9:18 [Intel-gfx] [PATCH 0/6] drm/i915: SAGV fixes Ville Syrjala
2022-02-14  9:18 ` [Intel-gfx] [PATCH 1/6] drm/i915: Correctly populate use_sagv_wm for all pipes Ville Syrjala
2022-02-14 10:16   ` Lisovskiy, Stanislav
2022-02-14  9:18 ` [Intel-gfx] [PATCH 2/6] drm/i915: Fix bw atomic check when switching between SAGV vs. no SAGV Ville Syrjala
2022-02-14 10:05   ` Lisovskiy, Stanislav
2022-02-14 10:24     ` Ville Syrjälä
2022-02-14 17:03       ` Lisovskiy, Stanislav
2022-02-14 20:26         ` Ville Syrjälä
2022-02-15  8:59           ` Lisovskiy, Stanislav
2022-02-15 10:10             ` Ville Syrjälä
2022-02-15 11:02               ` Lisovskiy, Stanislav
2022-02-15 11:26                 ` Ville Syrjälä
2022-02-15 16:33                   ` Lisovskiy, Stanislav
2022-02-15 16:52                     ` Ville Syrjälä
2022-02-15 16:58                       ` Ville Syrjälä
2022-02-15 19:18                         ` Ville Syrjälä [this message]
2022-02-14  9:18 ` [Intel-gfx] [PATCH 3/6] drm/i915: Widen the QGV point mask Ville Syrjala
2022-02-14 17:17   ` Lisovskiy, Stanislav
2022-02-14  9:18 ` [Intel-gfx] [PATCH 4/6] drm/i915: Unconfuse pre-icl vs. icl+ intel_sagv_{pre, post}_plane_update() Ville Syrjala
2022-02-14 17:39   ` Lisovskiy, Stanislav
2022-02-14  9:18 ` [Intel-gfx] [PATCH 5/6] drm/i915: Split pre-icl vs. icl+ SAGV hooks apart Ville Syrjala
2022-02-17 18:31   ` Lisovskiy, Stanislav
2022-02-14  9:18 ` [Intel-gfx] [PATCH 6/6] drm/i915: Pimp icl+ sagv pre/post update Ville Syrjala
2022-02-14 10:00   ` Lisovskiy, Stanislav
2022-02-14 10:27     ` Ville Syrjälä
2022-02-14 17:48       ` Lisovskiy, Stanislav
2022-02-14 18:04       ` Lisovskiy, Stanislav
2022-02-15 21:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: SAGV fixes Patchwork
2022-02-16  1:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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