From: Andi Shyti <andi.shyti@linux.intel.com>
To: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/9] drm/i915/pcode: Extend pcode functions for multiple gt's
Date: Sun, 24 Apr 2022 21:08:18 +0200 [thread overview]
Message-ID: <YmWgIscRqTRTAq9c@intel.intel> (raw)
In-Reply-To: <2e9c13234fe510235688e774d70326870eb7e219.1650435571.git.ashutosh.dixit@intel.com>
Hi Ashutosh,
[...]
> -static bool skl_pcode_try_request(struct drm_i915_private *i915, u32 mbox,
> - u32 request, u32 reply_mask, u32 reply,
> - u32 *status)
> +static bool __gt_pcode_try_request(struct intel_gt *gt, u32 mbox,
why is this becoming a '__' function?
> + u32 request, u32 reply_mask, u32 reply,
> + u32 *status)
> {
> - *status = __snb_pcode_rw(i915, mbox, &request, NULL, 500, 0, true);
> + *status = __gt_pcode_rw(gt, mbox, &request, NULL, 500, 0, true);
>
> return (*status == 0) && ((request & reply_mask) == reply);
> }
>
> /**
> - * skl_pcode_request - send PCODE request until acknowledgment
> - * @i915: device private
> + * intel_gt_pcode_request - send PCODE request until acknowledgment
> + * @gt: gt
> * @mbox: PCODE mailbox ID the request is targeted for
> * @request: request ID
> * @reply_mask: mask used to check for request acknowledgment
> @@ -158,16 +159,16 @@ static bool skl_pcode_try_request(struct drm_i915_private *i915, u32 mbox,
> * Returns 0 on success, %-ETIMEDOUT in case of a timeout, <0 in case of some
> * other error as reported by PCODE.
> */
> -int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request,
> - u32 reply_mask, u32 reply, int timeout_base_ms)
> +int intel_gt_pcode_request(struct intel_gt *gt, u32 mbox, u32 request,
> + u32 reply_mask, u32 reply, int timeout_base_ms)
> {
> u32 status;
> int ret;
>
> - mutex_lock(&i915->sb_lock);
> + mutex_lock(>->i915->sb_lock);
>
> #define COND \
> - skl_pcode_try_request(i915, mbox, request, reply_mask, reply, &status)
> + __gt_pcode_try_request(gt, mbox, request, reply_mask, reply, &status)
>
> /*
> * Prime the PCODE by doing a request first. Normally it guarantees
> @@ -193,35 +194,48 @@ int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request,
> * requests, and for any quirks of the PCODE firmware that delays
> * the request completion.
> */
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(>->i915->drm,
> "PCODE timeout, retrying with preemption disabled\n");
> - drm_WARN_ON_ONCE(&i915->drm, timeout_base_ms > 3);
> + drm_WARN_ON_ONCE(>->i915->drm, timeout_base_ms > 3);
> preempt_disable();
> ret = wait_for_atomic(COND, 50);
> preempt_enable();
>
> out:
> - mutex_unlock(&i915->sb_lock);
> + mutex_unlock(>->i915->sb_lock);
> return status ? status : ret;
> #undef COND
> }
>
> +static int __gt_pcode_init(struct intel_gt *gt)
> +{
> + int ret = intel_gt_pcode_request(gt, DG1_PCODE_STATUS,
> + DG1_UNCORE_GET_INIT_STATUS,
> + DG1_UNCORE_INIT_STATUS_COMPLETE,
> + DG1_UNCORE_INIT_STATUS_COMPLETE, 180000);
> +
> + drm_dbg(>->i915->drm, "gt %d: PCODE init status %d\n", gt->info.id, ret);
> +
> + if (ret)
> + drm_err(>->i915->drm, "gt %d: Pcode did not report uncore initialization completion!\n",
> + gt->info.id);
> +
> + return ret;
> +}
> +
> int intel_pcode_init(struct drm_i915_private *i915)
> {
> - int ret = 0;
> + struct intel_gt *gt;
> + int i, ret = 0;
>
> if (!IS_DGFX(i915))
> return ret;
we can take some freedom, if you don't mind, and declare ret
inside the for_each, and return 0 here. Just a small cosmetic.
>
> - ret = skl_pcode_request(i915, DG1_PCODE_STATUS,
> - DG1_UNCORE_GET_INIT_STATUS,
> - DG1_UNCORE_INIT_STATUS_COMPLETE,
> - DG1_UNCORE_INIT_STATUS_COMPLETE, 180000);
> -
> - drm_dbg(&i915->drm, "PCODE init status %d\n", ret);
> -
> - if (ret)
> - drm_err(&i915->drm, "Pcode did not report uncore initialization completion!\n");
> + for_each_gt(gt, i915, i) {
> + ret = __gt_pcode_init(gt);
> + if (ret)
> + return ret;
> + }
>
> - return ret;
> + return 0;
> }
> diff --git a/drivers/gpu/drm/i915/intel_pcode.h b/drivers/gpu/drm/i915/intel_pcode.h
> index 0962a17fac48..96c954ec91f9 100644
> --- a/drivers/gpu/drm/i915/intel_pcode.h
> +++ b/drivers/gpu/drm/i915/intel_pcode.h
> @@ -8,16 +8,31 @@
>
> #include <linux/types.h>
>
> +struct intel_gt;
> struct drm_i915_private;
>
> -int snb_pcode_read(struct drm_i915_private *i915, u32 mbox, u32 *val, u32 *val1);
> -int snb_pcode_write_timeout(struct drm_i915_private *i915, u32 mbox, u32 val,
> - int fast_timeout_us, int slow_timeout_ms);
> -#define snb_pcode_write(i915, mbox, val) \
> +int intel_gt_pcode_read(struct intel_gt *gt, u32 mbox, u32 *val, u32 *val1);
> +
> +int intel_gt_pcode_write_timeout(struct intel_gt *gt, u32 mbox, u32 val,
> + int fast_timeout_us, int slow_timeout_ms);
> +
> +#define intel_gt_pcode_write(gt, mbox, val) \
> + intel_gt_pcode_write_timeout(gt, mbox, val, 500, 0)
> +
> +int intel_gt_pcode_request(struct intel_gt *gt, u32 mbox, u32 request,
> + u32 reply_mask, u32 reply, int timeout_base_ms);
> +
> +#define snb_pcode_read(i915, mbox, val, val1) \
> + intel_gt_pcode_read(&(i915)->gt0, mbox, val, val1)
> +
> +#define snb_pcode_write_timeout(i915, mbox, val, fast_timeout_us, slow_timeout_ms) \
> + intel_gt_pcode_write_timeout(&(i915)->gt0, mbox, val, fast_timeout_us, slow_timeout_ms)
> +
> +#define snb_pcode_write(i915, mbox, val) \
> snb_pcode_write_timeout(i915, mbox, val, 500, 0)
>
> -int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request,
> - u32 reply_mask, u32 reply, int timeout_base_ms);
> +#define skl_pcode_request(i915, mbox, request, reply_mask, reply, timeout_base_ms) \
> + intel_gt_pcode_request(&(i915)->gt0, mbox, request, reply_mask, reply, timeout_base_ms)
to_gt(i915)
I guess this is just a replacement i915 to gt, I think it's all
correct and with the latter changed:
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
next prev parent reply other threads:[~2022-04-24 19:08 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-20 6:25 [Intel-gfx] [PATCH v2 0/9] drm/i915: Media freq factor and per-gt enhancements/fixes Ashutosh Dixit
2022-04-20 6:25 ` [Intel-gfx] [PATCH 1/9] drm/i915: Introduce has_media_ratio_mode Ashutosh Dixit
2022-04-24 18:44 ` Andi Shyti
2022-04-20 6:25 ` [Intel-gfx] [PATCH 2/9] drm/i915/gt: Add media freq factor to per-gt sysfs Ashutosh Dixit
2022-04-24 18:43 ` Andi Shyti
2022-04-26 0:28 ` Dixit, Ashutosh
2022-04-20 6:25 ` [Intel-gfx] [PATCH 3/9] drm/i915/pcode: Extend pcode functions for multiple gt's Ashutosh Dixit
2022-04-24 19:08 ` Andi Shyti [this message]
2022-04-29 1:21 ` Dixit, Ashutosh
2022-04-26 7:55 ` Jani Nikula
2022-04-26 20:05 ` Dixit, Ashutosh
2022-04-20 6:25 ` [Intel-gfx] [PATCH 4/9] drm/i915/gt: Convert callers to user per-gt pcode functions Ashutosh Dixit
2022-04-24 21:54 ` Andi Shyti
2022-04-29 1:21 ` Dixit, Ashutosh
2022-04-20 6:25 ` [Intel-gfx] [PATCH 5/9] drm/i915/pcode: Add a couple of pcode helpers Ashutosh Dixit
2022-04-24 22:00 ` Andi Shyti
2022-04-29 1:21 ` Dixit, Ashutosh
2022-04-20 6:25 ` [Intel-gfx] [PATCH 6/9] drm/i915/gt: Add media RP0/RPn to per-gt sysfs Ashutosh Dixit
2022-04-24 22:05 ` Andi Shyti
2022-04-29 1:21 ` Dixit, Ashutosh
2022-04-20 6:25 ` [Intel-gfx] [PATCH 7/9] drm/i915/gt: Fix memory leaks in " Ashutosh Dixit
2022-04-20 16:23 ` Dixit, Ashutosh
2022-04-24 22:30 ` Andi Shyti
2022-04-26 20:21 ` Dixit, Ashutosh
2022-04-27 11:45 ` Andi Shyti
2022-04-27 20:50 ` Dixit, Ashutosh
2022-04-20 6:25 ` [Intel-gfx] [PATCH 8/9] drm/i915/gt: Expose per-gt RPS defaults in sysfs Ashutosh Dixit
2022-04-20 6:25 ` [Intel-gfx] [PATCH 9/9] drm/i915/gt: Expose default value for media_freq_factor in per-gt sysfs Ashutosh Dixit
2022-04-20 7:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Media freq factor and per-gt enhancements/fixes (rev2) Patchwork
2022-04-20 7:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-20 7:40 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-04-29 0:39 [Intel-gfx] [PATCH v3 0/9] drm/i915: Media freq factor and per-gt enhancements/fixes Ashutosh Dixit
2022-04-29 0:39 ` [Intel-gfx] [PATCH 3/9] drm/i915/pcode: Extend pcode functions for multiple gt's Ashutosh Dixit
2022-04-29 12:58 ` Rodrigo Vivi
2022-04-29 14:46 ` Dixit, Ashutosh
2022-04-13 18:11 [Intel-gfx] [PATCH 0/8] drm/i915: Media freq factor and per-gt enhancements/fixes Ashutosh Dixit
2022-04-20 5:21 ` [Intel-gfx] [PATCH v2 0/9] " Ashutosh Dixit
2022-04-20 5:21 ` [Intel-gfx] [PATCH 3/9] drm/i915/pcode: Extend pcode functions for multiple gt's Ashutosh Dixit
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