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From: Matt Atwood <matthew.s.atwood@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v3 4/5] drm/i915/pvc: Add new BCS engines to GuC engine list
Date: Tue, 24 May 2022 11:38:36 -0700	[thread overview]
Message-ID: <Yo0mLBty61cGRaNv@msatwood-mobl> (raw)
In-Reply-To: <20220511060228.1179450-5-matthew.d.roper@intel.com>

On Tue, May 10, 2022 at 11:02:27PM -0700, Matt Roper wrote:
> Intialize ADS system info to reflect the availablity of new BCS engines
> 
> Original-author: CQ Tang
> Cc: Stuart Summers <stuart.summers@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h            | 2 ++
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 3eabf4cf8eec..bb197610fd5b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -457,7 +457,7 @@ static void fill_engine_enable_masks(struct intel_gt *gt,
>  {
>  	info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], RCS_MASK(gt));
>  	info_map_write(info_map, engine_enabled_masks[GUC_COMPUTE_CLASS], CCS_MASK(gt));
> -	info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1);
> +	info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], BCS_MASK(gt));
>  	info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt));
>  	info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt));
>  }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 54e9c2a5493d..4b147fd90ec4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1223,6 +1223,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  })
>  #define RCS_MASK(gt) \
>  	ENGINE_INSTANCES_MASK(gt, RCS0, I915_MAX_RCS)
> +#define BCS_MASK(gt) \
> +	ENGINE_INSTANCES_MASK(gt, BCS0, I915_MAX_BCS)
>  #define VDBOX_MASK(gt) \
>  	ENGINE_INSTANCES_MASK(gt, VCS0, I915_MAX_VCS)
>  #define VEBOX_MASK(gt) \
> -- 
> 2.35.1
> 

  reply	other threads:[~2022-05-24 18:38 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-11  6:02 [Intel-gfx] [PATCH v3 0/5] i915: Introduce Ponte Vecchio Matt Roper
2022-05-11  6:02 ` [Intel-gfx] [PATCH v3 1/5] drm/i915/uncore: Reorganize and document shadow and forcewake tables Matt Roper
2022-05-24 17:25   ` Matt Atwood
2022-05-11  6:02 ` [Intel-gfx] [PATCH v3 2/5] drm/i915/pvc: Add forcewake support Matt Roper
2022-05-24 18:36   ` Matt Atwood
2022-05-11  6:02 ` [Intel-gfx] [PATCH v3 3/5] drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL Matt Roper
2022-05-24 18:37   ` Matt Atwood
2022-05-11  6:02 ` [Intel-gfx] [PATCH v3 4/5] drm/i915/pvc: Add new BCS engines to GuC engine list Matt Roper
2022-05-24 18:38   ` Matt Atwood [this message]
2022-05-11  6:02 ` [Intel-gfx] [PATCH v3 5/5] drm/i915/guc: XEHPSDV and PVC do not use HuC Matt Roper
2022-05-24 18:39   ` Matt Atwood
2022-05-11  6:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Introduce Ponte Vecchio (rev4) Patchwork
2022-05-11  6:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-11  6:56 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-05-11 14:33   ` Matt Roper
2022-05-11 15:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-11 19:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-11 20:44   ` Matt Roper
2022-05-11 23:21     ` Vudum, Lakshminarayana
2022-05-11 23:17 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2022-05-24 19:28   ` Matt Roper

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