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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 4/9] drm/i915/display: Add new members to configure PCON color conversion
Date: Mon, 12 Sep 2022 21:55:08 +0300	[thread overview]
Message-ID: <Yx+AjCFEwgUGEfTC@intel.com> (raw)
In-Reply-To: <20220901060101.1000290-5-ankit.k.nautiyal@intel.com>

On Thu, Sep 01, 2022 at 11:30:56AM +0530, Ankit Nautiyal wrote:
> The decision to use DFP output format conversion capabilities should be
> during compute_config phase.
> 
> This patch adds new members to crtc_state to help configure the DFP
> output related conversions. Also adds a member to intel_dp to store
> ycbcr420 pass through capability.
> 
> This will help to store only the format conversion capabilities of the
> DP device in intel_dp->dfp, and use crtc_state to compute and store the
> configuration for color/format conversion for a given mode.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 0da9b208d56e..065ed19a5dd3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1311,6 +1311,12 @@ struct intel_crtc_state {
>  
>  	/* for loading single buffered registers during vblank */
>  	struct drm_vblank_work vblank_work;
> +
> +	/* DP DFP color configuration */
> +	struct {
> +		bool rgb_to_ycbcr;
> +		bool ycbcr_444_to_420;
> +	} dp_dfp_config;

Hmm. I'm thinking just something like
 enum intel_output_format sink_format;
might be easier to deal with.

>  };
>  
>  enum intel_pipe_crc_source {
> @@ -1704,6 +1710,7 @@ struct intel_dp {
>  		int pcon_max_frl_bw;
>  		u8 max_bpc;
>  		bool ycbcr_444_to_420;
> +		bool ycbcr420_passthrough;
>  		bool rgb_to_ycbcr;
>  	} dfp;
>  
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-09-12 18:55 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-01  6:00 [Intel-gfx] [PATCH v2 0/9] Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 1/9] drm/i915/dp: Reset frl trained flag before restarting FRL training Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 2/9] drm/i915/dp: Add RGB to YCBCR conversion case in is_dp_ycbcr420 helper Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 3/9] drm/i915/dp: Remove whitespace at the end of function Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 4/9] drm/i915/display: Add new members to configure PCON color conversion Ankit Nautiyal
2022-09-12 18:55   ` Ville Syrjälä [this message]
2022-09-13  5:25     ` Nautiyal, Ankit K
2022-09-13  8:15       ` Ville Syrjälä
2022-09-13 10:27         ` Nautiyal, Ankit K
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 5/9] drm/i915/dp: Compute configuration for using PCON's color/format conversion Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 6/9] drm/i915/dp: Use crtc_state members in dp_is_ycbcr420 Ankit Nautiyal
2022-09-01  6:00 ` [Intel-gfx] [PATCH v2 7/9] drm/i915/dp: Replace intel_dp.dfp members with the new crtc_state dp_dfp members Ankit Nautiyal
2022-09-12 18:56   ` Ville Syrjälä
2022-09-13  6:13     ` Nautiyal, Ankit K
2022-10-17 10:49       ` Nautiyal, Ankit K
2022-09-01  6:01 ` [Intel-gfx] [PATCH v2 8/9] drm/i915/dp: Handle BPP where HDMI2.1 DFP doesn't support DSC Ankit Nautiyal
2022-09-01  6:01 ` [Intel-gfx] [PATCH v2 9/9] drm/i915/dp: Fix FRL BW check for HDMI2.1 DFP Ankit Nautiyal
2022-09-01  6:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev2) Patchwork
2022-09-01  6:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-01 20:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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