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From: Andi Shyti <andi.shyti@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	Andrzej Hajda <andrzej.hajda@intel.com>
Subject: Re: [Intel-gfx] [PATCH v1 1/1] drm/i915: Skip applying copy engine fuses
Date: Mon, 12 Sep 2022 18:59:53 +0200	[thread overview]
Message-ID: <Yx9liQu4JmnVmWVn@alfio.lan> (raw)
In-Reply-To: <20220912-copy-engine-v1-1-ef92fd81758d@intel.com>

Hi Lucas,

On Mon, Sep 12, 2022 at 09:19:38AM -0700, Lucas De Marchi wrote:
> Support for reading the fuses to check what are the Link Copy engines
> was added in commit ad5f74f34201 ("drm/i915/pvc: read fuses for link
> copy engines"). However they were added unconditionally because the
> FUSE3 register is present since graphics version 10.
> 
> However the bitfield with meml3 fuses only exists since graphics version
> 12. Moreover, Link Copy engines are currently only available in PVC.
> Tying additional copy engines to the meml3 fuses is not correct for
> other platforms.
> 
> Make sure there is a check for  `12.60 <= ver < 12.70`. Later platforms
> may extend this function later if it's needed to fuse off copy engines.
> 
> Currently it's harmless as the Link Copy engines are still not exported:
> info->engine_mask only has BCS0 set and the register is only read for
> platforms that do have it.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 814f83b5fe59..1f7188129cd1 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -764,6 +764,10 @@ static void engine_mask_apply_copy_fuses(struct intel_gt *gt)
>  	unsigned long meml3_mask;
>  	unsigned long quad;
>  
> +	if (!(GRAPHICS_VER_FULL(i915) >= IP_VER(12, 60) &&
> +	      GRAPHICS_VER_FULL(i915) < IP_VER(12, 70)))
> +		return;
> +

Isn't it easier if you wrote

	if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 60) ||
	    GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
		return;

?

You save a parenthesis and a negation '!'.

Anyway, looks good:

Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>

Andi
 
>  	meml3_mask = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
>  	meml3_mask = REG_FIELD_GET(GEN12_MEML3_EN_MASK, meml3_mask);
>  
> 
> -- 
> b4 0.10.0-dev-df873

  reply	other threads:[~2022-09-12 17:00 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-12 16:19 [Intel-gfx] [PATCH v1 0/1] drm/i915: Copy engine fuses future-proofing Lucas De Marchi
2022-09-12 16:19 ` [Intel-gfx] [PATCH v1 1/1] drm/i915: Skip applying copy engine fuses Lucas De Marchi
2022-09-12 16:59   ` Andi Shyti [this message]
2022-09-12 18:12     ` Lucas De Marchi
2022-09-12 20:12       ` Andi Shyti
2022-09-12 21:11         ` Lucas De Marchi
2022-09-12 18:53   ` Andrzej Hajda
2022-09-13  1:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Copy engine fuses future-proofing Patchwork
2022-09-13  9:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Copy engine fuses future-proofing (rev2) Patchwork
2022-09-13 18:49 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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