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From: Andi Shyti <andi.shyti@linux.intel.com>
To: fei.yang@intel.com
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	Chris Wilson <chris.p.wilson@linux.intel.com>,
	Matt Roper <matthew.d.roper@intel.com>
Subject: Re: [Intel-gfx] [PATCH v8 2/2] drm/i915: Allow user to set cache at BO creation
Date: Mon, 15 May 2023 14:12:14 +0200	[thread overview]
Message-ID: <ZGIhngPeHyKiTsGn@ashyti-mobl2.lan> (raw)
In-Reply-To: <20230512232825.1253644-3-fei.yang@intel.com>

Hi Fei,

On Fri, May 12, 2023 at 04:28:25PM -0700, fei.yang@intel.com wrote:
> From: Fei Yang <fei.yang@intel.com>
> 
> To comply with the design that buffer objects shall have immutable
> cache setting through out their life cycle, {set, get}_caching ioctl's
> are no longer supported from MTL onward. With that change caching
> policy can only be set at object creation time. The current code
> applies a default (platform dependent) cache setting for all objects.
> However this is not optimal for performance tuning. The patch extends
> the existing gem_create uAPI to let user set PAT index for the object
> at creation time.
> The new extension is platform independent, so UMD's can switch to using
> this extension for older platforms as well, while {set, get}_caching are
> still supported on these legacy paltforms for compatibility reason.
> 
> IGT posted at https://patchwork.freedesktop.org/series/117695/

Test gem_create@create-ext-set-pat

> Tested with https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878
> 
> Tested-by: Jordan Justen <jordan.l.justen@intel.com>

we need here an explicit ack to have the paper work in place. So
that I still have to ask Jordan and Mesa folks to give an ack if
things look right.

Thanks!
Andi

> Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Signed-off-by: Fei Yang <fei.yang@intel.com>
> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>

PS:

nitnitnitpick: the tags need to come in chronological order. So
that:

 - first you wrote it (Sob: Fei...)
 - then you sent it (Cc: ...)
 - then it has been reviewd (R-b)
 - finally tested (T-b)

I see that many people put the "Cc:" before the "Sob:" and I
consider it a matter of taste (which might mean "I first prepare
the mail (Cc:) and then I send it (Sob:)").

But... don't mind too much at these things.

Andi

  parent reply	other threads:[~2023-05-15 12:12 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-12 23:28 [Intel-gfx] [PATCH v8 0/2] drm/i915: Allow user to set cache at BO creation fei.yang
2023-05-12 23:28 ` [Intel-gfx] [PATCH v8 1/2] drm/i915/mtl: end support for set caching ioctl fei.yang
2023-05-12 23:28 ` [Intel-gfx] [PATCH v8 2/2] drm/i915: Allow user to set cache at BO creation fei.yang
2023-05-15 10:40   ` Tvrtko Ursulin
2023-05-15 12:12   ` Andi Shyti [this message]
2023-05-15 20:28     ` Yang, Fei
2023-05-13  0:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Allow user to set cache at BO creation (rev8) Patchwork
2023-05-13  0:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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