From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Fix the disabling sequence for Bigjoiner
Date: Thu, 6 Jul 2023 13:32:17 +0300 [thread overview]
Message-ID: <ZKaYMXeALQnEvYie@intel.com> (raw)
In-Reply-To: <ZKZ/ng6qj5cTrqaf@ideak-desk>
On Thu, Jul 06, 2023 at 11:47:26AM +0300, Imre Deak wrote:
> On Thu, Jul 06, 2023 at 11:24:21AM +0300, Lisovskiy, Stanislav wrote:
> > On Wed, Jul 05, 2023 at 06:32:51PM +0300, Imre Deak wrote:
> > > On Thu, May 25, 2023 at 01:10:36PM +0300, Stanislav Lisovskiy wrote:
> > > > According to BSpec 49190, when enabling crtcs, we first setup
> > > > slave and then master crtc, however for disabling it should go
> > > > vice versa, i.e first master, then slave, however current code
> > > > does disabling in a same way as enabling. Fix this, by skipping
> > > > non-master crtcs, instead of non-slaves.
> > > >
> > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > > index 0490c6412ab5..68958ba0ef49 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > > @@ -6662,7 +6662,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> > > > */
> > > > if (!is_trans_port_sync_slave(old_crtc_state) &&
> > > > !intel_dp_mst_is_slave_trans(old_crtc_state) &&
> > > > - !intel_crtc_is_bigjoiner_slave(old_crtc_state))
> > > > + !intel_crtc_is_bigjoiner_master(old_crtc_state))
> > >
> > > I don't see what does this fix. The sequence is correct at the moment
> > > and this change would break it, leaving the encoder PLL enabled
> > > incorrectly when the encoder->post_pll_disable() hook is called. Hence
> > > it's NAK from side.
> >
> > Well, as I pointed out the BSpec 49190 instructs us to disable master
> > first, then slave. Current code skips all non-slaves in first cycle,
> > i.e it disables first slaves and then masters. Which is _wrong_.
>
> This is correct at the moment, followed in the encoder's disable hook
> which is only assigned to the master CRTC.
Yep, I see now why it was implemented this way.
We basically handle everything in a single hook, taking care of the correct
sequence. As I understood otherwise we are going to have problems with the pll
subsystem, i.e we can't disable pll for master before the slaves(basically means
our pll subsystem contradicts what the crtc/pipe/encoder sequence requires).
I still think this is bery counterintuitive implementation, i.e when there is a single
hook for master taking care of everything, while slaves are just noop.
This makes the whole thing very prone for screwing things up.
Ideally we should still have fully functional hooks for all slaves.
If the pll stuff requires special treatment, that probably should be dealt somehow
separately(don't have any solution for that yet), but definitely we shouldn't live
further like that. Things might get even more complicated in future.
Stan
>
> > Anything else in particular, where do you need clarifications?
> >
> > Stan
> >
> > >
> > > > continue;
> > > >
> > > > intel_old_crtc_state_disables(state, old_crtc_state,
> > > > --
> > > > 2.37.3
> > > >
next prev parent reply other threads:[~2023-07-06 10:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-25 10:10 [Intel-gfx] [PATCH] drm/i915: Fix the disabling sequence for Bigjoiner Stanislav Lisovskiy
2023-05-25 19:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2023-05-26 4:15 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-07-05 13:26 ` [Intel-gfx] [PATCH] " Luca Coelho
2023-07-05 15:32 ` Imre Deak
2023-07-06 8:24 ` Lisovskiy, Stanislav
2023-07-06 8:47 ` Imre Deak
2023-07-06 8:50 ` Lisovskiy, Stanislav
2023-07-06 10:32 ` Lisovskiy, Stanislav [this message]
2023-07-06 18:02 ` Ville Syrjälä
2023-07-07 9:53 ` Lisovskiy, Stanislav
2023-07-06 8:33 ` Lisovskiy, Stanislav
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