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From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 15/20] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC
Date: Mon, 7 Aug 2023 15:23:38 +0300	[thread overview]
Message-ID: <ZNDiShHbpyqKI+nX@intel.com> (raw)
In-Reply-To: <20230728041150.2524032-16-ankit.k.nautiyal@intel.com>

On Fri, Jul 28, 2023 at 09:41:45AM +0530, Ankit Nautiyal wrote:
> Currently we check if the pipe_bpp selected is >= the
> min DSC bpc/bpp requirement. We do not check if it is <= the max DSC
> bpc/bpp requirement.
> 
> Add checks for max DSC BPC/BPP constraints while computing the
> pipe_bpp when DSC is in use.
> 
> v2: Fix the commit message.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 34 +++++++++++++++++--------
>  1 file changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index c87c3836966c..b296db026fd8 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1694,13 +1694,27 @@ u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
>  }
>  
>  static
> -bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, int pipe_bpp)
> +bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915,
> +				struct drm_connector_state *conn_state,
> +				struct link_config_limits *limits,
> +				int pipe_bpp)
>  {
> -	return pipe_bpp >= intel_dp_dsc_min_src_input_bpc(i915) * 3;
> +	u8 dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp;
> +
> +	dsc_max_bpc = min(intel_dp_dsc_max_src_input_bpc(i915), conn_state->max_requested_bpc);
> +	dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915);
> +
> +	dsc_max_pipe_bpp = min(dsc_max_bpc * 3, limits->max_bpp);
> +	dsc_min_pipe_bpp = max(dsc_min_bpc * 3, limits->min_bpp);
> +
> +	return pipe_bpp >= dsc_min_pipe_bpp &&
> +	       pipe_bpp <= dsc_max_pipe_bpp;
>  }
>  
>  static
> -int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp)
> +int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp,
> +				struct drm_connector_state *conn_state,
> +				struct link_config_limits *limits)
>  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	int forced_bpp;
> @@ -1710,7 +1724,7 @@ int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp)
>  
>  	forced_bpp = intel_dp->force_dsc_bpc * 3;
>  
> -	if (is_dsc_pipe_bpp_sufficient(i915, forced_bpp)) {
> +	if (is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, forced_bpp)) {
>  		drm_dbg_kms(&i915->drm, "Input DSC BPC forced to %d\n", intel_dp->force_dsc_bpc);
>  		return forced_bpp;
>  	}
> @@ -1732,16 +1746,16 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
>  	u16 output_bpp, dsc_max_compressed_bpp = 0;
>  	int forced_bpp, pipe_bpp;
>  
> -	forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp);
> +	forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits);
>  
>  	if (forced_bpp) {
>  		pipe_bpp = forced_bpp;
>  	} else {
>  		pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, conn_state->max_requested_bpc);
>  
> -		if (!is_dsc_pipe_bpp_sufficient(i915, pipe_bpp)) {
> +		if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) {
>  			drm_dbg_kms(&i915->drm,
> -				    "Computed BPC less than min supported by source for DSC\n");
> +				    "Computed BPC is not in DSC BPC limits\n");
>  			return -EINVAL;
>  		}
>  	}
> @@ -1783,7 +1797,7 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	int pipe_bpp, forced_bpp;
>  
> -	forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp);
> +	forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits);
>  
>  	if (forced_bpp) {
>  		pipe_bpp = forced_bpp;
> @@ -1791,9 +1805,9 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
>  		/* For eDP use max bpp that can be supported with DSC. */
>  		pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp,
>  							conn_state->max_requested_bpc);
> -		if (!is_dsc_pipe_bpp_sufficient(i915, pipe_bpp)) {
> +		if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) {
>  			drm_dbg_kms(&i915->drm,
> -				    "Computed BPC less than min supported by source for DSC\n");
> +				    "Computed BPC is not in DSC BPC limits\n");
>  			return -EINVAL;
>  		}
>  	}
> -- 
> 2.40.1
> 

  reply	other threads:[~2023-08-07 12:23 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-28  4:11 [Intel-gfx] [PATCH 00/20] DSC misc fixes Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 01/20] drm/i915/dp: Consider output_format while computing dsc bpp Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 02/20] drm/i915/dp: Move compressed bpp check with 420 format inside the helper Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 03/20] drm/i915/dp_mst: Use output_format to get the final link bpp Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 04/20] drm/i915/dp: Use consistent name for link bpp and compressed bpp Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 05/20] drm/i915/dp: Update Bigjoiner interface bits for computing " Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 06/20] drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 07/20] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 08/20] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal
2023-08-02 11:43   ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 09/20] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal
2023-08-02 11:47   ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 10/20] drm/i915/dp: Add functions to get min/max src input bpc with DSC Ankit Nautiyal
2023-08-02 12:05   ` Lisovskiy, Stanislav
2023-08-04  4:12     ` Nautiyal, Ankit K
2023-08-07 12:30       ` Lisovskiy, Stanislav
2023-08-08 10:08   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 11/20] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal
2023-08-07 12:33   ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 12/20] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 13/20] drm/i915/dp: Rename helper to get DSC max pipe_bpp Ankit Nautiyal
2023-08-07 12:06   ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 14/20] drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp Ankit Nautiyal
2023-08-07 12:08   ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 15/20] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC Ankit Nautiyal
2023-08-07 12:23   ` Lisovskiy, Stanislav [this message]
2023-07-28  4:11 ` [Intel-gfx] [PATCH 16/20] drm/i915/dp: Separate out function to get compressed bpp with joiner Ankit Nautiyal
2023-08-07 12:35   ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 17/20] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 18/20] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 19/20] drm/i915/dp: Check src/sink compressed bpp limit for edp Ankit Nautiyal
2023-08-07 12:27   ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 20/20] drm/i915/dp: Check if force_dsc_output_format is possible Ankit Nautiyal
2023-08-07 12:25   ` Lisovskiy, Stanislav
2023-07-28  4:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DSC misc fixes (rev5) Patchwork
2023-07-28  5:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-28 12:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-08-08 10:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC misc fixes (rev6) Patchwork
2023-08-08 10:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-08 10:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-08 17:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-08-10 13:02 [Intel-gfx] [PATCH 00/20] DSC misc fixes Ankit Nautiyal
2023-08-10 13:03 ` [Intel-gfx] [PATCH 15/20] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC Ankit Nautiyal

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