From: Imre Deak <imre.deak@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 26/30] drm/i915: Factor out function to clear pipe update flags
Date: Wed, 1 Nov 2023 13:38:11 +0200 [thread overview]
Message-ID: <ZUI4o3FmDzrBZIDA@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <ZUIlurzDLXGD0bvR@intel.com>
On Wed, Nov 01, 2023 at 12:17:30PM +0200, Ville Syrjälä wrote:
> On Mon, Oct 30, 2023 at 05:58:39PM +0200, Imre Deak wrote:
> > Factor out a helper to clear the pipe update flags, used by a follow-up
> > patch to modeset an MST topology.
> >
> > v2:
> > - Move the intel_crtc_needs_modeset() check to the callers. (Ville)
> >
> > Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> (v1)
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 52 ++++++++++----------
> > 1 file changed, 27 insertions(+), 25 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 1133c2893bb38..d27afda0cfaa6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5551,6 +5551,14 @@ int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state,
> > return 0;
> > }
> >
> > +static void
> > +clear_pipe_update_flags_on_modeset_crtc(struct intel_crtc_state *crtc_state)
>
> The 'on_modeset_crtc()' part doesn't make sense anymore.
>
> Hmm. Another idea would be to move the mode_changed=true assignment
> here and call this something like intel_crtc_flag_fmodeset(), which
> might be a bit more descriptive.
Ok makes sense, will do the above.
In intel_crtc_check_fastset() this will set mode_changed=true where it
wasn't before, but that looks ok.
> > +{
> > + crtc_state->update_pipe = false;
> > + crtc_state->update_m_n = false;
> > + crtc_state->update_lrr = false;
> > +}
> > +
> > /**
> > * intel_modeset_all_pipes_late - force a full modeset on all pipes
> > * @state: intel atomic state
> > @@ -5584,9 +5592,8 @@ int intel_modeset_all_pipes_late(struct intel_atomic_state *state,
> > if (ret)
> > return ret;
> >
> > - crtc_state->update_pipe = false;
> > - crtc_state->update_m_n = false;
> > - crtc_state->update_lrr = false;
> > + clear_pipe_update_flags_on_modeset_crtc(crtc_state);
> > +
> > crtc_state->update_planes |= crtc_state->active_planes;
> > crtc_state->async_flip_planes = 0;
> > crtc_state->do_async_flip = false;
> > @@ -5699,13 +5706,14 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta
> > else
> > new_crtc_state->uapi.mode_changed = false;
> >
> > - if (intel_crtc_needs_modeset(new_crtc_state) ||
> > - intel_compare_link_m_n(&old_crtc_state->dp_m_n,
> > + if (intel_crtc_needs_modeset(new_crtc_state))
> > + clear_pipe_update_flags_on_modeset_crtc(new_crtc_state);
> > +
> > + if (intel_compare_link_m_n(&old_crtc_state->dp_m_n,
> > &new_crtc_state->dp_m_n))
> > new_crtc_state->update_m_n = false;
> >
> > - if (intel_crtc_needs_modeset(new_crtc_state) ||
> > - (old_crtc_state->hw.adjusted_mode.crtc_vtotal == new_crtc_state->hw.adjusted_mode.crtc_vtotal &&
> > + if ((old_crtc_state->hw.adjusted_mode.crtc_vtotal == new_crtc_state->hw.adjusted_mode.crtc_vtotal &&
> > old_crtc_state->hw.adjusted_mode.crtc_vblank_end == new_crtc_state->hw.adjusted_mode.crtc_vblank_end))
> > new_crtc_state->update_lrr = false;
> >
> > @@ -6484,12 +6492,9 @@ int intel_atomic_check(struct drm_device *dev,
> > if (intel_dp_mst_is_slave_trans(new_crtc_state)) {
> > enum transcoder master = new_crtc_state->mst_master_transcoder;
> >
> > - if (intel_cpu_transcoders_need_modeset(state, BIT(master))) {
> > - new_crtc_state->uapi.mode_changed = true;
> > - new_crtc_state->update_pipe = false;
> > - new_crtc_state->update_m_n = false;
> > - new_crtc_state->update_lrr = false;
> > - }
> > + if (intel_cpu_transcoders_need_modeset(state, BIT(master)))
> > + intel_modeset_pipes_in_mask_early(state, "MST master transcoder",
> > + BIT(crtc->pipe));
>
> These changes don't really belong in this refactoring patch.
This had the benefit to show the reason for the modeset, but yes,
should've been a separate change. I'll remove it.
> > }
> >
> > if (is_trans_port_sync_mode(new_crtc_state)) {
> > @@ -6498,22 +6503,19 @@ int intel_atomic_check(struct drm_device *dev,
> > if (new_crtc_state->master_transcoder != INVALID_TRANSCODER)
> > trans |= BIT(new_crtc_state->master_transcoder);
> >
> > - if (intel_cpu_transcoders_need_modeset(state, trans)) {
> > - new_crtc_state->uapi.mode_changed = true;
> > - new_crtc_state->update_pipe = false;
> > - new_crtc_state->update_m_n = false;
> > - new_crtc_state->update_lrr = false;
> > - }
> > + if (intel_cpu_transcoders_need_modeset(state, trans))
> > + intel_modeset_pipes_in_mask_early(state, "port sync",
> > + BIT(crtc->pipe));
> > }
> >
> > if (new_crtc_state->bigjoiner_pipes) {
> > - if (intel_pipes_need_modeset(state, new_crtc_state->bigjoiner_pipes)) {
> > - new_crtc_state->uapi.mode_changed = true;
> > - new_crtc_state->update_pipe = false;
> > - new_crtc_state->update_m_n = false;
> > - new_crtc_state->update_lrr = false;
> > - }
> > + if (intel_pipes_need_modeset(state, new_crtc_state->bigjoiner_pipes))
> > + intel_modeset_pipes_in_mask_early(state, "bigjoiner pipes",
> > + BIT(crtc->pipe));
> > }
> > +
> > + if (intel_crtc_needs_modeset(new_crtc_state))
> > + clear_pipe_update_flags_on_modeset_crtc(new_crtc_state);
> > }
> >
> > for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> > --
> > 2.39.2
>
> --
> Ville Syrjälä
> Intel
next prev parent reply other threads:[~2023-11-01 11:37 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-30 15:58 [Intel-gfx] [PATCH v4 00/30] drm/i915: Improve BW management on MST links Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 01/30] drm/i915/dp_mst: Fix race between connector registration and setup Imre Deak
2023-10-31 9:23 ` Lisovskiy, Stanislav
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 02/30] drm/dp_mst: Fix fractional DSC bpp handling Imre Deak
2023-10-31 19:52 ` Imre Deak
2023-11-01 12:59 ` Jani Nikula
2023-11-06 8:16 ` Maxime Ripard
2023-11-07 22:45 ` Lyude Paul
2023-11-08 14:40 ` Harry Wentland
2023-11-08 17:01 ` Deucher, Alexander
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 03/30] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 04/30] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 05/30] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 06/30] drm/dp_mst: Allow DSC in any Synaptics last branch device Imre Deak
2023-11-07 22:35 ` Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 07/30] drm/dp: Add DP_HBLANK_EXPANSION_CAPABLE and DSC_PASSTHROUGH_EN DPCD flags Imre Deak
2023-11-07 22:35 ` Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 08/30] drm/dp_mst: Add HBLANK expansion quirk for Synaptics MST hubs Imre Deak
2023-11-07 22:37 ` Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 09/30] drm/dp: Add helpers to calculate the link BW overhead Imre Deak
2023-11-06 21:31 ` Ville Syrjälä
2023-11-06 22:28 ` Imre Deak
2023-11-07 16:24 ` Ville Syrjälä
2023-11-07 0:14 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-11-07 22:45 ` Lyude Paul
2023-11-07 22:42 ` [Intel-gfx] [PATCH v4 " Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 10/30] drm/i915/dp_mst: Enable FEC early once it's known DSC is needed Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 11/30] drm/i915/dp: Specify the FEC overhead as an increment vs. a remainder Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 12/30] drm/i915/dp: Pass actual BW overhead to m_n calculation Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 13/30] drm/i915/dp_mst: Account for FEC and DSC overhead during BW allocation Imre Deak
2023-11-06 20:39 ` Ville Syrjälä
2023-11-06 21:02 ` Imre Deak
2023-11-06 21:15 ` Ville Syrjälä
2023-11-06 21:29 ` Imre Deak
2023-11-06 20:49 ` Ville Syrjälä
2023-11-06 21:54 ` Imre Deak
2023-11-07 0:14 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 14/30] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 15/30] drm/i915/dp_mst: Program the DSC PPS SDP for each stream Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 16/30] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 17/30] drm/i915/dp_mst: Add missing DSC compression disabling Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 18/30] drm/i915/dp: Rename intel_ddi_disable_fec_state() to intel_ddi_disable_fec() Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 19/30] drm/i915/dp: Wait for FEC detected status in the sink Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 20/30] drm/i915/dp: Disable FEC ready flag " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 21/30] drm/i915/dp_mst: Handle the Synaptics HBlank expansion quirk Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 22/30] drm/i915/dp_mst: Enable decompression in the sink from the MST encoder hooks Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 23/30] drm/i915/dp: Enable DSC via the connector decompression AUX Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 24/30] drm/i915/dp_mst: Enable DSC passthrough Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 25/30] drm/i915/dp_mst: Enable MST DSC decompression for all streams Imre Deak
2023-10-31 8:47 ` Lisovskiy, Stanislav
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-11-08 8:09 ` Lisovskiy, Stanislav
2024-02-02 17:48 ` [v5, " Drew Davenport
2024-02-05 13:38 ` Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 26/30] drm/i915: Factor out function to clear pipe update flags Imre Deak
2023-11-01 10:17 ` Ville Syrjälä
2023-11-01 11:38 ` Imre Deak [this message]
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 27/30] drm/i915/dp_mst: Force modeset CRTC if DSC toggling requires it Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 28/30] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 29/30] drm/i915/dp_mst: Check BW limitations only after all streams are computed Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 30/30] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Imre Deak
2023-10-30 23:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on MST links (rev8) Patchwork
2023-10-30 23:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-30 23:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-31 14:16 ` Imre Deak
2023-11-01 4:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-02 11:44 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-11-03 22:43 ` [Intel-gfx] [PATCH v4 00/30] drm/i915: Improve BW management on MST links Lyude Paul
2023-11-07 1:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on MST links (rev16) Patchwork
2023-11-07 1:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-07 1:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-07 9:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-11-08 15:59 ` Imre Deak
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