From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 25/30] drm/i915/dp_mst: Enable MST DSC decompression for all streams
Date: Wed, 8 Nov 2023 10:09:15 +0200 [thread overview]
Message-ID: <ZUtCKzWccw/kI7Yx@intel.com> (raw)
In-Reply-To: <20231107001505.3370108-6-imre.deak@intel.com>
On Tue, Nov 07, 2023 at 02:15:03AM +0200, Imre Deak wrote:
> Enable DSC decompression for all streams. In particular atm if a sink is
> connected to a last branch device that is downstream of the first branch
> device connected to the source, decompression is not enabled for it.
> Similarly it's not enabled if the sink supports this with the last
> branch device passing through the compressed stream to it.
>
> Enable DSC in the above cases as well. Since last branch devices may
> handle the decompression for multiple ports, toggling DSC needs to be
> refcounted, add this using the DSC AUX device as a reference.
>
> v2:
> - Fix refcounting, setting/clearing
> connector->dp.dsc_decompression_enabled always as needed. (Stan)
> - Make the refcounting more uniform for the SST vs. MST case.
> - Add state checks for connector->dp.dsc_decompression_enabled and
> connector crtc.
> - Sanitize connector DSC decompression state during HW setup.
> - s/use_count/ref_count/
> v3:
> - Remove stale TODO: comment to set the actual decompression_aux.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 72 ++++++++++++++++++-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 24 ++-----
> .../drm/i915/display/intel_modeset_setup.c | 6 ++
> 4 files changed, 82 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 6c2f18ef543e4..0a5508c90e8bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -626,6 +626,7 @@ struct intel_connector {
> u8 fec_capability;
>
> u8 dsc_hblank_expansion_quirk:1;
> + u8 dsc_decompression_enabled:1;
> } dp;
>
> /* Work struct to schedule a uevent on link train failure */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index bea0c03b94835..3fee371529f17 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1403,6 +1403,7 @@ static bool intel_dp_supports_dsc(const struct intel_connector *connector,
> return false;
>
> return intel_dsc_source_support(crtc_state) &&
> + connector->dp.dsc_decompression_aux &&
> drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd);
> }
>
> @@ -2986,6 +2987,65 @@ intel_dp_sink_set_dsc_passthrough(const struct intel_connector *connector,
> str_enable_disable(enable));
> }
>
> +static int intel_dp_dsc_aux_ref_count(struct intel_atomic_state *state,
> + const struct intel_connector *connector,
> + bool for_get_ref)
> +{
> + struct drm_i915_private *i915 = to_i915(state->base.dev);
> + struct drm_connector *_connector_iter;
> + struct drm_connector_state *old_conn_state;
> + struct drm_connector_state *new_conn_state;
> + int ref_count = 0;
> + int i;
> +
> + /*
> + * On SST the decompression AUX device won't be shared, each connector
> + * uses for this its own AUX targeting the sink device.
> + */
> + if (!connector->mst_port)
> + return connector->dp.dsc_decompression_enabled ? 1 : 0;
> +
> + for_each_oldnew_connector_in_state(&state->base, _connector_iter,
> + old_conn_state, new_conn_state, i) {
> + const struct intel_connector *
> + connector_iter = to_intel_connector(_connector_iter);
> +
> + if (connector_iter->mst_port != connector->mst_port)
> + continue;
> +
> + if (!connector_iter->dp.dsc_decompression_enabled)
> + continue;
> +
> + drm_WARN_ON(&i915->drm,
> + (for_get_ref && !new_conn_state->crtc) ||
> + (!for_get_ref && !old_conn_state->crtc));
> +
> + if (connector_iter->dp.dsc_decompression_aux ==
> + connector->dp.dsc_decompression_aux)
> + ref_count++;
> + }
> +
> + return ref_count;
> +}
> +
> +static bool intel_dp_dsc_aux_get_ref(struct intel_atomic_state *state,
> + struct intel_connector *connector)
> +{
> + bool ret = intel_dp_dsc_aux_ref_count(state, connector, true) == 0;
> +
> + connector->dp.dsc_decompression_enabled = true;
> +
> + return ret;
> +}
> +
> +static bool intel_dp_dsc_aux_put_ref(struct intel_atomic_state *state,
> + struct intel_connector *connector)
> +{
> + connector->dp.dsc_decompression_enabled = false;
> +
> + return intel_dp_dsc_aux_ref_count(state, connector, false) == 0;
> +}
> +
> /**
> * intel_dp_sink_enable_decompression - Enable DSC decompression in sink/last branch device
> * @state: atomic state
> @@ -3009,7 +3069,11 @@ void intel_dp_sink_enable_decompression(struct intel_atomic_state *state,
> return;
>
> if (drm_WARN_ON(&i915->drm,
> - !connector->dp.dsc_decompression_aux))
> + !connector->dp.dsc_decompression_aux ||
> + connector->dp.dsc_decompression_enabled))
> + return;
> +
> + if (!intel_dp_dsc_aux_get_ref(state, connector))
> return;
>
> intel_dp_sink_set_dsc_passthrough(connector, true);
> @@ -3036,7 +3100,11 @@ void intel_dp_sink_disable_decompression(struct intel_atomic_state *state,
> return;
>
> if (drm_WARN_ON(&i915->drm,
> - !connector->dp.dsc_decompression_aux))
> + !connector->dp.dsc_decompression_aux ||
> + !connector->dp.dsc_decompression_enabled))
> + return;
> +
> + if (!intel_dp_dsc_aux_put_ref(state, connector))
> return;
>
> intel_dp_sink_set_dsc_decompression(connector, false);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index bc992e77ffc7a..b3d952bbb3cf0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -777,12 +777,7 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
>
> intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
>
> - if (intel_dp->active_mst_links == 1) /* last stream ? */
> - /*
> - * TODO: disable decompression for all streams/in any MST ports, not
> - * only in the first downstream branch device.
> - */
> - intel_dp_sink_disable_decompression(state, connector, old_crtc_state);
> + intel_dp_sink_disable_decompression(state, connector, old_crtc_state);
> }
>
> static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> @@ -939,15 +934,11 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
>
> drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
>
> - if (first_mst_stream) {
> - /*
> - * TODO: enable decompression for all streams/in any MST ports, not
> - * only in the first downstream branch device.
> - */
> - intel_dp_sink_enable_decompression(state, connector, pipe_config);
> + intel_dp_sink_enable_decompression(state, connector, pipe_config);
> +
> + if (first_mst_stream)
> dig_port->base.pre_enable(state, &dig_port->base,
> pipe_config, NULL);
> - }
>
> intel_dp->active_mst_links++;
>
> @@ -1394,12 +1385,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
> intel_connector->port = port;
> drm_dp_mst_get_port_malloc(port);
>
> - /*
> - * TODO: set the AUX for the actual MST port decompressing the stream.
> - * At the moment the driver only supports enabling this globally in the
> - * first downstream MST branch, via intel_dp's (root port) AUX.
> - */
> - intel_connector->dp.dsc_decompression_aux = &intel_dp->aux;
> + intel_connector->dp.dsc_decompression_aux = drm_dp_mst_dsc_aux_for_port(port);
> intel_dp_mst_read_decompression_port_dsc_caps(intel_dp, intel_connector);
> intel_connector->dp.dsc_hblank_expansion_quirk =
> detect_dsc_hblank_expansion_quirk(intel_connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index b8f43efb0ab5a..94eece7f63be3 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -318,6 +318,12 @@ static void intel_modeset_update_connector_atomic_state(struct drm_i915_private
> const struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> + if (crtc_state->dsc.compression_enable) {
> + drm_WARN_ON(&i915->drm, !connector->dp.dsc_decompression_aux);
> + connector->dp.dsc_decompression_enabled = true;
> + } else {
> + connector->dp.dsc_decompression_enabled = false;
> + }
> conn_state->max_bpc = (crtc_state->pipe_bpp ?: 24) / 3;
> }
> }
> --
> 2.39.2
>
next prev parent reply other threads:[~2023-11-08 8:09 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-30 15:58 [Intel-gfx] [PATCH v4 00/30] drm/i915: Improve BW management on MST links Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 01/30] drm/i915/dp_mst: Fix race between connector registration and setup Imre Deak
2023-10-31 9:23 ` Lisovskiy, Stanislav
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 02/30] drm/dp_mst: Fix fractional DSC bpp handling Imre Deak
2023-10-31 19:52 ` Imre Deak
2023-11-01 12:59 ` Jani Nikula
2023-11-06 8:16 ` Maxime Ripard
2023-11-07 22:45 ` Lyude Paul
2023-11-08 14:40 ` Harry Wentland
2023-11-08 17:01 ` Deucher, Alexander
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 03/30] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 04/30] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 05/30] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 06/30] drm/dp_mst: Allow DSC in any Synaptics last branch device Imre Deak
2023-11-07 22:35 ` Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 07/30] drm/dp: Add DP_HBLANK_EXPANSION_CAPABLE and DSC_PASSTHROUGH_EN DPCD flags Imre Deak
2023-11-07 22:35 ` Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 08/30] drm/dp_mst: Add HBLANK expansion quirk for Synaptics MST hubs Imre Deak
2023-11-07 22:37 ` Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 09/30] drm/dp: Add helpers to calculate the link BW overhead Imre Deak
2023-11-06 21:31 ` Ville Syrjälä
2023-11-06 22:28 ` Imre Deak
2023-11-07 16:24 ` Ville Syrjälä
2023-11-07 0:14 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-11-07 22:45 ` Lyude Paul
2023-11-07 22:42 ` [Intel-gfx] [PATCH v4 " Lyude Paul
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 10/30] drm/i915/dp_mst: Enable FEC early once it's known DSC is needed Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 11/30] drm/i915/dp: Specify the FEC overhead as an increment vs. a remainder Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 12/30] drm/i915/dp: Pass actual BW overhead to m_n calculation Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 13/30] drm/i915/dp_mst: Account for FEC and DSC overhead during BW allocation Imre Deak
2023-11-06 20:39 ` Ville Syrjälä
2023-11-06 21:02 ` Imre Deak
2023-11-06 21:15 ` Ville Syrjälä
2023-11-06 21:29 ` Imre Deak
2023-11-06 20:49 ` Ville Syrjälä
2023-11-06 21:54 ` Imre Deak
2023-11-07 0:14 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 14/30] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 15/30] drm/i915/dp_mst: Program the DSC PPS SDP for each stream Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 16/30] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 17/30] drm/i915/dp_mst: Add missing DSC compression disabling Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 18/30] drm/i915/dp: Rename intel_ddi_disable_fec_state() to intel_ddi_disable_fec() Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 19/30] drm/i915/dp: Wait for FEC detected status in the sink Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 20/30] drm/i915/dp: Disable FEC ready flag " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 21/30] drm/i915/dp_mst: Handle the Synaptics HBlank expansion quirk Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 22/30] drm/i915/dp_mst: Enable decompression in the sink from the MST encoder hooks Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 23/30] drm/i915/dp: Enable DSC via the connector decompression AUX Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 24/30] drm/i915/dp_mst: Enable DSC passthrough Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 25/30] drm/i915/dp_mst: Enable MST DSC decompression for all streams Imre Deak
2023-10-31 8:47 ` Lisovskiy, Stanislav
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-11-08 8:09 ` Lisovskiy, Stanislav [this message]
2024-02-02 17:48 ` [v5, " Drew Davenport
2024-02-05 13:38 ` Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 26/30] drm/i915: Factor out function to clear pipe update flags Imre Deak
2023-11-01 10:17 ` Ville Syrjälä
2023-11-01 11:38 ` Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 27/30] drm/i915/dp_mst: Force modeset CRTC if DSC toggling requires it Imre Deak
2023-11-07 0:15 ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 28/30] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 29/30] drm/i915/dp_mst: Check BW limitations only after all streams are computed Imre Deak
2023-10-30 15:58 ` [Intel-gfx] [PATCH v4 30/30] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Imre Deak
2023-10-30 23:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on MST links (rev8) Patchwork
2023-10-30 23:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-30 23:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-31 14:16 ` Imre Deak
2023-11-01 4:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-02 11:44 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-11-03 22:43 ` [Intel-gfx] [PATCH v4 00/30] drm/i915: Improve BW management on MST links Lyude Paul
2023-11-07 1:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on MST links (rev16) Patchwork
2023-11-07 1:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-07 1:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-07 9:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-11-08 15:59 ` Imre Deak
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