[RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Juha-Pekka Heikkila]

These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS modifier, which,
from the kernel's perspective, behaves similarly to `I915_FORMAT_MOD_4_TILED`.
This new modifier is primarily intended for user space to effectively monitor
compression status, especially when dealing with a mix of compressed and
uncompressed buffers.

The addition of this modifier facilitates user space in managing compression
status, particularly when utilizing both compressed and uncompressed buffers
concurrently. To leverage compression for these buffers, user space
applications must configure the appropriate Page Attribute Table (PAT) index.
Display engine will treat all Tile4 as if it were compressed under all
circumstances on Xe2 architecture.

Notably, this patch series omits support for X-tiled CCS and linear CCS
for Xe2, neither of which is supported by display engine. X-tiled CCS
offers stateless compression making it less likely to be extensively
utilized. Linear CCS does possess state, but currently lacks expected users.

These patches aim to enhance the flexibility and efficiency of handling
compressed and uncompressed buffers in Xe driver, particularly
catering to the specific requirements of the Xe2 architecture.

Juha-Pekka Heikkila (3):
  drm/fourcc: define Intel Xe2 related tile4 ccs modifier
  drm/xe/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS
    type framebuffer
  drm/i915/display: allow creation of case
    I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer

 drivers/gpu/drm/i915/display/intel_display.c       |  1 +
 drivers/gpu/drm/i915/display/intel_fb.c            | 10 ++++++++++
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  4 +++-
 drivers/gpu/drm/xe/display/xe_plane_initial.c      |  1 +
 include/uapi/drm/drm_fourcc.h                      | 12 ++++++++++++
 5 files changed, 27 insertions(+), 1 deletion(-)

-- 
2.43.2

[RFC PATCH 1/3] drm/fourcc: define Intel Xe2 related tile4 ccs modifier

[Juha-Pekka Heikkila]

Add Tile4 type ccs modifier to indicate presence of compression on Xe2

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 include/uapi/drm/drm_fourcc.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 84d502e42961..50db2cc89642 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -702,6 +702,18 @@ extern "C" {
  */
 #define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)
 
+/*
+ * Intel Color Control Surfaces (CCS) for graphics ver. 20 render compression.
+ *
+ * The main surface is Tile 4 and at plane index 0. For semi-planar formats
+ * like NV12, the Y and UV planes are Tile 4 and are located at plane indices
+ * 0 and 1, respectively. The CCS for all planes are stored outside of the
+ * GEM object in a reserved memory area dedicated for the storage of the
+ * CCS data for all compressible GEM objects. The main surface pitch is
+ * required to be a multiple of four Tile 4 widths.
+ */
+#define I915_FORMAT_MOD_4_TILED_XE2_CCS fourcc_mod_code(INTEL, 16)
+
 /*
  * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
  *
-- 
2.43.2

RE: [RFC PATCH 1/3] drm/fourcc: define Intel Xe2 related tile4 ccs modifier

[Chery, Nanley G]

> -----Original Message-----
> From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> Sent: Monday, May 6, 2024 2:53 PM
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>; Chery, Nanley G <nanley.g.chery@intel.com>; Saarinen, Jani
> <jani.saarinen@intel.com>; Graunke, Kenneth W <kenneth.w.graunke@intel.com>; Souza, Jose <jose.souza@intel.com>; Mathew, Alwin
> <alwin.mathew@intel.com>; Zhang, Jianxun <jianxun.zhang@intel.com>; Syrjala, Ville <ville.syrjala@linux.intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [RFC PATCH 1/3] drm/fourcc: define Intel Xe2 related tile4 ccs modifier
> 
> Add Tile4 type ccs modifier to indicate presence of compression on Xe2
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
>  include/uapi/drm/drm_fourcc.h | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 84d502e42961..50db2cc89642 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -702,6 +702,18 @@ extern "C" {
>   */
>  #define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)
> 
> +/*
> + * Intel Color Control Surfaces (CCS) for graphics ver. 20 render compression.
> + *
> + * The main surface is Tile 4 and at plane index 0. For semi-planar formats
> + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices
> + * 0 and 1, respectively. The CCS for all planes are stored outside of the
> + * GEM object in a reserved memory area dedicated for the storage of the
> + * CCS data for all compressible GEM objects. The main surface pitch is
> + * required to be a multiple of four Tile 4 widths.
> + */

The pitch requirement is gone on this generation, isn't it?

-Nanley

> +#define I915_FORMAT_MOD_4_TILED_XE2_CCS fourcc_mod_code(INTEL, 16)
> +
>  /*
>   * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
>   *
> --
> 2.43.2

[RFC PATCH 2/3] drm/xe/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer

[Juha-Pekka Heikkila]

Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer
on Xe driver.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 drivers/gpu/drm/xe/display/xe_plane_initial.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
index 9693c56d386b..59adcd15eb31 100644
--- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
+++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
@@ -145,6 +145,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
 	case I915_FORMAT_MOD_X_TILED:
 	case I915_FORMAT_MOD_Y_TILED:
 	case I915_FORMAT_MOD_4_TILED:
+	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
 		break;
 	default:
 		drm_dbg(&dev_priv->drm,
-- 
2.43.2

Re: [RFC PATCH 2/3] drm/xe/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer

[Ville Syrjälä]

On Mon, May 06, 2024 at 09:52:37PM +0300, Juha-Pekka Heikkila wrote:
> Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer
> on Xe driver.
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
>  drivers/gpu/drm/xe/display/xe_plane_initial.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
> index 9693c56d386b..59adcd15eb31 100644
> --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
> +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
> @@ -145,6 +145,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
>  	case I915_FORMAT_MOD_X_TILED:
>  	case I915_FORMAT_MOD_Y_TILED:
>  	case I915_FORMAT_MOD_4_TILED:
> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:

Are we actually expecting GOP to enable compression?

>  		break;
>  	default:
>  		drm_dbg(&dev_priv->drm,
> -- 
> 2.43.2

-- 
Ville Syrjälä
Intel

Re: [RFC PATCH 2/3] drm/xe/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer

[Juha-Pekka Heikkila]

On 7.5.2024 19.07, Ville Syrjälä wrote:
> On Mon, May 06, 2024 at 09:52:37PM +0300, Juha-Pekka Heikkila wrote:
>> Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer
>> on Xe driver.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>>   drivers/gpu/drm/xe/display/xe_plane_initial.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
>> index 9693c56d386b..59adcd15eb31 100644
>> --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
>> +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
>> @@ -145,6 +145,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
>>   	case I915_FORMAT_MOD_X_TILED:
>>   	case I915_FORMAT_MOD_Y_TILED:
>>   	case I915_FORMAT_MOD_4_TILED:
>> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
> 
> Are we actually expecting GOP to enable compression?

This came in the wrong place, it's not needed here.

> 
>>   		break;
>>   	default:
>>   		drm_dbg(&dev_priv->drm,
>> -- 
>> 2.43.2
> 

[RFC PATCH 3/3] drm/i915/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer

[Juha-Pekka Heikkila]

Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer
on Xe driver.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 drivers/gpu/drm/i915/display/intel_display.c       |  1 +
 drivers/gpu/drm/i915/display/intel_fb.c            | 10 ++++++++++
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  4 +++-
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ef986b508431..083147a21edb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6150,6 +6150,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in
 		case I915_FORMAT_MOD_Y_TILED:
 		case I915_FORMAT_MOD_Yf_TILED:
 		case I915_FORMAT_MOD_4_TILED:
+		case I915_FORMAT_MOD_4_TILED_XE2_CCS:
 			break;
 		default:
 			drm_dbg_kms(&i915->drm,
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index bf24f48a1e76..6a44746b8381 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -161,6 +161,10 @@ struct intel_modifier_desc {
 
 static const struct intel_modifier_desc intel_modifiers[] = {
 	{
+		.modifier = I915_FORMAT_MOD_4_TILED_XE2_CCS,
+		.display_ver = { 14, -1 },
+		.plane_caps = INTEL_PLANE_CAP_TILING_4,
+	}, {
 		.modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS,
 		.display_ver = { 14, 14 },
 		.plane_caps = INTEL_PLANE_CAP_TILING_4 | INTEL_PLANE_CAP_CCS_MC,
@@ -435,6 +439,10 @@ static bool plane_has_modifier(struct drm_i915_private *i915,
 	    HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
 		return false;
 
+	if (md->modifier == I915_FORMAT_MOD_4_TILED_XE2_CCS &&
+	    GRAPHICS_VER(i915) < 20)
+		return false;
+
 	return true;
 }
 
@@ -657,6 +665,7 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
 			return 128;
 		else
 			return 512;
+	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
 	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
@@ -858,6 +867,7 @@ unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
 	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
 	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
 		return 16 * 1024;
+	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
 	case I915_FORMAT_MOD_Y_TILED_CCS:
 	case I915_FORMAT_MOD_Yf_TILED_CCS:
 	case I915_FORMAT_MOD_Y_TILED:
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 0a8e781a3648..e590fea1180a 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -792,6 +792,7 @@ static u32 skl_plane_ctl_tiling(u64 fb_modifier)
 	case I915_FORMAT_MOD_Y_TILED:
 		return PLANE_CTL_TILED_Y;
 	case I915_FORMAT_MOD_4_TILED:
+	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
 		return PLANE_CTL_TILED_4;
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
 		return PLANE_CTL_TILED_4 |
@@ -949,7 +950,8 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
 		plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
 
 	if (GRAPHICS_VER(dev_priv) >= 20 &&
-	    fb->modifier == I915_FORMAT_MOD_4_TILED) {
+	    (fb->modifier == I915_FORMAT_MOD_4_TILED ||
+	     fb->modifier == I915_FORMAT_MOD_4_TILED_XE2_CCS)) {
 		plane_ctl |= PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
 	}
 
-- 
2.43.2

Re: [RFC PATCH 3/3] drm/i915/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer

[Ville Syrjälä]

On Mon, May 06, 2024 at 09:52:38PM +0300, Juha-Pekka Heikkila wrote:
> Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer
> on Xe driver.
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c       |  1 +
>  drivers/gpu/drm/i915/display/intel_fb.c            | 10 ++++++++++
>  drivers/gpu/drm/i915/display/skl_universal_plane.c |  4 +++-
>  3 files changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ef986b508431..083147a21edb 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6150,6 +6150,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in
>  		case I915_FORMAT_MOD_Y_TILED:
>  		case I915_FORMAT_MOD_Yf_TILED:
>  		case I915_FORMAT_MOD_4_TILED:
> +		case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>  			break;
>  		default:
>  			drm_dbg_kms(&i915->drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index bf24f48a1e76..6a44746b8381 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -161,6 +161,10 @@ struct intel_modifier_desc {
>  
>  static const struct intel_modifier_desc intel_modifiers[] = {
>  	{
> +		.modifier = I915_FORMAT_MOD_4_TILED_XE2_CCS,
> +		.display_ver = { 14, -1 },

Should that say 20?

> +		.plane_caps = INTEL_PLANE_CAP_TILING_4,
> +	}, {
>  		.modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS,
>  		.display_ver = { 14, 14 },
>  		.plane_caps = INTEL_PLANE_CAP_TILING_4 | INTEL_PLANE_CAP_CCS_MC,
> @@ -435,6 +439,10 @@ static bool plane_has_modifier(struct drm_i915_private *i915,
>  	    HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
>  		return false;
>  
> +	if (md->modifier == I915_FORMAT_MOD_4_TILED_XE2_CCS &&
> +	    GRAPHICS_VER(i915) < 20)
> +		return false;
> +
>  	return true;
>  }
>  
> @@ -657,6 +665,7 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
>  			return 128;
>  		else
>  			return 512;
> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>  	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>  	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>  	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
> @@ -858,6 +867,7 @@ unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
>  	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
>  	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
>  		return 16 * 1024;
> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>  	case I915_FORMAT_MOD_Y_TILED_CCS:
>  	case I915_FORMAT_MOD_Yf_TILED_CCS:
>  	case I915_FORMAT_MOD_Y_TILED:
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 0a8e781a3648..e590fea1180a 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -792,6 +792,7 @@ static u32 skl_plane_ctl_tiling(u64 fb_modifier)
>  	case I915_FORMAT_MOD_Y_TILED:
>  		return PLANE_CTL_TILED_Y;
>  	case I915_FORMAT_MOD_4_TILED:
> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>  		return PLANE_CTL_TILED_4;
>  	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>  		return PLANE_CTL_TILED_4 |
> @@ -949,7 +950,8 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
>  		plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
>  
>  	if (GRAPHICS_VER(dev_priv) >= 20 &&
> -	    fb->modifier == I915_FORMAT_MOD_4_TILED) {
> +	    (fb->modifier == I915_FORMAT_MOD_4_TILED ||
> +	     fb->modifier == I915_FORMAT_MOD_4_TILED_XE2_CCS)) {
>  		plane_ctl |= PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;

If we got to the trouble of adding a new modifier then we should
just let skl_plane_ctl_tiling() handle this, like it does for
every other platform.

>  	}
>  
> -- 
> 2.43.2

-- 
Ville Syrjälä
Intel

Re: [RFC PATCH 3/3] drm/i915/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer

[Juha-Pekka Heikkila]

On 7.5.2024 19.06, Ville Syrjälä wrote:
> On Mon, May 06, 2024 at 09:52:38PM +0300, Juha-Pekka Heikkila wrote:
>> Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer
>> on Xe driver.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_display.c       |  1 +
>>   drivers/gpu/drm/i915/display/intel_fb.c            | 10 ++++++++++
>>   drivers/gpu/drm/i915/display/skl_universal_plane.c |  4 +++-
>>   3 files changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index ef986b508431..083147a21edb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -6150,6 +6150,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in
>>   		case I915_FORMAT_MOD_Y_TILED:
>>   		case I915_FORMAT_MOD_Yf_TILED:
>>   		case I915_FORMAT_MOD_4_TILED:
>> +		case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>>   			break;
>>   		default:
>>   			drm_dbg_kms(&i915->drm,
>> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
>> index bf24f48a1e76..6a44746b8381 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fb.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
>> @@ -161,6 +161,10 @@ struct intel_modifier_desc {
>>   
>>   static const struct intel_modifier_desc intel_modifiers[] = {
>>   	{
>> +		.modifier = I915_FORMAT_MOD_4_TILED_XE2_CCS,
>> +		.display_ver = { 14, -1 },
> 
> Should that say 20?

No, 14 is smallest display version where this can be used. (and graphics 
version 20)

> 
>> +		.plane_caps = INTEL_PLANE_CAP_TILING_4,
>> +	}, {
>>   		.modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS,
>>   		.display_ver = { 14, 14 },
>>   		.plane_caps = INTEL_PLANE_CAP_TILING_4 | INTEL_PLANE_CAP_CCS_MC,
>> @@ -435,6 +439,10 @@ static bool plane_has_modifier(struct drm_i915_private *i915,
>>   	    HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
>>   		return false;
>>   
>> +	if (md->modifier == I915_FORMAT_MOD_4_TILED_XE2_CCS &&
>> +	    GRAPHICS_VER(i915) < 20)
>> +		return false;
>> +
>>   	return true;
>>   }
>>   
>> @@ -657,6 +665,7 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
>>   			return 128;
>>   		else
>>   			return 512;
>> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>>   	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>>   	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>>   	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
>> @@ -858,6 +867,7 @@ unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
>>   	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
>>   	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
>>   		return 16 * 1024;
>> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>>   	case I915_FORMAT_MOD_Y_TILED_CCS:
>>   	case I915_FORMAT_MOD_Yf_TILED_CCS:
>>   	case I915_FORMAT_MOD_Y_TILED:
>> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>> index 0a8e781a3648..e590fea1180a 100644
>> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
>> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>> @@ -792,6 +792,7 @@ static u32 skl_plane_ctl_tiling(u64 fb_modifier)
>>   	case I915_FORMAT_MOD_Y_TILED:
>>   		return PLANE_CTL_TILED_Y;
>>   	case I915_FORMAT_MOD_4_TILED:
>> +	case I915_FORMAT_MOD_4_TILED_XE2_CCS:
>>   		return PLANE_CTL_TILED_4;
>>   	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>>   		return PLANE_CTL_TILED_4 |
>> @@ -949,7 +950,8 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
>>   		plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
>>   
>>   	if (GRAPHICS_VER(dev_priv) >= 20 &&
>> -	    fb->modifier == I915_FORMAT_MOD_4_TILED) {
>> +	    (fb->modifier == I915_FORMAT_MOD_4_TILED ||
>> +	     fb->modifier == I915_FORMAT_MOD_4_TILED_XE2_CCS)) {
>>   		plane_ctl |= PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
> 
> If we got to the trouble of adding a new modifier then we should
> just let skl_plane_ctl_tiling() handle this, like it does for
> every other platform.

yea, this will need to be moved. Otherwise here start to gather clutter.

> 
>>   	}
>>   
>> -- 
>> 2.43.2
> 

✗ Fi.CI.CHECKPATCH: warning for Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Patchwork]

== Series Details ==

Series: Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2
URL   : https://patchwork.freedesktop.org/series/133253/
State : warning

== Summary ==

Error: dim checkpatch failed
e953532ce0c8 drm/fourcc: define Intel Xe2 related tile4 ccs modifier
4ef786f4f7f8 drm/xe/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer
-:7: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#7: 
Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer

total: 0 errors, 1 warnings, 0 checks, 7 lines checked
76d92001b0e9 drm/i915/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer
-:7: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#7: 
Add I915_FORMAT_MOD_4_TILED_XE2_CCS to possible created tiling for new framebuffer

total: 0 errors, 1 warnings, 0 checks, 57 lines checked

✓ Fi.CI.BAT: success for Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4496 bytes --]

== Series Details ==

Series: Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2
URL   : https://patchwork.freedesktop.org/series/133253/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14715 -> Patchwork_133253v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/index.html

Participating hosts (43 -> 37)
------------------------------

  Missing    (6): bat-dg1-7 bat-kbl-2 fi-snb-2520m fi-elk-e7500 bat-jsl-1 bat-mtlp-6 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_133253v1:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-6:
    - {bat-mtlp-9}:       NOTRUN -> [DMESG-WARN][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/bat-mtlp-9/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-6.html

  
Known issues
------------

  Here are the changes found in Patchwork_133253v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_lmem_swapping@basic@lmem0:
    - bat-dg2-11:         [PASS][2] -> [FAIL][3] ([i915#10378])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_lrc:
    - fi-tgl-1115g4:      [DMESG-FAIL][4] -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/fi-tgl-1115g4/igt@i915_selftest@live@gt_lrc.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/fi-tgl-1115g4/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@workarounds:
    - bat-dg2-8:          [DMESG-FAIL][6] ([i915#10793]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/bat-dg2-8/igt@i915_selftest@live@workarounds.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/bat-dg2-8/igt@i915_selftest@live@workarounds.html

  * igt@kms_busy@basic@modeset:
    - {bat-mtlp-9}:       [FAIL][8] ([i915#9224]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/bat-mtlp-9/igt@kms_busy@basic@modeset.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/bat-mtlp-9/igt@kms_busy@basic@modeset.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - {bat-mtlp-9}:       [DMESG-WARN][10] ([i915#10435] / [i915#9157]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/bat-mtlp-9/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/bat-mtlp-9/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
  [i915#10435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10435
  [i915#10580]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10580
  [i915#10793]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10793
  [i915#10900]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10900
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#8585]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8585
  [i915#9157]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9157
  [i915#9224]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9224


Build changes
-------------

  * Linux: CI_DRM_14715 -> Patchwork_133253v1

  CI-20190529: 20190529
  CI_DRM_14715: 83e0d2a2621c7550c198b8936f4680b24f24a698 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7834: 008178acd533c33910d41fefc80462b3915c89fc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_133253v1: 83e0d2a2621c7550c198b8936f4680b24f24a698 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/index.html

[-- Attachment #2: Type: text/html, Size: 4855 bytes --]

✗ Fi.CI.IGT: failure for Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 85994 bytes --]

== Series Details ==

Series: Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2
URL   : https://patchwork.freedesktop.org/series/133253/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14715_full -> Patchwork_133253v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_133253v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_133253v1_full, please notify your bug team ('I915-ci-infra@lists.freedesktop.org') to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 9)
------------------------------

  Missing    (1): shard-snb-0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_133253v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@sysfs_preempt_timeout@timeout@vecs0:
    - shard-dg2:          [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-8/igt@sysfs_preempt_timeout@timeout@vecs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-10/igt@sysfs_preempt_timeout@timeout@vecs0.html

  
Known issues
------------

  Here are the changes found in Patchwork_133253v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@crc32:
    - shard-rkl:          NOTRUN -> [SKIP][3] ([i915#6230])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@api_intel_bb@crc32.html
    - shard-dg1:          NOTRUN -> [SKIP][4] ([i915#6230])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@api_intel_bb@crc32.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-rkl:          NOTRUN -> [SKIP][5] ([i915#8411])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-tglu:         NOTRUN -> [SKIP][6] ([i915#7701])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@device_reset@unbind-reset-rebind:
    - shard-dg1:          NOTRUN -> [INCOMPLETE][7] ([i915#9408] / [i915#9618])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@device_reset@unbind-reset-rebind.html

  * igt@drm_fdinfo@isolation@vcs1:
    - shard-dg2:          NOTRUN -> [SKIP][8] ([i915#8414]) +6 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@drm_fdinfo@isolation@vcs1.html

  * igt@drm_fdinfo@most-busy-check-all@bcs0:
    - shard-dg1:          NOTRUN -> [SKIP][9] ([i915#8414]) +4 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@drm_fdinfo@most-busy-check-all@bcs0.html

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          NOTRUN -> [FAIL][10] ([i915#7742])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@drm_fdinfo@virtual-busy-idle:
    - shard-mtlp:         NOTRUN -> [SKIP][11] ([i915#8414]) +7 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@drm_fdinfo@virtual-busy-idle.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-rkl:          NOTRUN -> [SKIP][12] ([i915#3555] / [i915#9323])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-mtlp:         NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-dg1:          NOTRUN -> [SKIP][14] ([i915#7697])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-mtlp:         NOTRUN -> [SKIP][15] ([i915#6335])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-rkl:          NOTRUN -> [FAIL][16] ([i915#6268])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_ctx_persistence@processes:
    - shard-snb:          NOTRUN -> [SKIP][17] ([i915#1099]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-snb7/igt@gem_ctx_persistence@processes.html

  * igt@gem_ctx_sseu@engines:
    - shard-tglu:         NOTRUN -> [SKIP][18] ([i915#280])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@gem_ctx_sseu@engines.html

  * igt@gem_eio@kms:
    - shard-dg1:          NOTRUN -> [INCOMPLETE][19] ([i915#10513])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@gem_eio@kms.html

  * igt@gem_eio@reset-stress:
    - shard-dg1:          [PASS][20] -> [FAIL][21] ([i915#5784])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg1-15/igt@gem_eio@reset-stress.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_eio@reset-stress.html

  * igt@gem_exec_balancer@bonded-pair:
    - shard-dg1:          NOTRUN -> [SKIP][22] ([i915#4771])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@gem_exec_balancer@bonded-pair.html

  * igt@gem_exec_balancer@bonded-sync:
    - shard-dg2:          NOTRUN -> [SKIP][23] ([i915#4771])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@gem_exec_balancer@bonded-sync.html

  * igt@gem_exec_balancer@invalid-bonds:
    - shard-dg1:          NOTRUN -> [SKIP][24] ([i915#4036])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_exec_balancer@invalid-bonds.html

  * igt@gem_exec_balancer@sliced:
    - shard-dg2:          NOTRUN -> [SKIP][25] ([i915#4812]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@gem_exec_balancer@sliced.html

  * igt@gem_exec_capture@capture-invisible@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][26] ([i915#6334]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@gem_exec_capture@capture-invisible@lmem0.html

  * igt@gem_exec_capture@capture@vecs0-smem:
    - shard-mtlp:         NOTRUN -> [FAIL][27] ([i915#10386])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@gem_exec_capture@capture@vecs0-smem.html

  * igt@gem_exec_capture@many-4k-incremental:
    - shard-glk:          NOTRUN -> [FAIL][28] ([i915#9606])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk1/igt@gem_exec_capture@many-4k-incremental.html

  * igt@gem_exec_capture@many-4k-zero:
    - shard-tglu:         NOTRUN -> [FAIL][29] ([i915#9606])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@gem_exec_capture@many-4k-zero.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          NOTRUN -> [FAIL][30] ([i915#2846])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk5/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none:
    - shard-dg1:          NOTRUN -> [SKIP][31] ([i915#3539] / [i915#4852]) +4 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_exec_fair@basic-none.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglu:         [PASS][32] -> [FAIL][33] ([i915#2842])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-tglu-5/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-9/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo:
    - shard-mtlp:         NOTRUN -> [SKIP][34] ([i915#4473])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@gem_exec_fair@basic-pace-solo.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][35] ([i915#2842]) +1 other test fail
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_fence@submit3:
    - shard-dg1:          NOTRUN -> [SKIP][36] ([i915#4812])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_exec_fence@submit3.html

  * igt@gem_exec_flush@basic-wb-prw-default:
    - shard-dg2:          NOTRUN -> [SKIP][37] ([i915#3539] / [i915#4852]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@gem_exec_flush@basic-wb-prw-default.html

  * igt@gem_exec_reloc@basic-concurrent0:
    - shard-dg1:          NOTRUN -> [SKIP][38] ([i915#3281]) +10 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@gem_exec_reloc@basic-concurrent0.html

  * igt@gem_exec_reloc@basic-write-read:
    - shard-rkl:          NOTRUN -> [SKIP][39] ([i915#3281]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@gem_exec_reloc@basic-write-read.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - shard-dg2:          NOTRUN -> [SKIP][40] ([i915#3281]) +7 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_exec_schedule@reorder-wide:
    - shard-dg2:          NOTRUN -> [SKIP][41] ([i915#4537] / [i915#4812]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@gem_exec_schedule@reorder-wide.html

  * igt@gem_fenced_exec_thrash@no-spare-fences:
    - shard-dg1:          NOTRUN -> [SKIP][42] ([i915#4860])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_fenced_exec_thrash@no-spare-fences.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
    - shard-mtlp:         NOTRUN -> [SKIP][43] ([i915#4860]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglu:         NOTRUN -> [SKIP][44] ([i915#2190])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@heavy-random:
    - shard-tglu:         NOTRUN -> [SKIP][45] ([i915#4613]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@gem_lmem_swapping@heavy-random.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
    - shard-rkl:          NOTRUN -> [SKIP][46] ([i915#4613]) +2 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@gem_lmem_swapping@heavy-verify-multi.html

  * igt@gem_lmem_swapping@heavy-verify-multi@lmem0:
    - shard-dg1:          NOTRUN -> [FAIL][47] ([i915#10378])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@gem_lmem_swapping@heavy-verify-multi@lmem0.html
    - shard-dg2:          [PASS][48] -> [FAIL][49] ([i915#10378]) +1 other test fail
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-8/igt@gem_lmem_swapping@heavy-verify-multi@lmem0.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-3/igt@gem_lmem_swapping@heavy-verify-multi@lmem0.html

  * igt@gem_lmem_swapping@random-engines:
    - shard-glk:          NOTRUN -> [SKIP][50] ([i915#4613]) +3 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk7/igt@gem_lmem_swapping@random-engines.html
    - shard-mtlp:         NOTRUN -> [SKIP][51] ([i915#4613]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          NOTRUN -> [TIMEOUT][52] ([i915#5493])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_lmem_swapping@verify-random-ccs@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][53] ([i915#4565])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@gem_lmem_swapping@verify-random-ccs@lmem0.html

  * igt@gem_mmap@big-bo:
    - shard-mtlp:         NOTRUN -> [SKIP][54] ([i915#4083]) +4 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@gem_mmap@big-bo.html

  * igt@gem_mmap_gtt@basic:
    - shard-mtlp:         NOTRUN -> [SKIP][55] ([i915#4077]) +4 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@gem_mmap_gtt@basic.html

  * igt@gem_mmap_gtt@fault-concurrent-x:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#4077]) +8 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@gem_mmap_gtt@fault-concurrent-x.html

  * igt@gem_mmap_offset@clear@smem0:
    - shard-mtlp:         [PASS][57] -> [ABORT][58] ([i915#10029] / [i915#10729])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-mtlp-4/igt@gem_mmap_offset@clear@smem0.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-8/igt@gem_mmap_offset@clear@smem0.html

  * igt@gem_mmap_wc@read-write:
    - shard-dg1:          NOTRUN -> [SKIP][59] ([i915#4083]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@gem_mmap_wc@read-write.html

  * igt@gem_mmap_wc@write-cpu-read-wc:
    - shard-dg2:          NOTRUN -> [SKIP][60] ([i915#4083]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@gem_mmap_wc@write-cpu-read-wc.html

  * igt@gem_partial_pwrite_pread@write:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#3282]) +3 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@gem_partial_pwrite_pread@write.html

  * igt@gem_partial_pwrite_pread@writes-after-reads:
    - shard-mtlp:         NOTRUN -> [SKIP][62] ([i915#3282])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@gem_partial_pwrite_pread@writes-after-reads.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-snb:          NOTRUN -> [WARN][63] ([i915#2658])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-snb5/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@create-regular-context-1:
    - shard-mtlp:         NOTRUN -> [SKIP][64] ([i915#4270]) +2 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@gem_pxp@create-regular-context-1.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-tglu:         NOTRUN -> [SKIP][65] ([i915#4270]) +1 other test skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-dg2:          NOTRUN -> [SKIP][66] ([i915#4270]) +3 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-stale-ctx-execution:
    - shard-dg1:          NOTRUN -> [SKIP][67] ([i915#4270]) +3 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@gem_pxp@verify-pxp-stale-ctx-execution.html
    - shard-rkl:          NOTRUN -> [SKIP][68] ([i915#4270])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@gem_pxp@verify-pxp-stale-ctx-execution.html

  * igt@gem_render_copy@y-tiled-ccs-to-linear:
    - shard-dg2:          NOTRUN -> [SKIP][69] ([i915#5190] / [i915#8428]) +5 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@gem_render_copy@y-tiled-ccs-to-linear.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][70] ([i915#8428]) +6 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-dg1:          NOTRUN -> [SKIP][71] ([i915#4079]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gem_softpin@evict-snoop-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][72] ([i915#4885])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@gem_softpin@evict-snoop-interruptible.html

  * igt@gem_tiled_pread_basic:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#4079])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@gem_tiled_pread_basic.html

  * igt@gem_userptr_blits@access-control:
    - shard-mtlp:         NOTRUN -> [SKIP][74] ([i915#3297]) +4 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@gem_userptr_blits@access-control.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][75] ([i915#3297]) +4 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@gem_userptr_blits@create-destroy-unsync.html
    - shard-dg1:          NOTRUN -> [SKIP][76] ([i915#3297]) +4 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@gem_userptr_blits@create-destroy-unsync.html
    - shard-tglu:         NOTRUN -> [SKIP][77] ([i915#3297]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@forbidden-operations:
    - shard-dg1:          NOTRUN -> [SKIP][78] ([i915#3282] / [i915#3297])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@gem_userptr_blits@forbidden-operations.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap:
    - shard-dg2:          NOTRUN -> [SKIP][79] ([i915#3297] / [i915#4880])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html

  * igt@gem_userptr_blits@relocations:
    - shard-mtlp:         NOTRUN -> [SKIP][80] ([i915#3281]) +6 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@gem_userptr_blits@relocations.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-mtlp:         NOTRUN -> [SKIP][81] ([i915#2856]) +3 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@gen9_exec_parse@allowed-all.html
    - shard-dg2:          NOTRUN -> [SKIP][82] ([i915#2856]) +1 other test skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@bb-large:
    - shard-dg1:          NOTRUN -> [SKIP][83] ([i915#2527]) +3 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@gen9_exec_parse@bb-large.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-tglu:         NOTRUN -> [SKIP][84] ([i915#2527] / [i915#2856]) +1 other test skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@gen9_exec_parse@bb-oversize.html

  * igt@gen9_exec_parse@unaligned-access:
    - shard-rkl:          NOTRUN -> [SKIP][85] ([i915#2527]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@gen9_exec_parse@unaligned-access.html

  * igt@i915_module_load@load:
    - shard-glk:          NOTRUN -> [SKIP][86] ([i915#6227])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk5/igt@i915_module_load@load.html

  * igt@i915_pm_freq_mult@media-freq@gt1:
    - shard-mtlp:         NOTRUN -> [SKIP][87] ([i915#6590]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@i915_pm_freq_mult@media-freq@gt1.html

  * igt@i915_pm_rps@thresholds-park@gt0:
    - shard-mtlp:         NOTRUN -> [SKIP][88] ([i915#8925])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@i915_pm_rps@thresholds-park@gt0.html

  * igt@i915_pm_rps@thresholds-park@gt1:
    - shard-mtlp:         NOTRUN -> [SKIP][89] ([i915#3555] / [i915#8925])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@i915_pm_rps@thresholds-park@gt1.html

  * igt@intel_hwmon@hwmon-write:
    - shard-rkl:          NOTRUN -> [SKIP][90] ([i915#7707])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][91] ([i915#4212])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_addfb_basic@clobberred-modifier:
    - shard-dg2:          NOTRUN -> [SKIP][92] ([i915#4212]) +1 other test skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_addfb_basic@clobberred-modifier.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-4-y-rc-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][93] ([i915#8709]) +7 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-4-y-rc-ccs.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-mtlp:         NOTRUN -> [SKIP][94] ([i915#1769] / [i915#3555])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][95] ([i915#5286]) +2 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-dg1:          NOTRUN -> [SKIP][96] ([i915#5286])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-dg1:          NOTRUN -> [SKIP][97] ([i915#4538] / [i915#5286]) +6 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-tglu:         NOTRUN -> [SKIP][98] ([i915#5286]) +1 other test skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][99] +14 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][100] ([i915#3638])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-mtlp:         NOTRUN -> [SKIP][101] ([i915#6187])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][102] ([i915#4538] / [i915#5190]) +5 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][103] ([i915#4538]) +3 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#5190]) +2 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_joiner@invalid-modeset-force-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][105] ([i915#10656])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_big_joiner@invalid-modeset-force-joiner.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][106] ([i915#6095]) +19 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc@pipe-c-edp-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][107] ([i915#10307] / [i915#6095]) +184 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-4/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-xe2-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#10278])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_ccs@bad-rotation-90-4-tiled-xe2-ccs.html
    - shard-dg1:          NOTRUN -> [SKIP][109] ([i915#10278]) +3 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@kms_ccs@bad-rotation-90-4-tiled-xe2-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][110] ([i915#6095]) +15 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-c-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][111] ([i915#6095]) +63 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-c-hdmi-a-4.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][112] ([i915#6095]) +37 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][113] ([i915#10307] / [i915#10434] / [i915#6095]) +6 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#10278]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][115] ([i915#10278]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-xe2-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][116] ([i915#10278]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-xe2-ccs.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-dg1:          NOTRUN -> [SKIP][117] ([i915#3742]) +1 other test skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][118] ([i915#4087]) +3 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html

  * igt@kms_chamelium_edid@dp-mode-timings:
    - shard-mtlp:         NOTRUN -> [SKIP][119] ([i915#7828]) +6 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_chamelium_edid@dp-mode-timings.html

  * igt@kms_chamelium_frames@dp-crc-fast:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#7828]) +7 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_chamelium_frames@dp-crc-fast.html

  * igt@kms_chamelium_frames@dp-crc-multiple:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#7828]) +2 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_chamelium_frames@dp-crc-multiple.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-dg1:          NOTRUN -> [SKIP][122] ([i915#7828]) +7 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
    - shard-tglu:         NOTRUN -> [SKIP][123] ([i915#7828]) +3 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-mtlp:         NOTRUN -> [SKIP][124] ([i915#6944] / [i915#9424])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][125] ([i915#3116])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_content_protection@dp-mst-lic-type-0.html
    - shard-dg1:          NOTRUN -> [SKIP][126] ([i915#3299])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@lic-type-0:
    - shard-dg2:          NOTRUN -> [SKIP][127] ([i915#9424])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@mei-interface:
    - shard-mtlp:         NOTRUN -> [SKIP][128] ([i915#8063] / [i915#9433])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@uevent:
    - shard-tglu:         NOTRUN -> [SKIP][129] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][130] ([i915#3359])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-offscreen-max-size:
    - shard-dg1:          NOTRUN -> [SKIP][131] ([i915#3555]) +3 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@kms_cursor_crc@cursor-offscreen-max-size.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-dg1:          NOTRUN -> [SKIP][132] ([i915#3359]) +1 other test skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-tglu:         NOTRUN -> [SKIP][133] ([i915#3555])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][134] ([i915#3359]) +1 other test skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][135] ([i915#3359]) +1 other test skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#3359])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-rkl:          NOTRUN -> [SKIP][137] ([i915#3555]) +2 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_cursor_crc@cursor-sliding-128x42:
    - shard-mtlp:         NOTRUN -> [SKIP][138] ([i915#8814]) +3 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_cursor_crc@cursor-sliding-128x42.html

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-mtlp:         NOTRUN -> [SKIP][139] ([i915#9809]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-dg1:          NOTRUN -> [SKIP][140] ([i915#4103] / [i915#4213]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [PASS][141] -> [FAIL][142] ([i915#2346])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-tglu:         NOTRUN -> [SKIP][143] ([i915#4103]) +2 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
    - shard-mtlp:         NOTRUN -> [SKIP][144] ([i915#4213])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
    - shard-dg2:          NOTRUN -> [SKIP][145] ([i915#4103] / [i915#4213])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][146] ([i915#9723])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-mtlp:         NOTRUN -> [SKIP][147] ([i915#3555] / [i915#8827])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-8bpc:
    - shard-dg2:          NOTRUN -> [SKIP][148] ([i915#3555]) +1 other test skip
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html

  * igt@kms_dp_aux_dev:
    - shard-dg1:          NOTRUN -> [SKIP][149] ([i915#1257])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_dp_aux_dev.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-mtlp:         NOTRUN -> [SKIP][150] ([i915#3555] / [i915#3840])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_feature_discovery@display-4x:
    - shard-dg2:          NOTRUN -> [SKIP][151] ([i915#1839])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg1:          NOTRUN -> [SKIP][152] ([i915#9337])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr2:
    - shard-dg1:          NOTRUN -> [SKIP][153] ([i915#658])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_feature_discovery@psr2.html

  * igt@kms_fence_pin_leak:
    - shard-dg2:          NOTRUN -> [SKIP][154] ([i915#4881])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_fence_pin_leak.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
    - shard-dg2:          NOTRUN -> [SKIP][155] +20 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-tglu:         NOTRUN -> [SKIP][156] ([i915#3637]) +3 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@kms_flip@2x-nonexisting-fb.html
    - shard-mtlp:         NOTRUN -> [SKIP][157] ([i915#3637]) +5 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@2x-plain-flip:
    - shard-dg1:          NOTRUN -> [SKIP][158] ([i915#9934]) +4 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][159] ([i915#2672]) +2 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-dg1:          NOTRUN -> [SKIP][160] ([i915#2587] / [i915#2672]) +3 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#2672])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][162] ([i915#2587] / [i915#2672])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][163] ([i915#2672]) +2 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][164] ([i915#8708]) +4 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([i915#3458]) +12 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-snb:          NOTRUN -> [SKIP][166] +172 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-snb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][167] ([i915#1825]) +9 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][168] ([i915#3023]) +11 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt:
    - shard-mtlp:         NOTRUN -> [SKIP][169] ([i915#1825]) +20 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][170] ([i915#8708]) +8 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][171] ([i915#5354]) +26 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt:
    - shard-tglu:         NOTRUN -> [SKIP][172] +39 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][173] ([i915#8708]) +15 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][174] ([i915#3458]) +16 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite.html

  * igt@kms_hdr@static-toggle:
    - shard-tglu:         NOTRUN -> [SKIP][175] ([i915#3555] / [i915#8228]) +1 other test skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_hdr@static-toggle.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][176] ([i915#3555] / [i915#8228]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_hdr@static-toggle-suspend.html
    - shard-dg1:          NOTRUN -> [SKIP][177] ([i915#3555] / [i915#8228])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@kms_hdr@static-toggle-suspend.html
    - shard-mtlp:         NOTRUN -> [SKIP][178] ([i915#3555] / [i915#8228])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-dg1:          NOTRUN -> [SKIP][179] ([i915#1839])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@pixel-format@pipe-a:
    - shard-mtlp:         [PASS][180] -> [INCOMPLETE][181] ([i915#10698] / [i915#10892])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-mtlp-6/igt@kms_plane@pixel-format@pipe-a.html
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_plane@pixel-format@pipe-a.html

  * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][182] ([i915#7862]) +1 other test fail
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk7/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][183] ([i915#10647]) +1 other test fail
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk8/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_lowres@tiling-none@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][184] ([i915#3582]) +3 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-mtlp:         NOTRUN -> [SKIP][185] ([i915#3555] / [i915#8806])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][186] ([i915#9423]) +3 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-d-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][187] ([i915#9423]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][188] ([i915#5176] / [i915#9423]) +1 other test skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][189] ([i915#9423]) +7 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d-hdmi-a-4.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][190] ([i915#5235]) +1 other test skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][191] ([i915#5235] / [i915#9423]) +11 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][192] ([i915#5235]) +2 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-c-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][193] ([i915#3555] / [i915#5235])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([i915#5235]) +3 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][195] ([i915#5235]) +15 other tests skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][196] ([i915#9812])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][197] ([i915#3361])
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-dg1:          NOTRUN -> [SKIP][198] ([i915#9685])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         NOTRUN -> [SKIP][199] ([i915#4281])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-rkl:          NOTRUN -> [SKIP][200] ([i915#8430])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_pm_lpsp@screens-disabled.html
    - shard-dg1:          NOTRUN -> [SKIP][201] ([i915#8430])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-dg2:          [PASS][202] -> [SKIP][203] ([i915#9519]) +1 other test skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-4/igt@kms_pm_rpm@dpms-lpsp.html
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-11/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@fences:
    - shard-dg1:          NOTRUN -> [SKIP][204] ([i915#4077]) +8 other tests skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_pm_rpm@fences.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-mtlp:         NOTRUN -> [SKIP][205] ([i915#9519])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-rkl:          [PASS][206] -> [SKIP][207] ([i915#9519])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][208] ([i915#6524])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-dg1:          NOTRUN -> [SKIP][209] ([i915#6524]) +1 other test skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-sf:
    - shard-dg1:          NOTRUN -> [SKIP][210] +38 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][211] ([i915#9808]) +3 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-a-edp-1.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg1:          NOTRUN -> [SKIP][212] ([i915#9683]) +1 other test skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-mtlp:         NOTRUN -> [SKIP][213] ([i915#4348])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-pr-sprite-plane-move:
    - shard-tglu:         NOTRUN -> [SKIP][214] ([i915#9732]) +7 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@kms_psr@fbc-pr-sprite-plane-move.html

  * igt@kms_psr@fbc-psr-primary-render:
    - shard-dg1:          NOTRUN -> [SKIP][215] ([i915#1072] / [i915#9732]) +16 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_psr@fbc-psr-primary-render.html

  * igt@kms_psr@fbc-psr-sprite-blt:
    - shard-rkl:          NOTRUN -> [SKIP][216] ([i915#1072] / [i915#9732]) +9 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_psr@fbc-psr-sprite-blt.html

  * igt@kms_psr@pr-primary-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][217] ([i915#9688]) +6 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_psr@pr-primary-mmap-cpu.html

  * igt@kms_psr@psr-sprite-mmap-gtt@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][218] ([i915#4077] / [i915#9688])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@kms_psr@psr-sprite-mmap-gtt@edp-1.html

  * igt@kms_psr@psr2-cursor-blt:
    - shard-dg2:          NOTRUN -> [SKIP][219] ([i915#1072] / [i915#9732]) +12 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@kms_psr@psr2-cursor-blt.html

  * igt@kms_psr@psr2-sprite-plane-onoff:
    - shard-glk:          NOTRUN -> [SKIP][220] +555 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk2/igt@kms_psr@psr2-sprite-plane-onoff.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-dg1:          NOTRUN -> [SKIP][221] ([i915#5289])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-mtlp:         NOTRUN -> [SKIP][222] ([i915#3555] / [i915#8809]) +1 other test skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-glk:          NOTRUN -> [FAIL][223] ([i915#10959])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk7/igt@kms_tiled_display@basic-test-pattern.html
    - shard-mtlp:         NOTRUN -> [SKIP][224] ([i915#8623]) +1 other test skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-4:
    - shard-dg1:          [PASS][225] -> [FAIL][226] ([i915#9196])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg1-14/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-4.html
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-17/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-4.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-dg1:          NOTRUN -> [SKIP][227] ([i915#9906])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@max-min:
    - shard-mtlp:         NOTRUN -> [SKIP][228] ([i915#8808] / [i915#9906])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@kms_vrr@max-min.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-dg1:          NOTRUN -> [SKIP][229] ([i915#2437] / [i915#9412])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-glk:          NOTRUN -> [SKIP][230] ([i915#2437]) +1 other test skip
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk3/igt@kms_writeback@writeback-fb-id.html
    - shard-mtlp:         NOTRUN -> [SKIP][231] ([i915#2437])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-dg2:          NOTRUN -> [SKIP][232] ([i915#2437] / [i915#9412])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@perf@global-sseu-config:
    - shard-mtlp:         NOTRUN -> [SKIP][233] ([i915#7387])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@perf@global-sseu-config.html
    - shard-dg2:          NOTRUN -> [SKIP][234] ([i915#7387])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@perf@global-sseu-config.html

  * igt@perf@per-context-mode-unprivileged:
    - shard-dg1:          NOTRUN -> [SKIP][235] ([i915#2433])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@perf@per-context-mode-unprivileged.html

  * igt@perf_pmu@busy-double-start@ccs0:
    - shard-mtlp:         NOTRUN -> [FAIL][236] ([i915#4349]) +1 other test fail
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@perf_pmu@busy-double-start@ccs0.html

  * igt@perf_pmu@event-wait@rcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][237] ([i915#3555] / [i915#8807])
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@perf_pmu@event-wait@rcs0.html

  * igt@perf_pmu@frequency@gt0:
    - shard-dg2:          NOTRUN -> [FAIL][238] ([i915#6806])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@perf_pmu@frequency@gt0.html
    - shard-dg1:          NOTRUN -> [FAIL][239] ([i915#6806])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@perf_pmu@frequency@gt0.html

  * igt@prime_vgem@basic-read:
    - shard-dg2:          NOTRUN -> [SKIP][240] ([i915#3291] / [i915#3708])
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-dg2:          NOTRUN -> [SKIP][241] ([i915#3708])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@prime_vgem@fence-flip-hang.html

  * igt@prime_vgem@fence-write-hang:
    - shard-dg1:          NOTRUN -> [SKIP][242] ([i915#3708])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@prime_vgem@fence-write-hang.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-rkl:          NOTRUN -> [SKIP][243] ([i915#9917])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@sriov_basic@bind-unbind-vf.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - shard-dg2:          NOTRUN -> [SKIP][244] ([i915#9917])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@syncobj_timeline@invalid-wait-zero-handles:
    - shard-glk:          NOTRUN -> [FAIL][245] ([i915#9781])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk7/igt@syncobj_timeline@invalid-wait-zero-handles.html
    - shard-mtlp:         NOTRUN -> [FAIL][246] ([i915#9781])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-7/igt@syncobj_timeline@invalid-wait-zero-handles.html

  * igt@syncobj_wait@invalid-wait-zero-handles:
    - shard-glk:          NOTRUN -> [FAIL][247] ([i915#9779])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-glk8/igt@syncobj_wait@invalid-wait-zero-handles.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-rkl:          NOTRUN -> [SKIP][248] +14 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@tools_test@sysfs_l3_parity.html
    - shard-dg1:          NOTRUN -> [SKIP][249] ([i915#4818])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-18/igt@tools_test@sysfs_l3_parity.html

  * igt@v3d/v3d_submit_cl@bad-bo:
    - shard-dg2:          NOTRUN -> [SKIP][250] ([i915#2575]) +6 other tests skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@v3d/v3d_submit_cl@bad-bo.html

  * igt@v3d/v3d_submit_cl@single-in-sync:
    - shard-dg1:          NOTRUN -> [SKIP][251] ([i915#2575]) +10 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-16/igt@v3d/v3d_submit_cl@single-in-sync.html

  * igt@v3d/v3d_submit_cl@valid-submission:
    - shard-mtlp:         NOTRUN -> [SKIP][252] ([i915#2575]) +6 other tests skip
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-5/igt@v3d/v3d_submit_cl@valid-submission.html

  * igt@vc4/vc4_perfmon@create-two-perfmon:
    - shard-rkl:          NOTRUN -> [SKIP][253] ([i915#7711]) +1 other test skip
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@vc4/vc4_perfmon@create-two-perfmon.html

  * igt@vc4/vc4_purgeable_bo@free-purged-bo:
    - shard-tglu:         NOTRUN -> [SKIP][254] ([i915#2575]) +8 other tests skip
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@vc4/vc4_purgeable_bo@free-purged-bo.html

  * igt@vc4/vc4_purgeable_bo@mark-purgeable-twice:
    - shard-mtlp:         NOTRUN -> [SKIP][255] ([i915#7711]) +6 other tests skip
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@vc4/vc4_purgeable_bo@mark-purgeable-twice.html

  * igt@vc4/vc4_wait_bo@bad-bo:
    - shard-dg2:          NOTRUN -> [SKIP][256] ([i915#7711]) +6 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@vc4/vc4_wait_bo@bad-bo.html
    - shard-dg1:          NOTRUN -> [SKIP][257] ([i915#7711]) +5 other tests skip
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@vc4/vc4_wait_bo@bad-bo.html

  
#### Possible fixes ####

  * igt@gem_eio@kms:
    - shard-tglu:         [INCOMPLETE][258] ([i915#10513]) -> [PASS][259]
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-tglu-2/igt@gem_eio@kms.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-3/igt@gem_eio@kms.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-rkl:          [FAIL][260] ([i915#2842]) -> [PASS][261]
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-rkl-3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0:
    - shard-dg2:          [FAIL][262] ([i915#10378]) -> [PASS][263]
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-8/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-10/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg1:          [INCOMPLETE][264] ([i915#1982] / [i915#9820] / [i915#9849]) -> [PASS][265]
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg1-17/igt@i915_module_load@reload-with-fault-injection.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-14/igt@i915_module_load@reload-with-fault-injection.html
    - shard-tglu:         [INCOMPLETE][266] ([i915#10047] / [i915#10887] / [i915#9820]) -> [PASS][267]
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-tglu-7/igt@i915_module_load@reload-with-fault-injection.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-7/igt@i915_module_load@reload-with-fault-injection.html
    - shard-mtlp:         [ABORT][268] ([i915#10887] / [i915#10976]) -> [PASS][269]
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-mtlp-2/igt@i915_module_load@reload-with-fault-injection.html
    - shard-dg2:          [INCOMPLETE][270] ([i915#9820] / [i915#9849]) -> [PASS][271]
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-11/igt@i915_module_load@reload-with-fault-injection.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rps@reset:
    - shard-snb:          [INCOMPLETE][272] ([i915#7790]) -> [PASS][273]
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-snb5/igt@i915_pm_rps@reset.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-snb5/igt@i915_pm_rps@reset.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-180:
    - shard-rkl:          [ABORT][274] -> [PASS][275]
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-rkl-6/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-4/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html

  * igt@kms_plane_cursor@viewport@pipe-b-hdmi-a-1-size-64:
    - shard-snb:          [ABORT][276] -> [PASS][277]
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-snb7/igt@kms_plane_cursor@viewport@pipe-b-hdmi-a-1-size-64.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-snb4/igt@kms_plane_cursor@viewport@pipe-b-hdmi-a-1-size-64.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [SKIP][278] ([i915#9519]) -> [PASS][279] +1 other test pass
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-rkl-3/igt@kms_pm_rpm@dpms-lpsp.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg2:          [SKIP][280] ([i915#9519]) -> [PASS][281] +2 other tests pass
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-1/igt@kms_pm_rpm@modeset-lpsp.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
    - shard-snb:          [FAIL][282] ([i915#9196]) -> [PASS][283]
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-snb6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-snb7/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-4:
    - shard-dg1:          [FAIL][284] ([i915#9196]) -> [PASS][285]
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg1-14/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-4.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-17/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-4.html

  * igt@perf@blocking-parameterized:
    - shard-dg1:          [INCOMPLETE][286] -> [PASS][287]
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg1-15/igt@perf@blocking-parameterized.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg1-15/igt@perf@blocking-parameterized.html

  
#### Warnings ####

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-dg2:          [INCOMPLETE][288] ([i915#9364]) -> [ABORT][289] ([i915#9846])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-5/igt@gem_create@create-ext-cpu-access-big.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-8/igt@gem_create@create-ext-cpu-access-big.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
    - shard-tglu:         [FAIL][290] ([i915#3591]) -> [WARN][291] ([i915#2681])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-tglu-7/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-tglu-9/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
    - shard-dg2:          [SKIP][292] ([i915#3458]) -> [SKIP][293] ([i915#10433] / [i915#3458]) +2 other tests skip
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-dg2:          [SKIP][294] ([i915#10433] / [i915#3458]) -> [SKIP][295] ([i915#3458]) +1 other test skip
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-rkl:          [SKIP][296] ([i915#4816]) -> [SKIP][297] ([i915#4070] / [i915#4816])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-rkl-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_psr@fbc-pr-suspend:
    - shard-dg2:          [SKIP][298] ([i915#1072] / [i915#9732]) -> [SKIP][299] ([i915#1072] / [i915#9673] / [i915#9732]) +4 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-4/igt@kms_psr@fbc-pr-suspend.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-11/igt@kms_psr@fbc-pr-suspend.html

  * igt@kms_psr@pr-cursor-mmap-cpu:
    - shard-dg2:          [SKIP][300] ([i915#1072] / [i915#9673] / [i915#9732]) -> [SKIP][301] ([i915#1072] / [i915#9732]) +1 other test skip
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-11/igt@kms_psr@pr-cursor-mmap-cpu.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-1/igt@kms_psr@pr-cursor-mmap-cpu.html

  * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
    - shard-dg2:          [INCOMPLETE][302] ([i915#5493]) -> [CRASH][303] ([i915#9351])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14715/shard-dg2-3/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/shard-dg2-2/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html

  
  [i915#10029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10029
  [i915#10047]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10047
  [i915#10278]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10278
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
  [i915#10386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10386
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10513]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10513
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#10698]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10698
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10729]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10729
  [i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
  [i915#10892]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10892
  [i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
  [i915#10976]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10976
  [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3582
  [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4036]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4036
  [i915#4070]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4348
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4473]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4473
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
  [i915#4818]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4818
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#4881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4881
  [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
  [i915#5176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
  [i915#6227]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6227
  [i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
  [i915#6268]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6268
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
  [i915#6806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6806
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7701
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7742
  [i915#7790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7790
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862
  [i915#8063]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8063
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
  [i915#8807]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8807
  [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
  [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8827]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8827
  [i915#8925]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8925
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
  [i915#9351]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9351
  [i915#9364]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9364
  [i915#9408]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9408
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9606]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9606
  [i915#9618]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9618
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9779]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9779
  [i915#9781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9781
  [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9846]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9846
  [i915#9849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9849
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_14715 -> Patchwork_133253v1

  CI-20190529: 20190529
  CI_DRM_14715: 83e0d2a2621c7550c198b8936f4680b24f24a698 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7834: 008178acd533c33910d41fefc80462b3915c89fc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_133253v1: 83e0d2a2621c7550c198b8936f4680b24f24a698 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133253v1/index.html

[-- Attachment #2: Type: text/html, Size: 105163 bytes --]

Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Matt Roper]

On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila wrote:
> These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS modifier, which,
> from the kernel's perspective, behaves similarly to `I915_FORMAT_MOD_4_TILED`.
> This new modifier is primarily intended for user space to effectively monitor
> compression status, especially when dealing with a mix of compressed and
> uncompressed buffers.
> 
> The addition of this modifier facilitates user space in managing compression
> status, particularly when utilizing both compressed and uncompressed buffers
> concurrently. To leverage compression for these buffers, user space
> applications must configure the appropriate Page Attribute Table (PAT) index.
> Display engine will treat all Tile4 as if it were compressed under all
> circumstances on Xe2 architecture.

I may have missed some discussion about this, but I thought the previous
consensus was that we didn't want/need new modifiers for compression on
Xe2?  If a userspace client (or the display hardware) receives a buffer
of unknown origin and unknown compression status, it's always fine to
select a compressed PAT when binding the buffer to read since even for
uncompressed buffers the CCS metadata will accurately reflect the
compression status.  Unlike Xe1, where generating content without
compression enabled would leave random garbage in the FlatCCS area, Xe2
will set the corresponding FlatCCS to '0x0' for each block, indicating
uncompressed data.

Can you explain more what the benefit of handling these modifiers
explicitly is?


Matt

> 
> Notably, this patch series omits support for X-tiled CCS and linear CCS
> for Xe2, neither of which is supported by display engine. X-tiled CCS
> offers stateless compression making it less likely to be extensively
> utilized. Linear CCS does possess state, but currently lacks expected users.
> 
> These patches aim to enhance the flexibility and efficiency of handling
> compressed and uncompressed buffers in Xe driver, particularly
> catering to the specific requirements of the Xe2 architecture.
> 
> Juha-Pekka Heikkila (3):
>   drm/fourcc: define Intel Xe2 related tile4 ccs modifier
>   drm/xe/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS
>     type framebuffer
>   drm/i915/display: allow creation of case
>     I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer
> 
>  drivers/gpu/drm/i915/display/intel_display.c       |  1 +
>  drivers/gpu/drm/i915/display/intel_fb.c            | 10 ++++++++++
>  drivers/gpu/drm/i915/display/skl_universal_plane.c |  4 +++-
>  drivers/gpu/drm/xe/display/xe_plane_initial.c      |  1 +
>  include/uapi/drm/drm_fourcc.h                      | 12 ++++++++++++
>  5 files changed, 27 insertions(+), 1 deletion(-)
> 
> -- 
> 2.43.2
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Juha-Pekka Heikkila]

On 8.5.2024 1.56, Matt Roper wrote:
> On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila wrote:
>> These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS modifier, which,
>> from the kernel's perspective, behaves similarly to `I915_FORMAT_MOD_4_TILED`.
>> This new modifier is primarily intended for user space to effectively monitor
>> compression status, especially when dealing with a mix of compressed and
>> uncompressed buffers.
>>
>> The addition of this modifier facilitates user space in managing compression
>> status, particularly when utilizing both compressed and uncompressed buffers
>> concurrently. To leverage compression for these buffers, user space
>> applications must configure the appropriate Page Attribute Table (PAT) index.
>> Display engine will treat all Tile4 as if it were compressed under all
>> circumstances on Xe2 architecture.
> 
> I may have missed some discussion about this, but I thought the previous
> consensus was that we didn't want/need new modifiers for compression on
> Xe2?  If a userspace client (or the display hardware) receives a buffer
> of unknown origin and unknown compression status, it's always fine to
> select a compressed PAT when binding the buffer to read since even for
> uncompressed buffers the CCS metadata will accurately reflect the
> compression status.  Unlike Xe1, where generating content without
> compression enabled would leave random garbage in the FlatCCS area, Xe2
> will set the corresponding FlatCCS to '0x0' for each block, indicating
> uncompressed data.

UMDs have been wishing solution for situation where they receive shared 
bo with unknown compressions status. Problem would arise when 
uncompressed buffer is shared and it's mapped as compressed while 
process which shared bo still would use it as uncompressed. One who 
mapped it last will have correct content on surface while other will 
have have semi-random garbage.

 From what I understand of the compression specifications, all buffers 
should indeed be treated as compressed unless they fall into one of the 
specially listed categories, which are primarily display-related. I 
can't say if this patch set is what is needed to solve UMD issues, I 
don't know why wouldn't user space treat buffers as compressed by default.

> 
> Can you explain more what the benefit of handling these modifiers
> explicitly is?
> 
> 
> Matt
> 
>>
>> Notably, this patch series omits support for X-tiled CCS and linear CCS
>> for Xe2, neither of which is supported by display engine. X-tiled CCS
>> offers stateless compression making it less likely to be extensively
>> utilized. Linear CCS does possess state, but currently lacks expected users.
>>
>> These patches aim to enhance the flexibility and efficiency of handling
>> compressed and uncompressed buffers in Xe driver, particularly
>> catering to the specific requirements of the Xe2 architecture.
>>
>> Juha-Pekka Heikkila (3):
>>    drm/fourcc: define Intel Xe2 related tile4 ccs modifier
>>    drm/xe/display: allow creation of case I915_FORMAT_MOD_4_TILED_XE2_CCS
>>      type framebuffer
>>    drm/i915/display: allow creation of case
>>      I915_FORMAT_MOD_4_TILED_XE2_CCS type framebuffer
>>
>>   drivers/gpu/drm/i915/display/intel_display.c       |  1 +
>>   drivers/gpu/drm/i915/display/intel_fb.c            | 10 ++++++++++
>>   drivers/gpu/drm/i915/display/skl_universal_plane.c |  4 +++-
>>   drivers/gpu/drm/xe/display/xe_plane_initial.c      |  1 +
>>   include/uapi/drm/drm_fourcc.h                      | 12 ++++++++++++
>>   5 files changed, 27 insertions(+), 1 deletion(-)
>>
>> -- 
>> 2.43.2
>>
> 

Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Kenneth Graunke]

[-- Attachment #1: Type: text/plain, Size: 3403 bytes --]

On Tuesday, May 7, 2024 3:56:57 PM PDT Matt Roper wrote:
> On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila wrote:
> > These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS modifier, which,
> > from the kernel's perspective, behaves similarly to 
`I915_FORMAT_MOD_4_TILED`.
> > This new modifier is primarily intended for user space to effectively 
monitor
> > compression status, especially when dealing with a mix of compressed and
> > uncompressed buffers.
> > 
> > The addition of this modifier facilitates user space in managing 
compression
> > status, particularly when utilizing both compressed and uncompressed 
buffers
> > concurrently. To leverage compression for these buffers, user space
> > applications must configure the appropriate Page Attribute Table (PAT) 
index.
> > Display engine will treat all Tile4 as if it were compressed under all
> > circumstances on Xe2 architecture.
> 
> I may have missed some discussion about this, but I thought the previous
> consensus was that we didn't want/need new modifiers for compression on
> Xe2?  If a userspace client (or the display hardware) receives a buffer
> of unknown origin and unknown compression status, it's always fine to
> select a compressed PAT when binding the buffer to read since even for
> uncompressed buffers the CCS metadata will accurately reflect the
> compression status.  Unlike Xe1, where generating content without
> compression enabled would leave random garbage in the FlatCCS area, Xe2
> will set the corresponding FlatCCS to '0x0' for each block, indicating
> uncompressed data.
> 
> Can you explain more what the benefit of handling these modifiers
> explicitly is?
> 
> 
> Matt

Thanks, Matt!  I'm a bit late in getting up to speed with the Xe2 compression 
changes; this is really good information.

As I understand it...all blocks on the GPU behave in the way you mentioned, 
where generating uncompressed data via the GPU will set FlatCCS = 0, so you 
can assume a compressed PAT entry and everything works.

One snag is...I've heard that CPU access doesn't work that way.  So, if you 
mmap a buffer on the CPU, and write data with the CPU, then I think we're back 
to the "FlatCCS contains uninitialized garbage" case, where it's unsafe to 
assume a compressed PAT.  And... we don't really know when sharing buffers 
whether the other side is going to want to do CPU access.

It would be really nice to assume compression by default, though, which got me 
thinking: if we mmap a buffer via DRM_XE_GEM_MMAP_OFFSET, could xe.ko disable 
compression for us?  So, resolve any outstanding CCS data, and then switch any 
PAT entries to uncompressed.  Mapping would block until that resolve is done.  
It could leave compression off forever (once you CPU map a buffer, it's never 
compressed again).  Or it could turn CCS back on when map count reaches 0 (but 
frankly I'm not sure that's terribly important, and sounds more complex).

As I understand it, at least on discrete GPUs, the kernel already has to do 
something similar for eviction, when migrating BOs to system memory (which 
doesn't support compression).  So this would be doing basically the same 
"resolve and disable CCS" step the kernel can presumably already do, but now 
on mmap as well.

What do you think?  Viable?  Crazy?  Have I missed something?

--Ken

[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Joonas Lahtinen]

Quoting Kenneth Graunke (2024-05-11 03:58:34)
> On Tuesday, May 7, 2024 3:56:57 PM PDT Matt Roper wrote:
> > On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila wrote:
> > > These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS modifier, which,
> > > from the kernel's perspective, behaves similarly to 
> `I915_FORMAT_MOD_4_TILED`.
> > > This new modifier is primarily intended for user space to effectively 
> monitor
> > > compression status, especially when dealing with a mix of compressed and
> > > uncompressed buffers.
> > > 
> > > The addition of this modifier facilitates user space in managing 
> compression
> > > status, particularly when utilizing both compressed and uncompressed 
> buffers
> > > concurrently. To leverage compression for these buffers, user space
> > > applications must configure the appropriate Page Attribute Table (PAT) 
> index.
> > > Display engine will treat all Tile4 as if it were compressed under all
> > > circumstances on Xe2 architecture.
> > 
> > I may have missed some discussion about this, but I thought the previous
> > consensus was that we didn't want/need new modifiers for compression on
> > Xe2?  If a userspace client (or the display hardware) receives a buffer
> > of unknown origin and unknown compression status, it's always fine to
> > select a compressed PAT when binding the buffer to read since even for
> > uncompressed buffers the CCS metadata will accurately reflect the
> > compression status.  Unlike Xe1, where generating content without
> > compression enabled would leave random garbage in the FlatCCS area, Xe2
> > will set the corresponding FlatCCS to '0x0' for each block, indicating
> > uncompressed data.
> > 
> > Can you explain more what the benefit of handling these modifiers
> > explicitly is?
> > 
> > 
> > Matt
> 
> Thanks, Matt!  I'm a bit late in getting up to speed with the Xe2 compression 
> changes; this is really good information.
> 
> As I understand it...all blocks on the GPU behave in the way you mentioned, 
> where generating uncompressed data via the GPU will set FlatCCS = 0, so you 
> can assume a compressed PAT entry and everything works.
> 
> One snag is...I've heard that CPU access doesn't work that way.  So, if you 
> mmap a buffer on the CPU, and write data with the CPU, then I think we're back 
> to the "FlatCCS contains uninitialized garbage" case, where it's unsafe to 
> assume a compressed PAT.  And... we don't really know when sharing buffers 
> whether the other side is going to want to do CPU access.

I think the previous discussion has specifically happened in the context of
dma-buf, so not only CPU but other GPUs/accelerators/decoders/devices in the
system are also relevant.

It boils down to the fact that when exporting a dma-buf, one can't know it will
be consumed only by the same GPU (or other device for that matter) unless there
is an explicit negotiation between exporter and importers.

> It would be really nice to assume compression by default, though, which got me 
> thinking: if we mmap a buffer via DRM_XE_GEM_MMAP_OFFSET, could xe.ko disable 
> compression for us?  So, resolve any outstanding CCS data, and then switch any 
> PAT entries to uncompressed.  Mapping would block until that resolve is done.  
> It could leave compression off forever (once you CPU map a buffer, it's never 
> compressed again).  Or it could turn CCS back on when map count reaches 0 (but 
> frankly I'm not sure that's terribly important, and sounds more complex).

This would only really work for a single device but the dma-buf is
specifically targeting more generic sharing. There's no built-in mechanism
to limit the sharing to subset of devices without explicit negotiation
between the exporter and importers.

So I think the "by default" mode needs to be interoperable, and the
explicit negotiation can then use less compatible formats given those FD
are never passed to importers that were not part of the negotiation.

> As I understand it, at least on discrete GPUs, the kernel already has to do 
> something similar for eviction, when migrating BOs to system memory (which 
> doesn't support compression).  So this would be doing basically the same 
> "resolve and disable CCS" step the kernel can presumably already do, but now 
> on mmap as well.

So far the eviction strategy has been to copy both the backing store and
compression bits in raw form. With Xe2 it would indeed be possible to do
an implicit resolve IFF the buffer has not been shared to someone who doesn't
understand compression and might have left garbage in the CCS bits.

When evicting in raw form, kernel doesn't have to know if the CCS bits
are garbage or not on any given moment.

Regards, Joonas

> 
> What do you think?  Viable?  Crazy?  Have I missed something?
> 
> --Ken

Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Thomas Hellström]

On Tue, 2024-05-14 at 12:25 +0300, Joonas Lahtinen wrote:
> Quoting Kenneth Graunke (2024-05-11 03:58:34)
> > On Tuesday, May 7, 2024 3:56:57 PM PDT Matt Roper wrote:
> > > On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila
> > > wrote:
> > > > These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS
> > > > modifier, which,
> > > > from the kernel's perspective, behaves similarly to 
> > `I915_FORMAT_MOD_4_TILED`.
> > > > This new modifier is primarily intended for user space to
> > > > effectively 
> > monitor
> > > > compression status, especially when dealing with a mix of
> > > > compressed and
> > > > uncompressed buffers.
> > > > 
> > > > The addition of this modifier facilitates user space in
> > > > managing 
> > compression
> > > > status, particularly when utilizing both compressed and
> > > > uncompressed 
> > buffers
> > > > concurrently. To leverage compression for these buffers, user
> > > > space
> > > > applications must configure the appropriate Page Attribute
> > > > Table (PAT) 
> > index.
> > > > Display engine will treat all Tile4 as if it were compressed
> > > > under all
> > > > circumstances on Xe2 architecture.
> > > 
> > > I may have missed some discussion about this, but I thought the
> > > previous
> > > consensus was that we didn't want/need new modifiers for
> > > compression on
> > > Xe2?  If a userspace client (or the display hardware) receives a
> > > buffer
> > > of unknown origin and unknown compression status, it's always
> > > fine to
> > > select a compressed PAT when binding the buffer to read since
> > > even for
> > > uncompressed buffers the CCS metadata will accurately reflect the
> > > compression status.  Unlike Xe1, where generating content without
> > > compression enabled would leave random garbage in the FlatCCS
> > > area, Xe2
> > > will set the corresponding FlatCCS to '0x0' for each block,
> > > indicating
> > > uncompressed data.
> > > 
> > > Can you explain more what the benefit of handling these modifiers
> > > explicitly is?
> > > 
> > > 
> > > Matt
> > 
> > Thanks, Matt!  I'm a bit late in getting up to speed with the Xe2
> > compression 
> > changes; this is really good information.
> > 
> > As I understand it...all blocks on the GPU behave in the way you
> > mentioned, 
> > where generating uncompressed data via the GPU will set FlatCCS =
> > 0, so you 
> > can assume a compressed PAT entry and everything works.
> > 
> > One snag is...I've heard that CPU access doesn't work that way. 
> > So, if you 
> > mmap a buffer on the CPU, and write data with the CPU, then I think
> > we're back 
> > to the "FlatCCS contains uninitialized garbage" case, where it's
> > unsafe to 
> > assume a compressed PAT.  And... we don't really know when sharing
> > buffers 
> > whether the other side is going to want to do CPU access.
> 
> I think the previous discussion has specifically happened in the
> context of
> dma-buf, so not only CPU but other GPUs/accelerators/decoders/devices
> in the
> system are also relevant.
> 
> It boils down to the fact that when exporting a dma-buf, one can't
> know it will
> be consumed only by the same GPU (or other device for that matter)
> unless there
> is an explicit negotiation between exporter and importers.
> 
> > It would be really nice to assume compression by default, though,
> > which got me 
> > thinking: if we mmap a buffer via DRM_XE_GEM_MMAP_OFFSET, could
> > xe.ko disable 
> > compression for us?  So, resolve any outstanding CCS data, and then
> > switch any 
> > PAT entries to uncompressed.  Mapping would block until that
> > resolve is done.  
> > It could leave compression off forever (once you CPU map a buffer,
> > it's never 
> > compressed again).  Or it could turn CCS back on when map count
> > reaches 0 (but 
> > frankly I'm not sure that's terribly important, and sounds more
> > complex).
> 
> This would only really work for a single device but the dma-buf is
> specifically targeting more generic sharing. There's no built-in
> mechanism
> to limit the sharing to subset of devices without explicit
> negotiation
> between the exporter and importers.
> 
> So I think the "by default" mode needs to be interoperable, and the
> explicit negotiation can then use less compatible formats given those
> FD
> are never passed to importers that were not part of the negotiation.
> 
> > As I understand it, at least on discrete GPUs, the kernel already
> > has to do 
> > something similar for eviction, when migrating BOs to system memory
> > (which 
> > doesn't support compression).  So this would be doing basically the
> > same 
> > "resolve and disable CCS" step the kernel can presumably already
> > do, but now 
> > on mmap as well.
> 
> So far the eviction strategy has been to copy both the backing store
> and
> compression bits in raw form. With Xe2 it would indeed be possible to
> do
> an implicit resolve IFF the buffer has not been shared to someone who
> doesn't
> understand compression and might have left garbage in the CCS bits.
> 
> When evicting in raw form, kernel doesn't have to know if the CCS
> bits
> are garbage or not on any given moment.
> 
> Regards, Joonas

Just a follow-up comment (TBC), IF we're going for the everything-is-
compressed approach, I think there are some considerations to be made:

dma-buf exports to foreign devices need to resolve at map_attachment
time. Foreign devices are all devices that can't interpret the
compressed content.
dma-buf mmaps need to resolve. IIRC Could be implemented in the
DMA_BUF_IOCTL_SYNC callbacks that wrap cpu access.
dma-buf imports from foreign devices need to never use compressed PAT
for writing. Should KMD enforce this? Implicitly? Explicitly? I don't
see how UMD could know whether the imported dma-buf is from a foreign
device.

For mmaps of buffer objects of local device a resolve is needed. Having
KMD do that on a pagefault-basis is definitely possible, but will most
likely be terribly inefficient. Better to leave that to UMD?

/Thomas

> 
> > 
> > What do you think?  Viable?  Crazy?  Have I missed something?
> > 
> > --Ken

Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Zhang, Jianxun]

[-- Attachment #1: Type: text/plain, Size: 9337 bytes --]



________________________________
From: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Sent: Tuesday, May 14, 2024 9:51 AM
To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>; Graunke, Kenneth W <kenneth.w.graunke@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>
Cc: intel-xe@lists.freedesktop.org <intel-xe@lists.freedesktop.org>; intel-gfx@lists.freedesktop.org <intel-gfx@lists.freedesktop.org>; Chery, Nanley G <nanley.g.chery@intel.com>; Saarinen, Jani <jani.saarinen@intel.com>; Souza, Jose <jose.souza@intel.com>; Mathew, Alwin <alwin.mathew@intel.com>; Zhang, Jianxun <jianxun.zhang@intel.com>; Syrjala, Ville <ville.syrjala@linux.intel.com>; Nikula, Jani <jani.nikula@intel.com>
Subject: Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

On Tue, 2024-05-14 at 12:25 +0300, Joonas Lahtinen wrote:
> Quoting Kenneth Graunke (2024-05-11 03:58:34)
> > On Tuesday, May 7, 2024 3:56:57 PM PDT Matt Roper wrote:
> > > On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila
> > > wrote:
> > > > These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS
> > > > modifier, which,
> > > > from the kernel's perspective, behaves similarly to
> > `I915_FORMAT_MOD_4_TILED`.
> > > > This new modifier is primarily intended for user space to
> > > > effectively
> > monitor
> > > > compression status, especially when dealing with a mix of
> > > > compressed and
> > > > uncompressed buffers.
> > > >
> > > > The addition of this modifier facilitates user space in
> > > > managing
> > compression
> > > > status, particularly when utilizing both compressed and
> > > > uncompressed
> > buffers
> > > > concurrently. To leverage compression for these buffers, user
> > > > space
> > > > applications must configure the appropriate Page Attribute
> > > > Table (PAT)
> > index.
> > > > Display engine will treat all Tile4 as if it were compressed
> > > > under all
> > > > circumstances on Xe2 architecture.
> > >
> > > I may have missed some discussion about this, but I thought the
> > > previous
> > > consensus was that we didn't want/need new modifiers for
> > > compression on
> > > Xe2?  If a userspace client (or the display hardware) receives a
> > > buffer
> > > of unknown origin and unknown compression status, it's always
> > > fine to
> > > select a compressed PAT when binding the buffer to read since
> > > even for
> > > uncompressed buffers the CCS metadata will accurately reflect the
> > > compression status.  Unlike Xe1, where generating content without
> > > compression enabled would leave random garbage in the FlatCCS
> > > area, Xe2
> > > will set the corresponding FlatCCS to '0x0' for each block,
> > > indicating
> > > uncompressed data.
> > >
> > > Can you explain more what the benefit of handling these modifiers
> > > explicitly is?
I am not sure if there is another nice way to address this case in the eco-system without an explicit modifier even if it is not necessary from kernel driver aspect, so I just put it here to get some insights.

I assume we still want to support existing modifiers like I915_FORMAT_MOD_4_TILED, then the modifier extension of Vulkan becomes relevant (https://registry.khronos.org/vulkan/specs/1.3-extensions/man/html/VK_EXT_image_drm_format_modifier.html). In the section of export, the spec depicts the driver can choose the optimal modifier to create the image from a list of modifiers application provides, which could be all modifiers reported by driver from a prior query. Then the application will export the modifier along with other necessary meta data and buffer. For these legacy modifiers like TILE_4, we can disable compression on it since it is defined without compression schemas in drm_fourcc.h, or we can keep the image compressed internally but need to uncompress it before exporting. Either of the two options has a performance penalty, but this won't be a concern when we have an explicit TILE_4+compression modifier (e.g. DG2, MTL) to choose. The rest of export-import process has no ambiguity on compression support, so no resolve or special treatment is needed. Without such modifier, what should driver assign to image or report back to application? In this case we can only have these legacy modifiers as options with penalty.

There was also a discussion on assuming shared data always compressed between both ends to eliminate the need of a new modifier on Xe2, but it has to be defined between the parties in design and cannot guarantee data is still sharable between different devices.

It seems to me that the drm modifier has been there from a while, always portraited as beneficial enhancements and get promoted, so more apps would be on the path with modifiers by default. On the other hand, even if it turns out that this explicit modifier is not useful, it won't hurt anyway as the last drm modifier inherited by later Hardwares. It seems still better and safer to have it then getting caught by some corner cases on the road.

If there is another logical path to deal it without such modifier, that will be great too.

> > >
> > >
> > > Matt
> >
> > Thanks, Matt!  I'm a bit late in getting up to speed with the Xe2
> > compression
> > changes; this is really good information.
> >
> > As I understand it...all blocks on the GPU behave in the way you
> > mentioned,
> > where generating uncompressed data via the GPU will set FlatCCS =
> > 0, so you
> > can assume a compressed PAT entry and everything works.
> >
> > One snag is...I've heard that CPU access doesn't work that way.
> > So, if you
> > mmap a buffer on the CPU, and write data with the CPU, then I think
> > we're back
> > to the "FlatCCS contains uninitialized garbage" case, where it's
> > unsafe to
> > assume a compressed PAT.  And... we don't really know when sharing
> > buffers
> > whether the other side is going to want to do CPU access.
>
> I think the previous discussion has specifically happened in the
> context of
> dma-buf, so not only CPU but other GPUs/accelerators/decoders/devices
> in the
> system are also relevant.
>
> It boils down to the fact that when exporting a dma-buf, one can't
> know it will
> be consumed only by the same GPU (or other device for that matter)
> unless there
> is an explicit negotiation between exporter and importers.
>
> > It would be really nice to assume compression by default, though,
> > which got me
> > thinking: if we mmap a buffer via DRM_XE_GEM_MMAP_OFFSET, could
> > xe.ko disable
> > compression for us?  So, resolve any outstanding CCS data, and then
> > switch any
> > PAT entries to uncompressed.  Mapping would block until that
> > resolve is done.
> > It could leave compression off forever (once you CPU map a buffer,
> > it's never
> > compressed again).  Or it could turn CCS back on when map count
> > reaches 0 (but
> > frankly I'm not sure that's terribly important, and sounds more
> > complex).
>
> This would only really work for a single device but the dma-buf is
> specifically targeting more generic sharing. There's no built-in
> mechanism
> to limit the sharing to subset of devices without explicit
> negotiation
> between the exporter and importers.
>
> So I think the "by default" mode needs to be interoperable, and the
> explicit negotiation can then use less compatible formats given those
> FD
> are never passed to importers that were not part of the negotiation.
>
> > As I understand it, at least on discrete GPUs, the kernel already
> > has to do
> > something similar for eviction, when migrating BOs to system memory
> > (which
> > doesn't support compression).  So this would be doing basically the
> > same
> > "resolve and disable CCS" step the kernel can presumably already
> > do, but now
> > on mmap as well.
>
> So far the eviction strategy has been to copy both the backing store
> and
> compression bits in raw form. With Xe2 it would indeed be possible to
> do
> an implicit resolve IFF the buffer has not been shared to someone who
> doesn't
> understand compression and might have left garbage in the CCS bits.
>
> When evicting in raw form, kernel doesn't have to know if the CCS
> bits
> are garbage or not on any given moment.
>
> Regards, Joonas

Just a follow-up comment (TBC), IF we're going for the everything-is-
compressed approach, I think there are some considerations to be made:

dma-buf exports to foreign devices need to resolve at map_attachment
time. Foreign devices are all devices that can't interpret the
compressed content.
dma-buf mmaps need to resolve. IIRC Could be implemented in the
DMA_BUF_IOCTL_SYNC callbacks that wrap cpu access.
dma-buf imports from foreign devices need to never use compressed PAT
for writing. Should KMD enforce this? Implicitly? Explicitly? I don't
see how UMD could know whether the imported dma-buf is from a foreign
device.

For mmaps of buffer objects of local device a resolve is needed. Having
KMD do that on a pagefault-basis is definitely possible, but will most
likely be terribly inefficient. Better to leave that to UMD?

/Thomas

>
> >
> > What do you think?  Viable?  Crazy?  Have I missed something?
> >
> > --Ken


[-- Attachment #2: Type: text/html, Size: 12860 bytes --]

RE: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

[Chery, Nanley G]

[-- Attachment #1: Type: text/plain, Size: 11031 bytes --]

+1. It would help to have an explicit CCS modifier should an unforeseen corner case arise.

Also, as Ken mentioned, CPU mapped accesses require that compressed images be resolved beforehand. By having both a 4_TILED modifier and a 4_TILED_XE2_CCS modifier, applications can avoid performance penalties if they would like to do frequent CPU mapped accesses.

-Nanley

From: Zhang, Jianxun <jianxun.zhang@intel.com>
Sent: Friday, July 19, 2024 4:17 PM
To: Thomas Hellström <thomas.hellstrom@linux.intel.com>; Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>; Graunke, Kenneth W <kenneth.w.graunke@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>
Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Chery, Nanley G <nanley.g.chery@intel.com>; Saarinen, Jani <jani.saarinen@intel.com>; Souza, Jose <jose.souza@intel.com>; Mathew, Alwin <alwin.mathew@intel.com>; Syrjala, Ville <ville.syrjala@linux.intel.com>; Nikula, Jani <jani.nikula@intel.com>
Subject: Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2



________________________________
From: Thomas Hellström <thomas.hellstrom@linux.intel.com<mailto:thomas.hellstrom@linux.intel.com>>
Sent: Tuesday, May 14, 2024 9:51 AM
To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com<mailto:joonas.lahtinen@linux.intel.com>>; Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com<mailto:juhapekka.heikkila@gmail.com>>; Graunke, Kenneth W <kenneth.w.graunke@intel.com<mailto:kenneth.w.graunke@intel.com>>; Roper, Matthew D <matthew.d.roper@intel.com<mailto:matthew.d.roper@intel.com>>
Cc: intel-xe@lists.freedesktop.org<mailto:intel-xe@lists.freedesktop.org> <intel-xe@lists.freedesktop.org<mailto:intel-xe@lists.freedesktop.org>>; intel-gfx@lists.freedesktop.org<mailto:intel-gfx@lists.freedesktop.org> <intel-gfx@lists.freedesktop.org<mailto:intel-gfx@lists.freedesktop.org>>; Chery, Nanley G <nanley.g.chery@intel.com<mailto:nanley.g.chery@intel.com>>; Saarinen, Jani <jani.saarinen@intel.com<mailto:jani.saarinen@intel.com>>; Souza, Jose <jose.souza@intel.com<mailto:jose.souza@intel.com>>; Mathew, Alwin <alwin.mathew@intel.com<mailto:alwin.mathew@intel.com>>; Zhang, Jianxun <jianxun.zhang@intel.com<mailto:jianxun.zhang@intel.com>>; Syrjala, Ville <ville.syrjala@linux.intel.com<mailto:ville.syrjala@linux.intel.com>>; Nikula, Jani <jani.nikula@intel.com<mailto:jani.nikula@intel.com>>
Subject: Re: [RFC PATCH 0/3] Introducing I915_FORMAT_MOD_4_TILED_XE2_CCS Modifier for Xe2

On Tue, 2024-05-14 at 12:25 +0300, Joonas Lahtinen wrote:
> Quoting Kenneth Graunke (2024-05-11 03:58:34)
> > On Tuesday, May 7, 2024 3:56:57 PM PDT Matt Roper wrote:
> > > On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila
> > > wrote:
> > > > These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS
> > > > modifier, which,
> > > > from the kernel's perspective, behaves similarly to
> > `I915_FORMAT_MOD_4_TILED`.
> > > > This new modifier is primarily intended for user space to
> > > > effectively
> > monitor
> > > > compression status, especially when dealing with a mix of
> > > > compressed and
> > > > uncompressed buffers.
> > > >
> > > > The addition of this modifier facilitates user space in
> > > > managing
> > compression
> > > > status, particularly when utilizing both compressed and
> > > > uncompressed
> > buffers
> > > > concurrently. To leverage compression for these buffers, user
> > > > space
> > > > applications must configure the appropriate Page Attribute
> > > > Table (PAT)
> > index.
> > > > Display engine will treat all Tile4 as if it were compressed
> > > > under all
> > > > circumstances on Xe2 architecture.
> > >
> > > I may have missed some discussion about this, but I thought the
> > > previous
> > > consensus was that we didn't want/need new modifiers for
> > > compression on
> > > Xe2?  If a userspace client (or the display hardware) receives a
> > > buffer
> > > of unknown origin and unknown compression status, it's always
> > > fine to
> > > select a compressed PAT when binding the buffer to read since
> > > even for
> > > uncompressed buffers the CCS metadata will accurately reflect the
> > > compression status.  Unlike Xe1, where generating content without
> > > compression enabled would leave random garbage in the FlatCCS
> > > area, Xe2
> > > will set the corresponding FlatCCS to '0x0' for each block,
> > > indicating
> > > uncompressed data.
> > >
> > > Can you explain more what the benefit of handling these modifiers
> > > explicitly is?
I am not sure if there is another nice way to address this case in the eco-system without an explicit modifier even if it is not necessary from kernel driver aspect, so I just put it here to get some insights.

I assume we still want to support existing modifiers like I915_FORMAT_MOD_4_TILED, then the modifier extension of Vulkan becomes relevant (https://registry.khronos.org/vulkan/specs/1.3-extensions/man/html/VK_EXT_image_drm_format_modifier.html). In the section of export, the spec depicts the driver can choose the optimal modifier to create the image from a list of modifiers application provides, which could be all modifiers reported by driver from a prior query. Then the application will export the modifier along with other necessary meta data and buffer. For these legacy modifiers like TILE_4, we can disable compression on it since it is defined without compression schemas in drm_fourcc.h, or we can keep the image compressed internally but need to uncompress it before exporting. Either of the two options has a performance penalty, but this won't be a concern when we have an explicit TILE_4+compression modifier (e.g. DG2, MTL) to choose. The rest of export-import process has no ambiguity on compression support, so no resolve or special treatment is needed. Without such modifier, what should driver assign to image or report back to application? In this case we can only have these legacy modifiers as options with penalty.

There was also a discussion on assuming shared data always compressed between both ends to eliminate the need of a new modifier on Xe2, but it has to be defined between the parties in design and cannot guarantee data is still sharable between different devices.

It seems to me that the drm modifier has been there from a while, always portraited as beneficial enhancements and get promoted, so more apps would be on the path with modifiers by default. On the other hand, even if it turns out that this explicit modifier is not useful, it won't hurt anyway as the last drm modifier inherited by later Hardwares. It seems still better and safer to have it then getting caught by some corner cases on the road.

If there is another logical path to deal it without such modifier, that will be great too.

> > >
> > >
> > > Matt
> >
> > Thanks, Matt!  I'm a bit late in getting up to speed with the Xe2
> > compression
> > changes; this is really good information.
> >
> > As I understand it...all blocks on the GPU behave in the way you
> > mentioned,
> > where generating uncompressed data via the GPU will set FlatCCS =
> > 0, so you
> > can assume a compressed PAT entry and everything works.
> >
> > One snag is...I've heard that CPU access doesn't work that way.
> > So, if you
> > mmap a buffer on the CPU, and write data with the CPU, then I think
> > we're back
> > to the "FlatCCS contains uninitialized garbage" case, where it's
> > unsafe to
> > assume a compressed PAT.  And... we don't really know when sharing
> > buffers
> > whether the other side is going to want to do CPU access.
>
> I think the previous discussion has specifically happened in the
> context of
> dma-buf, so not only CPU but other GPUs/accelerators/decoders/devices
> in the
> system are also relevant.
>
> It boils down to the fact that when exporting a dma-buf, one can't
> know it will
> be consumed only by the same GPU (or other device for that matter)
> unless there
> is an explicit negotiation between exporter and importers.
>
> > It would be really nice to assume compression by default, though,
> > which got me
> > thinking: if we mmap a buffer via DRM_XE_GEM_MMAP_OFFSET, could
> > xe.ko disable
> > compression for us?  So, resolve any outstanding CCS data, and then
> > switch any
> > PAT entries to uncompressed.  Mapping would block until that
> > resolve is done.
> > It could leave compression off forever (once you CPU map a buffer,
> > it's never
> > compressed again).  Or it could turn CCS back on when map count
> > reaches 0 (but
> > frankly I'm not sure that's terribly important, and sounds more
> > complex).
>
> This would only really work for a single device but the dma-buf is
> specifically targeting more generic sharing. There's no built-in
> mechanism
> to limit the sharing to subset of devices without explicit
> negotiation
> between the exporter and importers.
>
> So I think the "by default" mode needs to be interoperable, and the
> explicit negotiation can then use less compatible formats given those
> FD
> are never passed to importers that were not part of the negotiation.
>
> > As I understand it, at least on discrete GPUs, the kernel already
> > has to do
> > something similar for eviction, when migrating BOs to system memory
> > (which
> > doesn't support compression).  So this would be doing basically the
> > same
> > "resolve and disable CCS" step the kernel can presumably already
> > do, but now
> > on mmap as well.
>
> So far the eviction strategy has been to copy both the backing store
> and
> compression bits in raw form. With Xe2 it would indeed be possible to
> do
> an implicit resolve IFF the buffer has not been shared to someone who
> doesn't
> understand compression and might have left garbage in the CCS bits.
>
> When evicting in raw form, kernel doesn't have to know if the CCS
> bits
> are garbage or not on any given moment.
>
> Regards, Joonas

Just a follow-up comment (TBC), IF we're going for the everything-is-
compressed approach, I think there are some considerations to be made:

dma-buf exports to foreign devices need to resolve at map_attachment
time. Foreign devices are all devices that can't interpret the
compressed content.
dma-buf mmaps need to resolve. IIRC Could be implemented in the
DMA_BUF_IOCTL_SYNC callbacks that wrap cpu access.
dma-buf imports from foreign devices need to never use compressed PAT
for writing. Should KMD enforce this? Implicitly? Explicitly? I don't
see how UMD could know whether the imported dma-buf is from a foreign
device.

For mmaps of buffer objects of local device a resolve is needed. Having
KMD do that on a pagefault-basis is definitely possible, but will most
likely be terribly inefficient. Better to leave that to UMD?

/Thomas

>
> >
> > What do you think?  Viable?  Crazy?  Have I missed something?
> >
> > --Ken

[-- Attachment #2: Type: text/html, Size: 20565 bytes --]