[PATCH 00/15] drm/i915/display: convert display feature helpers to struct intel_display

[PATCH 00/15] drm/i915/display: convert display feature helpers to struct intel_display

[Jani Nikula]

Add display->platform.dgfx and display->platform->mobile platform groups
to replace IS_DGFX() and IS_MOBILE() respectively. Convert all the HAS_*
display feature check helpers to struct intel_display.

This unblocks a lot of further code conversion to struct intel_display.

BR,
Jani.


Jani Nikula (15):
  drm/i915/display: identify discrete graphics
  drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct
    intel_display
  drm/i915/display: convert HAS_4TILE() to struct intel_display
  drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct
    intel_display
  drm/i915/display: convert HAS_DP20() to struct intel_display
  drm/i915/display: convert HAS_GMBUS_BURST_READ() to struct
    intel_display
  drm/i915/display: convert HAS_IPS() to struct intel_display
  drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display
  drm/i915/display: convert HAS_SAGV() to struct intel_display
  drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_display
  drm/i915/display: convert HAS_ULTRAJOINER() to struct intel_display
  drm/i915/display: rename i915 parameter to __display in feature
    helpers
  drm/i915/display: convert display device identification to struct
    intel_display
  drm/i915/display: pass struct pci_dev * to
    intel_display_device_probe()
  drm/i915/display: add mobile platform group

 drivers/gpu/drm/i915/display/hsw_ips.c        |   4 +-
 drivers/gpu/drm/i915/display/intel_audio.c    |   7 +-
 drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_cursor.c   |   5 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  26 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  16 +-
 .../drm/i915/display/intel_display_debugfs.c  |   4 +-
 .../drm/i915/display/intel_display_device.c   | 274 ++++++++++--------
 .../drm/i915/display/intel_display_device.h   | 153 +++++-----
 .../gpu/drm/i915/display/intel_display_irq.c  |  12 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  12 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +-
 drivers/gpu/drm/i915/display/intel_drrs.c     |   4 +-
 drivers/gpu/drm/i915/display/intel_dvo.c      |   3 +-
 drivers/gpu/drm/i915/display/intel_gmbus.c    |   3 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |   2 +-
 drivers/gpu/drm/i915/display/intel_hotplug.c  |   4 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |   3 +-
 drivers/gpu/drm/i915/display/intel_psr.c      |   8 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c     |   3 +-
 drivers/gpu/drm/i915/display/intel_tv.c       |   2 +-
 .../drm/i915/display/skl_universal_plane.c    |  25 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  | 101 ++++---
 drivers/gpu/drm/i915/i915_driver.c            |   8 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   2 +-
 drivers/gpu/drm/xe/display/xe_display.c       |  12 +-
 26 files changed, 389 insertions(+), 309 deletions(-)

-- 
2.39.5

[PATCH 01/15] drm/i915/display: identify discrete graphics

[Jani Nikula]

Identify discrete graphics separately in display, using the platform
group mechanism. This enables dropping the dependency on i915_drv.h
IS_DGFX() from display code.

Start grouping platform groups separately in INTEL_DISPLAY_PLATFORMS()
in anticipation of more groups to come.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 8 ++++++--
 drivers/gpu/drm/i915/display/intel_display_device.h | 4 +++-
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 5f98e1b2a401..47957384d56d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1011,6 +1011,7 @@ static const enum intel_step dg1_steppings[] = {
 
 static const struct platform_desc dg1_desc = {
 	PLATFORM(dg1),
+	PLATFORM_GROUP(dgfx),
 	.info = &(const struct intel_display_device_info) {
 		XE_D_DISPLAY,
 
@@ -1238,6 +1239,7 @@ static const enum intel_step dg2_g12_steppings[] = {
 
 static const struct platform_desc dg2_desc = {
 	PLATFORM(dg2),
+	PLATFORM_GROUP(dgfx),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
 			SUBPLATFORM(dg2, g10),
@@ -1338,6 +1340,7 @@ static const struct platform_desc lnl_desc = {
 
 static const struct platform_desc bmg_desc = {
 	PLATFORM(battlemage),
+	PLATFORM_GROUP(dgfx),
 };
 
 static const struct platform_desc ptl_desc = {
@@ -1636,9 +1639,10 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 
 	DISPLAY_RUNTIME_INFO(i915)->step = step;
 
-	drm_info(&i915->drm, "Found %s%s%s (device ID %04x) display version %u.%02u stepping %s\n",
+	drm_info(&i915->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping %s\n",
 		 desc->name, subdesc ? "/" : "", subdesc ? subdesc->name : "",
-		 pdev->device, DISPLAY_RUNTIME_INFO(i915)->ip.ver,
+		 pdev->device, display->platform.dgfx ? "discrete" : "integrated",
+		 DISPLAY_RUNTIME_INFO(i915)->ip.ver,
 		 DISPLAY_RUNTIME_INFO(i915)->ip.rel,
 		 step != STEP_NONE ? intel_step_name(step) : "N/A");
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 43144a037f9f..392fbe29e974 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -21,6 +21,9 @@ struct drm_printer;
  * platform.
  */
 #define INTEL_DISPLAY_PLATFORMS(func) \
+	/* Platform group aliases */ \
+	func(g4x) /* g45 and gm45 */ \
+	func(dgfx) /* discrete graphics */ \
 	/* Display ver 2 */ \
 	func(i830) \
 	func(i845g) \
@@ -38,7 +41,6 @@ struct drm_printer;
 	func(i965gm) \
 	func(g45) \
 	func(gm45) \
-	func(g4x) /* group alias for g45 and gm45 */ \
 	/* Display ver 5 */ \
 	func(ironlake) \
 	/* Display ver 6 */ \
-- 
2.39.5

[PATCH 02/15] drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display

[Jani Nikula]

Convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c |  2 +-
 drivers/gpu/drm/i915/display/intel_display_device.h |  2 +-
 drivers/gpu/drm/i915/display/intel_display_irq.c    | 12 +++++++-----
 drivers/gpu/drm/i915/display/skl_universal_plane.c  |  4 +++-
 4 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 47957384d56d..1e561df02751 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1687,7 +1687,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 		display_runtime->num_scalers[PIPE_C] = 1;
 	}
 
-	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
+	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
 		for_each_pipe(i915, pipe)
 			display_runtime->num_sprites[pipe] = 4;
 	else if (DISPLAY_VER(i915) >= 11)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 392fbe29e974..e45ba21166d3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -144,7 +144,7 @@ struct intel_display_platforms {
 #define HAS_CDCLK_CRAWL(i915)		(DISPLAY_INFO(i915)->has_cdclk_crawl)
 #define HAS_CDCLK_SQUASH(i915)		(DISPLAY_INFO(i915)->has_cdclk_squash)
 #define HAS_CUR_FBC(i915)		(!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13))
-#define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
+#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)
 #define HAS_DBUF_OVERLAP_DETECTION(__i915) (DISPLAY_RUNTIME_INFO(__i915)->has_dbuf_overlap_detection)
 #define HAS_DDI(i915)			(DISPLAY_INFO(i915)->has_ddi)
 #define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index e1547ebce60e..f0d3bdb5fc60 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -843,7 +843,9 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
 
 static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 {
-	if (DISPLAY_VER(dev_priv) >= 14)
+	struct intel_display *display = &dev_priv->display;
+
+	if (DISPLAY_VER(display) >= 14)
 		return MTL_PIPEDMC_ATS_FAULT |
 			MTL_PLANE_ATS_FAULT |
 			GEN12_PIPEDMC_FAULT |
@@ -853,7 +855,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 			GEN9_PIPE_PLANE3_FAULT |
 			GEN9_PIPE_PLANE2_FAULT |
 			GEN9_PIPE_PLANE1_FAULT;
-	if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv))
+	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
 		return GEN12_PIPEDMC_FAULT |
 			GEN9_PIPE_CURSOR_FAULT |
 			GEN11_PIPE_PLANE5_FAULT |
@@ -861,7 +863,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 			GEN9_PIPE_PLANE3_FAULT |
 			GEN9_PIPE_PLANE2_FAULT |
 			GEN9_PIPE_PLANE1_FAULT;
-	else if (DISPLAY_VER(dev_priv) == 12)
+	else if (DISPLAY_VER(display) == 12)
 		return GEN12_PIPEDMC_FAULT |
 			GEN9_PIPE_CURSOR_FAULT |
 			GEN11_PIPE_PLANE7_FAULT |
@@ -871,7 +873,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 			GEN9_PIPE_PLANE3_FAULT |
 			GEN9_PIPE_PLANE2_FAULT |
 			GEN9_PIPE_PLANE1_FAULT;
-	else if (DISPLAY_VER(dev_priv) == 11)
+	else if (DISPLAY_VER(display) == 11)
 		return GEN9_PIPE_CURSOR_FAULT |
 			GEN11_PIPE_PLANE7_FAULT |
 			GEN11_PIPE_PLANE6_FAULT |
@@ -880,7 +882,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 			GEN9_PIPE_PLANE3_FAULT |
 			GEN9_PIPE_PLANE2_FAULT |
 			GEN9_PIPE_PLANE1_FAULT;
-	else if (DISPLAY_VER(dev_priv) >= 9)
+	else if (DISPLAY_VER(display) >= 9)
 		return GEN9_PIPE_CURSOR_FAULT |
 			GEN9_PIPE_PLANE4_FAULT |
 			GEN9_PIPE_PLANE3_FAULT |
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 038ca2ec5d7a..c6e464d70cc7 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -239,7 +239,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
 
 static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915)
 {
-	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
+	struct intel_display *display = &i915->display;
+
+	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
 		return BIT(PLANE_4) | BIT(PLANE_5);
 	else
 		return BIT(PLANE_6) | BIT(PLANE_7);
-- 
2.39.5

[PATCH 03/15] drm/i915/display: convert HAS_4TILE() to struct intel_display

[Jani Nikula]

Convert HAS_4TILE() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_device.h    |  2 +-
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 ++++++++------
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index e45ba21166d3..70d1beebbf8f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -138,7 +138,7 @@ struct intel_display_platforms {
 	func(overlay_needs_physical); \
 	func(supports_tv);
 
-#define HAS_4TILE(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
+#define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
 #define HAS_ASYNC_FLIPS(i915)		(DISPLAY_VER(i915) >= 5)
 #define HAS_BIGJOINER(i915)		(DISPLAY_VER(i915) >= 11 && HAS_DSC(i915))
 #define HAS_CDCLK_CRAWL(i915)		(DISPLAY_INFO(i915)->has_cdclk_crawl)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index c6e464d70cc7..28f7f2405ef3 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2550,13 +2550,14 @@ static bool tgl_plane_has_mc_ccs(struct drm_i915_private *i915,
 static u8 skl_get_plane_caps(struct drm_i915_private *i915,
 			     enum pipe pipe, enum plane_id plane_id)
 {
+	struct intel_display *display = &i915->display;
 	u8 caps = INTEL_PLANE_CAP_TILING_X;
 
-	if (DISPLAY_VER(i915) < 13 || IS_ALDERLAKE_P(i915))
+	if (DISPLAY_VER(display) < 13 || display->platform.alderlake_p)
 		caps |= INTEL_PLANE_CAP_TILING_Y;
-	if (DISPLAY_VER(i915) < 12)
+	if (DISPLAY_VER(display) < 12)
 		caps |= INTEL_PLANE_CAP_TILING_Yf;
-	if (HAS_4TILE(i915))
+	if (HAS_4TILE(display))
 		caps |= INTEL_PLANE_CAP_TILING_4;
 
 	if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(i915))
@@ -2564,14 +2565,14 @@ static u8 skl_get_plane_caps(struct drm_i915_private *i915,
 
 	if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) {
 		caps |= INTEL_PLANE_CAP_CCS_RC;
-		if (DISPLAY_VER(i915) >= 12)
+		if (DISPLAY_VER(display) >= 12)
 			caps |= INTEL_PLANE_CAP_CCS_RC_CC;
 	}
 
 	if (tgl_plane_has_mc_ccs(i915, plane_id))
 		caps |= INTEL_PLANE_CAP_CCS_MC;
 
-	if (DISPLAY_VER(i915) >= 14 && IS_DGFX(i915))
+	if (DISPLAY_VER(display) >= 14 && display->platform.dgfx)
 		caps |= INTEL_PLANE_CAP_NEED64K_PHYS;
 
 	return caps;
@@ -2745,6 +2746,7 @@ void
 skl_get_initial_plane_config(struct intel_crtc *crtc,
 			     struct intel_initial_plane_config *plane_config)
 {
+	struct intel_display *display = to_intel_display(crtc);
 	struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
@@ -2826,7 +2828,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
 			fb->modifier = I915_FORMAT_MOD_Y_TILED;
 		break;
 	case PLANE_CTL_TILED_YF: /* aka PLANE_CTL_TILED_4 on XE_LPD+ */
-		if (HAS_4TILE(dev_priv)) {
+		if (HAS_4TILE(display)) {
 			u32 rc_mask = PLANE_CTL_RENDER_DECOMPRESSION_ENABLE |
 				      PLANE_CTL_CLEAR_COLOR_DISABLE;
 
-- 
2.39.5

[PATCH 04/15] drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display

[Jani Nikula]

Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
 drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
 drivers/gpu/drm/i915/display/intel_dp.c             | 4 ++--
 drivers/gpu/drm/i915/display/intel_drrs.c           | 4 +++-
 4 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 863927f429aa..57b42554d656 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5322,6 +5322,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 			  const struct intel_crtc_state *pipe_config,
 			  bool fastset)
 {
+	struct intel_display *display = to_intel_display(current_config);
 	struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev);
 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	struct drm_printer p;
@@ -5562,7 +5563,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	PIPE_CONF_CHECK_I(lane_count);
 	PIPE_CONF_CHECK_X(lane_lat_optim_mask);
 
-	if (HAS_DOUBLE_BUFFERED_M_N(dev_priv)) {
+	if (HAS_DOUBLE_BUFFERED_M_N(display)) {
 		if (!fastset || !pipe_config->update_m_n)
 			PIPE_CONF_CHECK_M_N(dp_m_n);
 	} else {
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 70d1beebbf8f..e11993a6f042 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -149,7 +149,7 @@ struct intel_display_platforms {
 #define HAS_DDI(i915)			(DISPLAY_INFO(i915)->has_ddi)
 #define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
 #define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
-#define HAS_DOUBLE_BUFFERED_M_N(i915)	(DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
 #define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
 #define HAS_DP20(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
 #define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ff5ba7b3035f..a27da96d2c60 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1700,13 +1700,13 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
 
 static bool has_seamless_m_n(struct intel_connector *connector)
 {
-	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct intel_display *display = to_intel_display(connector);
 
 	/*
 	 * Seamless M/N reprogramming only implemented
 	 * for BDW+ double buffered M/N registers so far.
 	 */
-	return HAS_DOUBLE_BUFFERED_M_N(i915) &&
+	return HAS_DOUBLE_BUFFERED_M_N(display) &&
 		intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index bb39eb96e812..0fec01b79b23 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -68,7 +68,9 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
 bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
 				   enum transcoder cpu_transcoder)
 {
-	if (HAS_DOUBLE_BUFFERED_M_N(i915))
+	struct intel_display *display = &i915->display;
+
+	if (HAS_DOUBLE_BUFFERED_M_N(display))
 		return true;
 
 	return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
-- 
2.39.5

[PATCH 05/15] drm/i915/display: convert HAS_DP20() to struct intel_display

[Jani Nikula]

Convert HAS_DP20() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_audio.c    |  7 +++--
 drivers/gpu/drm/i915/display/intel_ddi.c      | 26 ++++++++++---------
 .../drm/i915/display/intel_display_device.h   |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.c      |  8 +++---
 4 files changed, 21 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 32aa9ec1a204..4cc70da8f467 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -681,12 +681,11 @@ static void ibx_audio_codec_enable(struct intel_encoder *encoder,
 
 void intel_audio_sdp_split_update(const struct intel_crtc_state *crtc_state)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+	struct intel_display *display = to_intel_display(crtc_state);
 	enum transcoder trans = crtc_state->cpu_transcoder;
 
-	if (HAS_DP20(i915))
-		intel_de_rmw(i915, AUD_DP_2DOT0_CTRL(trans), AUD_ENABLE_SDP_SPLIT,
+	if (HAS_DP20(display))
+		intel_de_rmw(display, AUD_DP_2DOT0_CTRL(trans), AUD_ENABLE_SDP_SPLIT,
 			     crtc_state->sdp_split_enable ? AUD_ENABLE_SDP_SPLIT : 0);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 49b5cc01ce40..46b7b90d3d98 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -700,8 +700,8 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
 
 bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
 {
-	struct drm_device *dev = intel_connector->base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct intel_display *display = to_intel_display(intel_connector);
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_encoder *encoder = intel_attached_encoder(intel_connector);
 	int type = intel_connector->base.connector_type;
 	enum port port = encoder->port;
@@ -747,7 +747,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
 		break;
 
 	case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
-		if (HAS_DP20(dev_priv))
+		if (HAS_DP20(display))
 			/* 128b/132b */
 			ret = false;
 		else
@@ -769,8 +769,8 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
 static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
 					u8 *pipe_mask, bool *is_dp_mst)
 {
-	struct drm_device *dev = encoder->base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct intel_display *display = to_intel_display(encoder);
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	enum port port = encoder->port;
 	intel_wakeref_t wakeref;
 	enum pipe p;
@@ -840,7 +840,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
 			continue;
 
 		if ((tmp & TRANS_DDI_MODE_SELECT_MASK) == TRANS_DDI_MODE_SELECT_DP_MST ||
-		    (HAS_DP20(dev_priv) &&
+		    (HAS_DP20(display) &&
 		     (tmp & TRANS_DDI_MODE_SELECT_MASK) == TRANS_DDI_MODE_SELECT_FDI_OR_128B132B))
 			mst_pipe_mask |= BIT(p);
 
@@ -2653,6 +2653,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 				  const struct intel_crtc_state *crtc_state,
 				  const struct drm_connector_state *conn_state)
 {
+	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
@@ -2721,7 +2722,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	 */
 	intel_ddi_enable_transcoder_clock(encoder, crtc_state);
 
-	if (HAS_DP20(dev_priv))
+	if (HAS_DP20(display))
 		intel_ddi_config_transcoder_dp2(encoder, crtc_state);
 
 	/*
@@ -2862,9 +2863,9 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
 				    const struct intel_crtc_state *crtc_state,
 				    const struct drm_connector_state *conn_state)
 {
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_display *display = to_intel_display(encoder);
 
-	if (HAS_DP20(dev_priv))
+	if (HAS_DP20(display))
 		intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
 					    crtc_state);
 
@@ -2872,9 +2873,9 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	if (crtc_state->has_panel_replay)
 		intel_psr_enable_sink(enc_to_intel_dp(encoder), crtc_state);
 
-	if (DISPLAY_VER(dev_priv) >= 14)
+	if (DISPLAY_VER(display) >= 14)
 		mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
-	else if (DISPLAY_VER(dev_priv) >= 12)
+	else if (DISPLAY_VER(display) >= 12)
 		tgl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
 	else
 		hsw_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
@@ -3871,6 +3872,7 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
 static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
 				    struct intel_crtc_state *pipe_config)
 {
+	struct intel_display *display = to_intel_display(encoder);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
@@ -3960,7 +3962,7 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
 				intel_hdmi_infoframes_enabled(encoder, pipe_config);
 		break;
 	case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
-		if (!HAS_DP20(dev_priv)) {
+		if (!HAS_DP20(display)) {
 			/* FDI */
 			pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG);
 			pipe_config->enhanced_framing =
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index e11993a6f042..c861a61839b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -151,7 +151,7 @@ struct intel_display_platforms {
 #define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
 #define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
 #define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
-#define HAS_DP20(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
+#define HAS_DP20(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
 #define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)
 #define HAS_DSB(i915)			(DISPLAY_INFO(i915)->has_dsb)
 #define HAS_DSC(__i915)			(DISPLAY_RUNTIME_INFO(__i915)->has_dsc)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a784c0b81556..74c2e3635d9e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3335,11 +3335,10 @@ void intel_psr_flush(struct intel_display *display,
 void intel_psr_init(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_connector *connector = intel_dp->attached_connector;
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 
-	if (!(HAS_PSR(display) || HAS_DP20(dev_priv)))
+	if (!(HAS_PSR(display) || HAS_DP20(display)))
 		return;
 
 	/*
@@ -3357,7 +3356,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
 		return;
 	}
 
-	if ((HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp)) ||
+	if ((HAS_DP20(display) && !intel_dp_is_edp(intel_dp)) ||
 	    DISPLAY_VER(display) >= 20)
 		intel_dp->psr.source_panel_replay_support = true;
 
@@ -3974,7 +3973,6 @@ DEFINE_SHOW_ATTRIBUTE(i915_psr_status);
 void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(connector);
-	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct dentry *root = connector->base.debugfs_entry;
 
 	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
@@ -3984,7 +3982,7 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 	debugfs_create_file("i915_psr_sink_status", 0444, root,
 			    connector, &i915_psr_sink_status_fops);
 
-	if (HAS_PSR(display) || HAS_DP20(i915))
+	if (HAS_PSR(display) || HAS_DP20(display))
 		debugfs_create_file("i915_psr_status", 0444, root,
 				    connector, &i915_psr_status_fops);
 }
-- 
2.39.5

[PATCH 06/15] drm/i915/display: convert HAS_GMBUS_BURST_READ() to struct intel_display

[Jani Nikula]

Convert HAS_GMBUS_BURST_READ() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
 drivers/gpu/drm/i915/display/intel_gmbus.c          | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index c861a61839b8..6279c6c6e831 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -160,7 +160,7 @@ struct intel_display_platforms {
 #define HAS_FPGA_DBG_UNCLAIMED(i915)	(DISPLAY_INFO(i915)->has_fpga_dbg)
 #define HAS_FW_BLC(i915)		(DISPLAY_VER(i915) >= 3)
 #define HAS_GMBUS_IRQ(i915)		(DISPLAY_VER(i915) >= 4)
-#define HAS_GMBUS_BURST_READ(i915)	(DISPLAY_VER(i915) >= 10 || IS_KABYLAKE(i915))
+#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
 #define HAS_GMCH(i915)			(DISPLAY_INFO(i915)->has_gmch)
 #define HAS_HW_SAGV_WM(i915)		(DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
 #define HAS_IPC(i915)			(DISPLAY_INFO(i915)->has_ipc)
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index e3d938c7f83e..807cf606e7a8 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -496,14 +496,13 @@ static int
 gmbus_xfer_read(struct intel_display *display, struct i2c_msg *msg,
 		u32 gmbus0_reg, u32 gmbus1_index)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	u8 *buf = msg->buf;
 	unsigned int rx_size = msg->len;
 	unsigned int len;
 	int ret;
 
 	do {
-		if (HAS_GMBUS_BURST_READ(i915))
+		if (HAS_GMBUS_BURST_READ(display))
 			len = min(rx_size, INTEL_GMBUS_BURST_READ_MAX_LEN);
 		else
 			len = min(rx_size, gmbus_max_xfer_size(display));
-- 
2.39.5

[PATCH 07/15] drm/i915/display: convert HAS_IPS() to struct intel_display

[Jani Nikula]

Convert HAS_IPS() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/hsw_ips.c              | 4 +++-
 drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
 drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
index 34c5d28fc866..ee815e0344e8 100644
--- a/drivers/gpu/drm/i915/display/hsw_ips.c
+++ b/drivers/gpu/drm/i915/display/hsw_ips.c
@@ -185,7 +185,9 @@ void hsw_ips_post_update(struct intel_atomic_state *state,
 /* IPS only exists on ULT machines and is tied to pipe A. */
 bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
 {
-	return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A;
+	struct intel_display *display = to_intel_display(crtc);
+
+	return HAS_IPS(display) && crtc->pipe == PIPE_A;
 }
 
 bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 57b42554d656..f53611e83502 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4545,6 +4545,7 @@ static int hsw_compute_linetime_wm(struct intel_atomic_state *state,
 static int intel_crtc_atomic_check(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc)
 {
+	struct intel_display *display = to_intel_display(crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct intel_crtc_state *crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
@@ -4586,7 +4587,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
 			return ret;
 	}
 
-	if (HAS_IPS(dev_priv)) {
+	if (HAS_IPS(display)) {
 		ret = hsw_ips_compute_config(state, crtc);
 		if (ret)
 			return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 6279c6c6e831..b85b1d3ff708 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -164,7 +164,7 @@ struct intel_display_platforms {
 #define HAS_GMCH(i915)			(DISPLAY_INFO(i915)->has_gmch)
 #define HAS_HW_SAGV_WM(i915)		(DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
 #define HAS_IPC(i915)			(DISPLAY_INFO(i915)->has_ipc)
-#define HAS_IPS(i915)			(IS_HASWELL_ULT(i915) || IS_BROADWELL(i915))
+#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
 #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
 #define HAS_LSPCON(i915)		(IS_DISPLAY_VER(i915, 9, 10))
 #define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
-- 
2.39.5

[PATCH 08/15] drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display

[Jani Nikula]

Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.h    |  2 +-
 drivers/gpu/drm/i915/display/skl_watermark.c   | 18 ++++++++++--------
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index b85b1d3ff708..a0fed40b7779 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -167,7 +167,7 @@ struct intel_display_platforms {
 #define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
 #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
 #define HAS_LSPCON(i915)		(IS_DISPLAY_VER(i915, 9, 10))
-#define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)
 #define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
 #define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
 #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 3b0e87edbacf..83e2cbbfcaf0 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2496,6 +2496,7 @@ static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state *dbuf_state)
 static int
 skl_compute_ddb(struct intel_atomic_state *state)
 {
+	struct intel_display *display = to_intel_display(state);
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 	const struct intel_dbuf_state *old_dbuf_state;
 	struct intel_dbuf_state *new_dbuf_state = NULL;
@@ -2524,7 +2525,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
 			return ret;
 	}
 
-	if (HAS_MBUS_JOINING(i915)) {
+	if (HAS_MBUS_JOINING(display)) {
 		new_dbuf_state->joined_mbus =
 			adlp_check_mbus_joined(new_dbuf_state->active_pipes);
 
@@ -2984,7 +2985,7 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)
 		to_intel_dbuf_state(i915->display.dbuf.obj.state);
 	struct intel_crtc *crtc;
 
-	if (HAS_MBUS_JOINING(i915))
+	if (HAS_MBUS_JOINING(display))
 		dbuf_state->joined_mbus = intel_de_read(i915, MBUS_CTL) & MBUS_JOIN;
 
 	dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
@@ -3562,23 +3563,24 @@ int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
 void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
 					 int ratio, bool joined_mbus)
 {
+	struct intel_display *display = &i915->display;
 	enum dbuf_slice slice;
 
-	if (!HAS_MBUS_JOINING(i915))
+	if (!HAS_MBUS_JOINING(display))
 		return;
 
-	if (DISPLAY_VER(i915) >= 20)
-		intel_de_rmw(i915, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
+	if (DISPLAY_VER(display) >= 20)
+		intel_de_rmw(display, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
 			     MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));
 
 	if (joined_mbus)
 		ratio *= 2;
 
-	drm_dbg_kms(&i915->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
+	drm_dbg_kms(display->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
 		    ratio, str_yes_no(joined_mbus));
 
-	for_each_dbuf_slice(i915, slice)
-		intel_de_rmw(i915, DBUF_CTL_S(slice),
+	for_each_dbuf_slice(display, slice)
+		intel_de_rmw(display, DBUF_CTL_S(slice),
 			     DBUF_MIN_TRACKER_STATE_SERVICE_MASK,
 			     DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
 }
-- 
2.39.5

[PATCH 09/15] drm/i915/display: convert HAS_SAGV() to struct intel_display

[Jani Nikula]

Convert HAS_SAGV() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.h   |  3 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  | 50 +++++++++++--------
 2 files changed, 30 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index a0fed40b7779..c23823769911 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -173,7 +173,8 @@ struct intel_display_platforms {
 #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
 #define HAS_PSR_HW_TRACKING(i915)	(DISPLAY_INFO(i915)->has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(i915)	(DISPLAY_VER(i915) >= 12)
-#define HAS_SAGV(i915)			(DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915) && !IS_GEMINILAKE(i915))
+#define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
+					 !(__display)->platform.broxton && !(__display)->platform.geminilake)
 #define HAS_TRANSCODER(i915, trans)	((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
 					  BIT(trans)) != 0)
 #define HAS_UNCOMPRESSED_JOINER(i915)	(DISPLAY_VER(i915) >= 13)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 83e2cbbfcaf0..09af693da586 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -77,20 +77,23 @@ static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915)
 bool
 intel_has_sagv(struct drm_i915_private *i915)
 {
-	return HAS_SAGV(i915) &&
-		i915->display.sagv.status != I915_SAGV_NOT_CONTROLLED;
+	struct intel_display *display = &i915->display;
+
+	return HAS_SAGV(display) && display->sagv.status != I915_SAGV_NOT_CONTROLLED;
 }
 
 static u32
 intel_sagv_block_time(struct drm_i915_private *i915)
 {
-	if (DISPLAY_VER(i915) >= 14) {
+	struct intel_display *display = &i915->display;
+
+	if (DISPLAY_VER(display) >= 14) {
 		u32 val;
 
-		val = intel_de_read(i915, MTL_LATENCY_SAGV);
+		val = intel_de_read(display, MTL_LATENCY_SAGV);
 
 		return REG_FIELD_GET(MTL_LATENCY_QCLK_SAGV, val);
-	} else if (DISPLAY_VER(i915) >= 12) {
+	} else if (DISPLAY_VER(display) >= 12) {
 		u32 val = 0;
 		int ret;
 
@@ -98,14 +101,14 @@ intel_sagv_block_time(struct drm_i915_private *i915)
 				     GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
 				     &val, NULL);
 		if (ret) {
-			drm_dbg_kms(&i915->drm, "Couldn't read SAGV block time!\n");
+			drm_dbg_kms(display->drm, "Couldn't read SAGV block time!\n");
 			return 0;
 		}
 
 		return val;
-	} else if (DISPLAY_VER(i915) == 11) {
+	} else if (DISPLAY_VER(display) == 11) {
 		return 10;
-	} else if (HAS_SAGV(i915)) {
+	} else if (HAS_SAGV(display)) {
 		return 30;
 	} else {
 		return 0;
@@ -114,31 +117,33 @@ intel_sagv_block_time(struct drm_i915_private *i915)
 
 static void intel_sagv_init(struct drm_i915_private *i915)
 {
-	if (!HAS_SAGV(i915))
-		i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED;
+	struct intel_display *display = &i915->display;
+
+	if (!HAS_SAGV(display))
+		display->sagv.status = I915_SAGV_NOT_CONTROLLED;
 
 	/*
 	 * Probe to see if we have working SAGV control.
 	 * For icl+ this was already determined by intel_bw_init_hw().
 	 */
-	if (DISPLAY_VER(i915) < 11)
+	if (DISPLAY_VER(display) < 11)
 		skl_sagv_disable(i915);
 
-	drm_WARN_ON(&i915->drm, i915->display.sagv.status == I915_SAGV_UNKNOWN);
+	drm_WARN_ON(display->drm, display->sagv.status == I915_SAGV_UNKNOWN);
 
-	i915->display.sagv.block_time_us = intel_sagv_block_time(i915);
+	display->sagv.block_time_us = intel_sagv_block_time(i915);
 
-	drm_dbg_kms(&i915->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
-		    str_yes_no(intel_has_sagv(i915)), i915->display.sagv.block_time_us);
+	drm_dbg_kms(display->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
+		    str_yes_no(intel_has_sagv(i915)), display->sagv.block_time_us);
 
 	/* avoid overflow when adding with wm0 latency/etc. */
-	if (drm_WARN(&i915->drm, i915->display.sagv.block_time_us > U16_MAX,
+	if (drm_WARN(display->drm, display->sagv.block_time_us > U16_MAX,
 		     "Excessive SAGV block time %u, ignoring\n",
-		     i915->display.sagv.block_time_us))
-		i915->display.sagv.block_time_us = 0;
+		     display->sagv.block_time_us))
+		display->sagv.block_time_us = 0;
 
 	if (!intel_has_sagv(i915))
-		i915->display.sagv.block_time_us = 0;
+		display->sagv.block_time_us = 0;
 }
 
 /*
@@ -3832,13 +3837,14 @@ DEFINE_SHOW_ATTRIBUTE(intel_sagv_status);
 
 void skl_watermark_debugfs_register(struct drm_i915_private *i915)
 {
-	struct drm_minor *minor = i915->drm.primary;
+	struct intel_display *display = &i915->display;
+	struct drm_minor *minor = display->drm->primary;
 
-	if (HAS_IPC(i915))
+	if (HAS_IPC(display))
 		debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root, i915,
 				    &skl_watermark_ipc_status_fops);
 
-	if (HAS_SAGV(i915))
+	if (HAS_SAGV(display))
 		debugfs_create_file("i915_sagv_status", 0444, minor->debugfs_root, i915,
 				    &intel_sagv_status_fops);
 }
-- 
2.39.5

[PATCH 10/15] drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_display

[Jani Nikula]

Convert HAS_HW_SAGV_WM() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cursor.c   |  5 ++-
 .../drm/i915/display/intel_display_device.h   |  2 +-
 .../drm/i915/display/skl_universal_plane.c    |  7 ++--
 drivers/gpu/drm/i915/display/skl_watermark.c  | 33 +++++++++++--------
 4 files changed, 25 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 9ba77970dab7..ed88a28a3afa 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -619,7 +619,6 @@ static void skl_write_cursor_wm(struct intel_dsb *dsb,
 				const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(plane->base.dev);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum plane_id plane_id = plane->id;
 	enum pipe pipe = plane->pipe;
 	const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
@@ -627,14 +626,14 @@ static void skl_write_cursor_wm(struct intel_dsb *dsb,
 		&crtc_state->wm.skl.plane_ddb[plane_id];
 	int level;
 
-	for (level = 0; level < i915->display.wm.num_levels; level++)
+	for (level = 0; level < display->wm.num_levels; level++)
 		intel_de_write_dsb(display, dsb, CUR_WM(pipe, level),
 				   skl_cursor_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level)));
 
 	intel_de_write_dsb(display, dsb, CUR_WM_TRANS(pipe),
 			   skl_cursor_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id)));
 
-	if (HAS_HW_SAGV_WM(i915)) {
+	if (HAS_HW_SAGV_WM(display)) {
 		const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id];
 
 		intel_de_write_dsb(display, dsb, CUR_WM_SAGV(pipe),
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index c23823769911..e1e718fced3c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -162,7 +162,7 @@ struct intel_display_platforms {
 #define HAS_GMBUS_IRQ(i915)		(DISPLAY_VER(i915) >= 4)
 #define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
 #define HAS_GMCH(i915)			(DISPLAY_INFO(i915)->has_gmch)
-#define HAS_HW_SAGV_WM(i915)		(DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
+#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)
 #define HAS_IPC(i915)			(DISPLAY_INFO(i915)->has_ipc)
 #define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
 #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 28f7f2405ef3..4c7bcf6806ff 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -736,7 +736,6 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
 			       const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(plane->base.dev);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum plane_id plane_id = plane->id;
 	enum pipe pipe = plane->pipe;
 	const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
@@ -746,14 +745,14 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
 		&crtc_state->wm.skl.plane_ddb_y[plane_id];
 	int level;
 
-	for (level = 0; level < i915->display.wm.num_levels; level++)
+	for (level = 0; level < display->wm.num_levels; level++)
 		intel_de_write_dsb(display, dsb, PLANE_WM(pipe, plane_id, level),
 				   skl_plane_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level)));
 
 	intel_de_write_dsb(display, dsb, PLANE_WM_TRANS(pipe, plane_id),
 			   skl_plane_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id)));
 
-	if (HAS_HW_SAGV_WM(i915)) {
+	if (HAS_HW_SAGV_WM(display)) {
 		const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id];
 
 		intel_de_write_dsb(display, dsb, PLANE_WM_SAGV(pipe, plane_id),
@@ -765,7 +764,7 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
 	intel_de_write_dsb(display, dsb, PLANE_BUF_CFG(pipe, plane_id),
 			   skl_plane_ddb_reg_val(ddb));
 
-	if (DISPLAY_VER(i915) < 11)
+	if (DISPLAY_VER(display) < 11)
 		intel_de_write_dsb(display, dsb, PLANE_NV12_BUF_CFG(pipe, plane_id),
 				   skl_plane_ddb_reg_val(ddb_y));
 }
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 09af693da586..060e0cfcb47f 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -449,6 +449,7 @@ bool intel_can_enable_sagv(struct drm_i915_private *i915,
 
 static int intel_compute_sagv_mask(struct intel_atomic_state *state)
 {
+	struct intel_display *display = to_intel_display(state);
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 	int ret;
 	struct intel_crtc *crtc;
@@ -484,7 +485,7 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state)
 		 * other crtcs can't be allowed to use the more optimal
 		 * normal (ie. non-SAGV) watermarks.
 		 */
-		pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(i915) &&
+		pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(display) &&
 			DISPLAY_VER(i915) >= 12 &&
 			intel_crtc_can_enable_sagv(new_crtc_state);
 
@@ -2748,10 +2749,10 @@ static bool skl_plane_selected_wm_equals(struct intel_plane *plane,
 					 const struct skl_pipe_wm *old_pipe_wm,
 					 const struct skl_pipe_wm *new_pipe_wm)
 {
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
+	struct intel_display *display = to_intel_display(plane);
 	int level;
 
-	for (level = 0; level < i915->display.wm.num_levels; level++) {
+	for (level = 0; level < display->wm.num_levels; level++) {
 		/*
 		 * We don't check uv_wm as the hardware doesn't actually
 		 * use it. It only gets used for calculating the required
@@ -2762,7 +2763,7 @@ static bool skl_plane_selected_wm_equals(struct intel_plane *plane,
 			return false;
 	}
 
-	if (HAS_HW_SAGV_WM(i915)) {
+	if (HAS_HW_SAGV_WM(display)) {
 		const struct skl_plane_wm *old_wm = &old_pipe_wm->planes[plane->id];
 		const struct skl_plane_wm *new_wm = &new_pipe_wm->planes[plane->id];
 
@@ -2937,6 +2938,7 @@ static void skl_wm_level_from_reg_val(u32 val, struct skl_wm_level *level)
 static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
 				     struct skl_pipe_wm *out)
 {
+	struct intel_display *display = to_intel_display(crtc);
 	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 	enum plane_id plane_id;
@@ -2962,7 +2964,7 @@ static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
 
 		skl_wm_level_from_reg_val(val, &wm->trans_wm);
 
-		if (HAS_HW_SAGV_WM(i915)) {
+		if (HAS_HW_SAGV_WM(display)) {
 			if (plane_id != PLANE_CURSOR)
 				val = intel_de_read(i915, PLANE_WM_SAGV(pipe, plane_id));
 			else
@@ -3131,6 +3133,7 @@ static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
 void intel_wm_state_verify(struct intel_atomic_state *state,
 			   struct intel_crtc *crtc)
 {
+	struct intel_display *display = to_intel_display(state);
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 	const struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
@@ -3205,7 +3208,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
 		hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0;
 		sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0;
 
-		if (HAS_HW_SAGV_WM(i915) &&
+		if (HAS_HW_SAGV_WM(display) &&
 		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
 			drm_err(&i915->drm,
 				"[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
@@ -3221,7 +3224,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
 		hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm;
 		sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm;
 
-		if (HAS_HW_SAGV_WM(i915) &&
+		if (HAS_HW_SAGV_WM(display) &&
 		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
 			drm_err(&i915->drm,
 				"[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
@@ -3392,17 +3395,19 @@ static void skl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
 
 static void skl_setup_wm_latency(struct drm_i915_private *i915)
 {
-	if (HAS_HW_SAGV_WM(i915))
-		i915->display.wm.num_levels = 6;
+	struct intel_display *display = &i915->display;
+
+	if (HAS_HW_SAGV_WM(display))
+		display->wm.num_levels = 6;
 	else
-		i915->display.wm.num_levels = 8;
+		display->wm.num_levels = 8;
 
-	if (DISPLAY_VER(i915) >= 14)
-		mtl_read_wm_latency(i915, i915->display.wm.skl_latency);
+	if (DISPLAY_VER(display) >= 14)
+		mtl_read_wm_latency(i915, display->wm.skl_latency);
 	else
-		skl_read_wm_latency(i915, i915->display.wm.skl_latency);
+		skl_read_wm_latency(i915, display->wm.skl_latency);
 
-	intel_print_wm_latency(i915, "Gen9 Plane", i915->display.wm.skl_latency);
+	intel_print_wm_latency(i915, "Gen9 Plane", display->wm.skl_latency);
 }
 
 static const struct intel_wm_funcs skl_wm_funcs = {
-- 
2.39.5

[PATCH 11/15] drm/i915/display: convert HAS_ULTRAJOINER() to struct intel_display

[Jani Nikula]

Convert HAS_ULTRAJOINER() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c         | 10 ++++++----
 drivers/gpu/drm/i915/display/intel_display_debugfs.c |  4 ++--
 drivers/gpu/drm/i915/display/intel_display_device.h  |  6 +++---
 drivers/gpu/drm/i915/display/intel_dp.c              |  5 ++---
 4 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f53611e83502..a3924bbb0d2a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3746,12 +3746,13 @@ static u8 fixup_ultrajoiner_secondary_pipes(u8 ultrajoiner_primary_pipes,
 static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915,
 				      u8 *primary_pipes, u8 *secondary_pipes)
 {
+	struct intel_display *display = &i915->display;
 	struct intel_crtc *crtc;
 
 	*primary_pipes = 0;
 	*secondary_pipes = 0;
 
-	if (!HAS_ULTRAJOINER(i915))
+	if (!HAS_ULTRAJOINER(display))
 		return;
 
 	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc,
@@ -8310,11 +8311,12 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
 
 static int max_dotclock(struct drm_i915_private *i915)
 {
-	int max_dotclock = i915->display.cdclk.max_dotclk_freq;
+	struct intel_display *display = &i915->display;
+	int max_dotclock = display->cdclk.max_dotclk_freq;
 
-	if (HAS_ULTRAJOINER(i915))
+	if (HAS_ULTRAJOINER(display))
 		max_dotclock *= 4;
-	else if (HAS_UNCOMPRESSED_JOINER(i915) || HAS_BIGJOINER(i915))
+	else if (HAS_UNCOMPRESSED_JOINER(display) || HAS_BIGJOINER(display))
 		max_dotclock *= 2;
 
 	return max_dotclock;
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 11aff485d8fa..2874867aae2b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1331,7 +1331,7 @@ static ssize_t i915_joiner_write(struct file *file,
 {
 	struct seq_file *m = file->private_data;
 	struct intel_connector *connector = m->private;
-	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct intel_display *display = to_intel_display(connector);
 	int force_joined_pipes = 0;
 	int ret;
 
@@ -1349,7 +1349,7 @@ static ssize_t i915_joiner_write(struct file *file,
 		connector->force_joined_pipes = force_joined_pipes;
 		break;
 	case 4:
-		if (HAS_ULTRAJOINER(i915)) {
+		if (HAS_ULTRAJOINER(display)) {
 			connector->force_joined_pipes = force_joined_pipes;
 			break;
 		}
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index e1e718fced3c..548256401d0a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -178,9 +178,9 @@ struct intel_display_platforms {
 #define HAS_TRANSCODER(i915, trans)	((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
 					  BIT(trans)) != 0)
 #define HAS_UNCOMPRESSED_JOINER(i915)	(DISPLAY_VER(i915) >= 13)
-#define HAS_ULTRAJOINER(i915)		((DISPLAY_VER(i915) >= 20 || \
-					  (IS_DGFX(i915) && DISPLAY_VER(i915) == 14)) && \
-					 HAS_DSC(i915))
+#define HAS_ULTRAJOINER(__display)	((DISPLAY_VER(__display) >= 20 || \
+					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
+					 HAS_DSC(__display))
 #define HAS_VRR(i915)			(DISPLAY_VER(i915) >= 11)
 #define HAS_AS_SDP(i915)		(DISPLAY_VER(i915) >= 13)
 #define HAS_CMRR(i915)			(DISPLAY_VER(i915) >= 20)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a27da96d2c60..7d65945c9563 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1333,16 +1333,15 @@ int intel_dp_num_joined_pipes(struct intel_dp *intel_dp,
 			      int hdisplay, int clock)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	if (connector->force_joined_pipes)
 		return connector->force_joined_pipes;
 
-	if (HAS_ULTRAJOINER(i915) &&
+	if (HAS_ULTRAJOINER(display) &&
 	    intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 4))
 		return 4;
 
-	if ((HAS_BIGJOINER(i915) || HAS_UNCOMPRESSED_JOINER(i915)) &&
+	if ((HAS_BIGJOINER(display) || HAS_UNCOMPRESSED_JOINER(display)) &&
 	    intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 2))
 		return 2;
 
-- 
2.39.5

[PATCH 12/15] drm/i915/display: rename i915 parameter to __display in feature helpers

[Jani Nikula]

All the feature check helpers now support (and some require) passing
struct intel_display. Rename the parameter to __display to reflect the
fact.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.h   | 112 +++++++++---------
 1 file changed, 56 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 548256401d0a..48f32280145f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -139,61 +139,61 @@ struct intel_display_platforms {
 	func(supports_tv);
 
 #define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
-#define HAS_ASYNC_FLIPS(i915)		(DISPLAY_VER(i915) >= 5)
-#define HAS_BIGJOINER(i915)		(DISPLAY_VER(i915) >= 11 && HAS_DSC(i915))
-#define HAS_CDCLK_CRAWL(i915)		(DISPLAY_INFO(i915)->has_cdclk_crawl)
-#define HAS_CDCLK_SQUASH(i915)		(DISPLAY_INFO(i915)->has_cdclk_squash)
-#define HAS_CUR_FBC(i915)		(!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13))
+#define HAS_ASYNC_FLIPS(__display)	(DISPLAY_VER(__display) >= 5)
+#define HAS_BIGJOINER(__display)	(DISPLAY_VER(__display) >= 11 && HAS_DSC(__display))
+#define HAS_CDCLK_CRAWL(__display)	(DISPLAY_INFO(__display)->has_cdclk_crawl)
+#define HAS_CDCLK_SQUASH(__display)	(DISPLAY_INFO(__display)->has_cdclk_squash)
+#define HAS_CUR_FBC(__display)		(!HAS_GMCH(__display) && IS_DISPLAY_VER(__display, 7, 13))
 #define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)
-#define HAS_DBUF_OVERLAP_DETECTION(__i915) (DISPLAY_RUNTIME_INFO(__i915)->has_dbuf_overlap_detection)
-#define HAS_DDI(i915)			(DISPLAY_INFO(i915)->has_ddi)
-#define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
-#define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
+#define HAS_DBUF_OVERLAP_DETECTION(__display)	(DISPLAY_RUNTIME_INFO(__display)->has_dbuf_overlap_detection)
+#define HAS_DDI(__display)		(DISPLAY_INFO(__display)->has_ddi)
+#define HAS_DISPLAY(__display)		(DISPLAY_RUNTIME_INFO(__display)->pipe_mask != 0)
+#define HAS_DMC(__display)		(DISPLAY_RUNTIME_INFO(__display)->has_dmc)
 #define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
-#define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
+#define HAS_DP_MST(__display)		(DISPLAY_INFO(__display)->has_dp_mst)
 #define HAS_DP20(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
-#define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)
-#define HAS_DSB(i915)			(DISPLAY_INFO(i915)->has_dsb)
-#define HAS_DSC(__i915)			(DISPLAY_RUNTIME_INFO(__i915)->has_dsc)
-#define HAS_DSC_MST(__i915)		(DISPLAY_VER(__i915) >= 12 && HAS_DSC(__i915))
-#define HAS_FBC(i915)			(DISPLAY_RUNTIME_INFO(i915)->fbc_mask != 0)
-#define HAS_FPGA_DBG_UNCLAIMED(i915)	(DISPLAY_INFO(i915)->has_fpga_dbg)
-#define HAS_FW_BLC(i915)		(DISPLAY_VER(i915) >= 3)
-#define HAS_GMBUS_IRQ(i915)		(DISPLAY_VER(i915) >= 4)
+#define HAS_DPT(__display)		(DISPLAY_VER(__display) >= 13)
+#define HAS_DSB(__display)		(DISPLAY_INFO(__display)->has_dsb)
+#define HAS_DSC(__display)		(DISPLAY_RUNTIME_INFO(__display)->has_dsc)
+#define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
+#define HAS_FBC(__display)		(DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
+#define HAS_FPGA_DBG_UNCLAIMED(__display)	(DISPLAY_INFO(__display)->has_fpga_dbg)
+#define HAS_FW_BLC(__display)		(DISPLAY_VER(__display) >= 3)
+#define HAS_GMBUS_IRQ(__display)	(DISPLAY_VER(__display) >= 4)
 #define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
-#define HAS_GMCH(i915)			(DISPLAY_INFO(i915)->has_gmch)
+#define HAS_GMCH(__display)		(DISPLAY_INFO(__display)->has_gmch)
 #define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)
-#define HAS_IPC(i915)			(DISPLAY_INFO(i915)->has_ipc)
+#define HAS_IPC(__display)		(DISPLAY_INFO(__display)->has_ipc)
 #define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
-#define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
-#define HAS_LSPCON(i915)		(IS_DISPLAY_VER(i915, 9, 10))
+#define HAS_LRR(__display)		(DISPLAY_VER(__display) >= 12)
+#define HAS_LSPCON(__display)		(IS_DISPLAY_VER(__display, 9, 10))
 #define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)
-#define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
-#define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
-#define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
-#define HAS_PSR_HW_TRACKING(i915)	(DISPLAY_INFO(i915)->has_psr_hw_tracking)
-#define HAS_PSR2_SEL_FETCH(i915)	(DISPLAY_VER(i915) >= 12)
+#define HAS_MSO(__display)		(DISPLAY_VER(__display) >= 12)
+#define HAS_OVERLAY(__display)		(DISPLAY_INFO(__display)->has_overlay)
+#define HAS_PSR(__display)		(DISPLAY_INFO(__display)->has_psr)
+#define HAS_PSR_HW_TRACKING(__display)	(DISPLAY_INFO(__display)->has_psr_hw_tracking)
+#define HAS_PSR2_SEL_FETCH(__display)	(DISPLAY_VER(__display) >= 12)
 #define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
 					 !(__display)->platform.broxton && !(__display)->platform.geminilake)
-#define HAS_TRANSCODER(i915, trans)	((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
-					  BIT(trans)) != 0)
-#define HAS_UNCOMPRESSED_JOINER(i915)	(DISPLAY_VER(i915) >= 13)
+#define HAS_TRANSCODER(__display, trans)	((DISPLAY_RUNTIME_INFO(__display)->cpu_transcoder_mask & \
+						  BIT(trans)) != 0)
+#define HAS_UNCOMPRESSED_JOINER(__display)	(DISPLAY_VER(__display) >= 13)
 #define HAS_ULTRAJOINER(__display)	((DISPLAY_VER(__display) >= 20 || \
 					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
 					 HAS_DSC(__display))
-#define HAS_VRR(i915)			(DISPLAY_VER(i915) >= 11)
-#define HAS_AS_SDP(i915)		(DISPLAY_VER(i915) >= 13)
-#define HAS_CMRR(i915)			(DISPLAY_VER(i915) >= 20)
-#define INTEL_NUM_PIPES(i915)		(hweight8(DISPLAY_RUNTIME_INFO(i915)->pipe_mask))
-#define I915_HAS_HOTPLUG(i915)		(DISPLAY_INFO(i915)->has_hotplug)
-#define OVERLAY_NEEDS_PHYSICAL(i915)	(DISPLAY_INFO(i915)->overlay_needs_physical)
-#define SUPPORTS_TV(i915)		(DISPLAY_INFO(i915)->supports_tv)
+#define HAS_VRR(__display)		(DISPLAY_VER(__display) >= 11)
+#define HAS_AS_SDP(__display)		(DISPLAY_VER(__display) >= 13)
+#define HAS_CMRR(__display)		(DISPLAY_VER(__display) >= 20)
+#define INTEL_NUM_PIPES(__display)	(hweight8(DISPLAY_RUNTIME_INFO(__display)->pipe_mask))
+#define I915_HAS_HOTPLUG(__display)	(DISPLAY_INFO(__display)->has_hotplug)
+#define OVERLAY_NEEDS_PHYSICAL(__display)	(DISPLAY_INFO(__display)->overlay_needs_physical)
+#define SUPPORTS_TV(__display)		(DISPLAY_INFO(__display)->supports_tv)
 
 /* Check that device has a display IP version within the specific range. */
-#define IS_DISPLAY_VERx100(__i915, from, until) ( \
+#define IS_DISPLAY_VERx100(__display, from, until) ( \
 	BUILD_BUG_ON_ZERO((from) < 200) + \
-	(DISPLAY_VERx100(__i915) >= (from) && \
-	 DISPLAY_VERx100(__i915) <= (until)))
+	(DISPLAY_VERx100(__display) >= (from) && \
+	 DISPLAY_VERx100(__display) <= (until)))
 
 /*
  * Check if a device has a specific IP version as well as a stepping within the
@@ -204,30 +204,30 @@ struct intel_display_platforms {
  * hardware fix is present and the software workaround is no longer necessary.
  * E.g.,
  *
- *    IS_DISPLAY_VERx100_STEP(i915, 1400, STEP_A0, STEP_B2)
- *    IS_DISPLAY_VERx100_STEP(i915, 1400, STEP_C0, STEP_FOREVER)
+ *    IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_B2)
+ *    IS_DISPLAY_VERx100_STEP(display, 1400, STEP_C0, STEP_FOREVER)
  *
  * "STEP_FOREVER" can be passed as "until" for workarounds that have no upper
  * stepping bound for the specified IP version.
  */
-#define IS_DISPLAY_VERx100_STEP(__i915, ipver, from, until) \
-	(IS_DISPLAY_VERx100((__i915), (ipver), (ipver)) && \
-	 IS_DISPLAY_STEP((__i915), (from), (until)))
+#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
+	(IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
+	 IS_DISPLAY_STEP((__display), (from), (until)))
 
-#define DISPLAY_INFO(i915)		(__to_intel_display(i915)->info.__device_info)
-#define DISPLAY_RUNTIME_INFO(i915)	(&__to_intel_display(i915)->info.__runtime_info)
+#define DISPLAY_INFO(__display)		(__to_intel_display(__display)->info.__device_info)
+#define DISPLAY_RUNTIME_INFO(__display)	(&__to_intel_display(__display)->info.__runtime_info)
 
-#define DISPLAY_VER(i915)	(DISPLAY_RUNTIME_INFO(i915)->ip.ver)
-#define DISPLAY_VERx100(i915)	(DISPLAY_RUNTIME_INFO(i915)->ip.ver * 100 + \
-				 DISPLAY_RUNTIME_INFO(i915)->ip.rel)
-#define IS_DISPLAY_VER(i915, from, until) \
-	(DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
+#define DISPLAY_VER(__display)		(DISPLAY_RUNTIME_INFO(__display)->ip.ver)
+#define DISPLAY_VERx100(__display)	(DISPLAY_RUNTIME_INFO(__display)->ip.ver * 100 + \
+					 DISPLAY_RUNTIME_INFO(__display)->ip.rel)
+#define IS_DISPLAY_VER(__display, from, until) \
+	(DISPLAY_VER(__display) >= (from) && DISPLAY_VER(__display) <= (until))
 
-#define INTEL_DISPLAY_STEP(__i915) (DISPLAY_RUNTIME_INFO(__i915)->step)
+#define INTEL_DISPLAY_STEP(__display)	(DISPLAY_RUNTIME_INFO(__display)->step)
 
-#define IS_DISPLAY_STEP(__i915, since, until) \
-	(drm_WARN_ON(__to_intel_display(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
-	 INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) < (until))
+#define IS_DISPLAY_STEP(__display, since, until) \
+	(drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) == STEP_NONE), \
+	 INTEL_DISPLAY_STEP(__display) >= (since) && INTEL_DISPLAY_STEP(__display) < (until))
 
 struct intel_display_runtime_info {
 	struct intel_display_ip_ver {
-- 
2.39.5

[PATCH 13/15] drm/i915/display: convert display device identification to struct intel_display

[Jani Nikula]

Convert intel_display_device.[ch] to struct intel_display, including
callers, but excluding intel_display_device_probe() which will be
handled in follow-up.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
 .../drm/i915/display/intel_display_device.c   | 156 +++++++++---------
 .../drm/i915/display/intel_display_device.h   |   7 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |   3 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +-
 drivers/gpu/drm/i915/display/intel_dvo.c      |   3 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |   2 +-
 drivers/gpu/drm/i915/display/intel_hotplug.c  |   4 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |   3 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c     |   3 +-
 drivers/gpu/drm/i915/display/intel_tv.c       |   2 +-
 drivers/gpu/drm/i915/i915_driver.c            |   6 +-
 drivers/gpu/drm/xe/display/xe_display.c       |   9 +-
 13 files changed, 108 insertions(+), 95 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 74c1983fe07e..06341baaef42 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -865,7 +865,7 @@ intel_crt_detect(struct drm_connector *connector,
 		    connector->base.id, connector->name,
 		    force);
 
-	if (!intel_display_device_enabled(dev_priv))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 1e561df02751..aabf6ece40c4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1432,9 +1432,9 @@ static const struct {
 };
 
 static const struct intel_display_device_info *
-probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *ip_ver)
+probe_gmdid_display(struct intel_display *display, struct intel_display_ip_ver *ip_ver)
 {
-	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
 	struct intel_display_ip_ver gmd_id;
 	void __iomem *addr;
 	u32 val;
@@ -1442,7 +1442,8 @@ probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *
 
 	addr = pci_iomap_range(pdev, 0, i915_mmio_reg_offset(GMD_ID_DISPLAY), sizeof(u32));
 	if (!addr) {
-		drm_err(&i915->drm, "Cannot map MMIO BAR to read display GMD_ID\n");
+		drm_err(display->drm,
+			"Cannot map MMIO BAR to read display GMD_ID\n");
 		return NULL;
 	}
 
@@ -1450,7 +1451,7 @@ probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *
 	pci_iounmap(pdev, addr);
 
 	if (val == 0) {
-		drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
+		drm_dbg_kms(display->drm, "Device doesn't have display\n");
 		return NULL;
 	}
 
@@ -1466,7 +1467,8 @@ probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *
 		}
 	}
 
-	drm_err(&i915->drm, "Unrecognized display IP version %d.%02d; disabling display.\n",
+	drm_err(display->drm,
+		"Unrecognized display IP version %d.%02d; disabling display.\n",
 		gmd_id.ver, gmd_id.rel);
 	return NULL;
 }
@@ -1578,55 +1580,56 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 	enum intel_step step;
 
 	/* Add drm device backpointer as early as possible. */
-	i915->display.drm = &i915->drm;
+	display->drm = display->drm;
 
-	intel_display_params_copy(&i915->display.params);
+	intel_display_params_copy(&display->params);
 
 	if (has_no_display(pdev)) {
-		drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
+		drm_dbg_kms(display->drm, "Device doesn't have display\n");
 		goto no_display;
 	}
 
 	desc = find_platform_desc(pdev);
 	if (!desc) {
-		drm_dbg_kms(&i915->drm, "Unknown device ID %04x; disabling display.\n",
+		drm_dbg_kms(display->drm,
+			    "Unknown device ID %04x; disabling display.\n",
 			    pdev->device);
 		goto no_display;
 	}
 
 	info = desc->info;
 	if (!info)
-		info = probe_gmdid_display(i915, &ip_ver);
+		info = probe_gmdid_display(display, &ip_ver);
 	if (!info)
 		goto no_display;
 
-	DISPLAY_INFO(i915) = info;
+	DISPLAY_INFO(display) = info;
 
-	memcpy(DISPLAY_RUNTIME_INFO(i915),
-	       &DISPLAY_INFO(i915)->__runtime_defaults,
-	       sizeof(*DISPLAY_RUNTIME_INFO(i915)));
+	memcpy(DISPLAY_RUNTIME_INFO(display),
+	       &DISPLAY_INFO(display)->__runtime_defaults,
+	       sizeof(*DISPLAY_RUNTIME_INFO(display)));
 
-	drm_WARN_ON(&i915->drm, !desc->name ||
+	drm_WARN_ON(display->drm, !desc->name ||
 		    !display_platforms_weight(&desc->platforms));
 
 	display->platform = desc->platforms;
 
 	subdesc = find_subplatform_desc(pdev, desc);
 	if (subdesc) {
-		drm_WARN_ON(&i915->drm, !subdesc->name ||
+		drm_WARN_ON(display->drm, !subdesc->name ||
 			    !display_platforms_weight(&subdesc->platforms));
 
 		display_platforms_or(&display->platform, &subdesc->platforms);
 
 		/* Ensure platform and subplatform are distinct */
-		drm_WARN_ON(&i915->drm,
+		drm_WARN_ON(display->drm,
 			    display_platforms_weight(&display->platform) !=
 			    display_platforms_weight(&desc->platforms) +
 			    display_platforms_weight(&subdesc->platforms));
 	}
 
 	if (ip_ver.ver || ip_ver.rel || ip_ver.step) {
-		DISPLAY_RUNTIME_INFO(i915)->ip = ip_ver;
+		DISPLAY_RUNTIME_INFO(display)->ip = ip_ver;
 		step = STEP_A0 + ip_ver.step;
 		if (step > STEP_FUTURE) {
 			drm_dbg_kms(display->drm, "Using future display stepping\n");
@@ -1637,30 +1640,30 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 					  subdesc ? &subdesc->step_info : NULL);
 	}
 
-	DISPLAY_RUNTIME_INFO(i915)->step = step;
+	DISPLAY_RUNTIME_INFO(display)->step = step;
 
-	drm_info(&i915->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping %s\n",
+	drm_info(display->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping %s\n",
 		 desc->name, subdesc ? "/" : "", subdesc ? subdesc->name : "",
 		 pdev->device, display->platform.dgfx ? "discrete" : "integrated",
-		 DISPLAY_RUNTIME_INFO(i915)->ip.ver,
-		 DISPLAY_RUNTIME_INFO(i915)->ip.rel,
+		 DISPLAY_RUNTIME_INFO(display)->ip.ver,
+		 DISPLAY_RUNTIME_INFO(display)->ip.rel,
 		 step != STEP_NONE ? intel_step_name(step) : "N/A");
 
 	return;
 
 no_display:
-	DISPLAY_INFO(i915) = &no_display;
+	DISPLAY_INFO(display) = &no_display;
 }
 
-void intel_display_device_remove(struct drm_i915_private *i915)
+void intel_display_device_remove(struct intel_display *display)
 {
-	intel_display_params_free(&i915->display.params);
+	intel_display_params_free(&display->params);
 }
 
-static void __intel_display_device_info_runtime_init(struct drm_i915_private *i915)
+static void __intel_display_device_info_runtime_init(struct intel_display *display)
 {
-	struct intel_display *display = &i915->display;
-	struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(i915);
+	struct drm_i915_private *i915 = to_i915(display->drm);
+	struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(display);
 	enum pipe pipe;
 
 	BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->pipe_mask) < I915_MAX_PIPES);
@@ -1668,35 +1671,35 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 	BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->port_mask) < I915_MAX_PORTS);
 
 	/* This covers both ULT and ULX */
-	if (IS_HASWELL_ULT(i915) || IS_BROADWELL_ULT(i915))
+	if (display->platform.haswell_ult || display->platform.broadwell_ult)
 		display_runtime->port_mask &= ~BIT(PORT_D);
 
-	if (IS_ICL_WITH_PORT_F(i915))
+	if (display->platform.icelake_port_f)
 		display_runtime->port_mask |= BIT(PORT_F);
 
 	/* Wa_14011765242: adl-s A0,A1 */
-	if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
-		for_each_pipe(i915, pipe)
+	if (display->platform.alderlake_s && IS_DISPLAY_STEP(display, STEP_A0, STEP_A2))
+		for_each_pipe(display, pipe)
 			display_runtime->num_scalers[pipe] = 0;
-	else if (DISPLAY_VER(i915) >= 11) {
-		for_each_pipe(i915, pipe)
+	else if (DISPLAY_VER(display) >= 11) {
+		for_each_pipe(display, pipe)
 			display_runtime->num_scalers[pipe] = 2;
-	} else if (DISPLAY_VER(i915) >= 9) {
+	} else if (DISPLAY_VER(display) >= 9) {
 		display_runtime->num_scalers[PIPE_A] = 2;
 		display_runtime->num_scalers[PIPE_B] = 2;
 		display_runtime->num_scalers[PIPE_C] = 1;
 	}
 
-	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
-		for_each_pipe(i915, pipe)
+	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 4;
-	else if (DISPLAY_VER(i915) >= 11)
-		for_each_pipe(i915, pipe)
+	else if (DISPLAY_VER(display) >= 11)
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 6;
-	else if (DISPLAY_VER(i915) == 10)
-		for_each_pipe(i915, pipe)
+	else if (DISPLAY_VER(display) == 10)
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 3;
-	else if (IS_BROXTON(i915)) {
+	else if (display->platform.broxton) {
 		/*
 		 * Skylake and Broxton currently don't expose the topmost plane as its
 		 * use is exclusive with the legacy cursor and we only want to expose
@@ -1709,23 +1712,23 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 		display_runtime->num_sprites[PIPE_A] = 2;
 		display_runtime->num_sprites[PIPE_B] = 2;
 		display_runtime->num_sprites[PIPE_C] = 1;
-	} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
-		for_each_pipe(i915, pipe)
+	} else if (display->platform.valleyview || display->platform.cherryview) {
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 2;
-	} else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915)) {
-		for_each_pipe(i915, pipe)
+	} else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) {
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 1;
 	}
 
-	if ((IS_DGFX(i915) || DISPLAY_VER(i915) >= 14) &&
-	    !(intel_de_read(i915, GU_CNTL_PROTECTED) & DEPRESENT)) {
-		drm_info(&i915->drm, "Display not present, disabling\n");
+	if ((display->platform.dgfx || DISPLAY_VER(display) >= 14) &&
+	    !(intel_de_read(display, GU_CNTL_PROTECTED) & DEPRESENT)) {
+		drm_info(display->drm, "Display not present, disabling\n");
 		goto display_fused_off;
 	}
 
-	if (IS_DISPLAY_VER(i915, 7, 8) && HAS_PCH_SPLIT(i915)) {
-		u32 fuse_strap = intel_de_read(i915, FUSE_STRAP);
-		u32 sfuse_strap = intel_de_read(i915, SFUSE_STRAP);
+	if (IS_DISPLAY_VER(display, 7, 8) && HAS_PCH_SPLIT(i915)) {
+		u32 fuse_strap = intel_de_read(display, FUSE_STRAP);
+		u32 sfuse_strap = intel_de_read(display, SFUSE_STRAP);
 
 		/*
 		 * SFUSE_STRAP is supposed to have a bit signalling the display
@@ -1740,16 +1743,16 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 		    sfuse_strap & SFUSE_STRAP_DISPLAY_DISABLED ||
 		    (HAS_PCH_CPT(i915) &&
 		     !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
-			drm_info(&i915->drm,
+			drm_info(display->drm,
 				 "Display fused off, disabling\n");
 			goto display_fused_off;
 		} else if (fuse_strap & IVB_PIPE_C_DISABLE) {
-			drm_info(&i915->drm, "PipeC fused off\n");
+			drm_info(display->drm, "PipeC fused off\n");
 			display_runtime->pipe_mask &= ~BIT(PIPE_C);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
 		}
-	} else if (DISPLAY_VER(i915) >= 9) {
-		u32 dfsm = intel_de_read(i915, SKL_DFSM);
+	} else if (DISPLAY_VER(display) >= 9) {
+		u32 dfsm = intel_de_read(display, SKL_DFSM);
 
 		if (dfsm & SKL_DFSM_PIPE_A_DISABLE) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_A);
@@ -1767,7 +1770,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_C);
 		}
 
-		if (DISPLAY_VER(i915) >= 12 &&
+		if (DISPLAY_VER(display) >= 12 &&
 		    (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_D);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
@@ -1780,15 +1783,15 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 		if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
 			display_runtime->has_hdcp = 0;
 
-		if (IS_DG2(i915) || DISPLAY_VER(i915) < 13) {
+		if (display->platform.dg2 || DISPLAY_VER(display) < 13) {
 			if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
 				display_runtime->fbc_mask = 0;
 		}
 
-		if (DISPLAY_VER(i915) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
+		if (DISPLAY_VER(display) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
 			display_runtime->has_dmc = 0;
 
-		if (IS_DISPLAY_VER(i915, 10, 12) &&
+		if (IS_DISPLAY_VER(display, 10, 12) &&
 		    (dfsm & GLK_DFSM_DISPLAY_DSC_DISABLE))
 			display_runtime->has_dsc = 0;
 
@@ -1797,8 +1800,8 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 			display_runtime->has_dbuf_overlap_detection = false;
 	}
 
-	if (DISPLAY_VER(i915) >= 20) {
-		u32 cap = intel_de_read(i915, XE2LPD_DE_CAP);
+	if (DISPLAY_VER(display) >= 20) {
+		u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
 
 		if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
 		    XE2LPD_DE_CAP_DSC_REMOVED)
@@ -1806,18 +1809,19 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 
 		if (REG_FIELD_GET(XE2LPD_DE_CAP_SCALER_MASK, cap) ==
 		    XE2LPD_DE_CAP_SCALER_SINGLE) {
-			for_each_pipe(i915, pipe)
+			for_each_pipe(display, pipe)
 				if (display_runtime->num_scalers[pipe])
 					display_runtime->num_scalers[pipe] = 1;
 		}
 	}
 
-	if (DISPLAY_VER(i915) >= 30)
+	if (DISPLAY_VER(display) >= 30)
 		display_runtime->edp_typec_support =
 			intel_de_read(display, PICA_PHY_CONFIG_CONTROL) & EDP_ON_TYPEC;
 
 	display_runtime->rawclk_freq = intel_read_rawclk(display);
-	drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", display_runtime->rawclk_freq);
+	drm_dbg_kms(display->drm, "rawclk rate: %d kHz\n",
+		    display_runtime->rawclk_freq);
 
 	return;
 
@@ -1825,21 +1829,21 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 	memset(display_runtime, 0, sizeof(*display_runtime));
 }
 
-void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
+void intel_display_device_info_runtime_init(struct intel_display *display)
 {
-	if (HAS_DISPLAY(i915))
-		__intel_display_device_info_runtime_init(i915);
+	if (HAS_DISPLAY(display))
+		__intel_display_device_info_runtime_init(display);
 
 	/* Display may have been disabled by runtime init */
-	if (!HAS_DISPLAY(i915)) {
-		i915->drm.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
-		i915->display.info.__device_info = &no_display;
+	if (!HAS_DISPLAY(display)) {
+		display->drm->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
+		display->info.__device_info = &no_display;
 	}
 
 	/* Disable nuclear pageflip by default on pre-g4x */
-	if (!i915->display.params.nuclear_pageflip &&
-	    DISPLAY_VER(i915) < 5 && !IS_G4X(i915))
-		i915->drm.driver_features &= ~DRIVER_ATOMIC;
+	if (!display->params.nuclear_pageflip &&
+	    DISPLAY_VER(display) < 5 && !display->platform.g4x)
+		display->drm->driver_features &= ~DRIVER_ATOMIC;
 }
 
 void intel_display_device_info_print(const struct intel_display_device_info *info,
@@ -1876,10 +1880,8 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
  * Disabling display means taking over the display hardware, putting it to
  * sleep, and preventing connectors from being connected via any means.
  */
-bool intel_display_device_enabled(struct drm_i915_private *i915)
+bool intel_display_device_enabled(struct intel_display *display)
 {
-	struct intel_display *display = &i915->display;
-
 	/* Only valid when HAS_DISPLAY() is true */
 	drm_WARN_ON(display->drm, !HAS_DISPLAY(display));
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 48f32280145f..01e3cc0fde4b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -14,6 +14,7 @@
 
 struct drm_i915_private;
 struct drm_printer;
+struct intel_display;
 
 /*
  * Display platforms and subplatforms. Keep platforms in display version based
@@ -286,10 +287,10 @@ struct intel_display_device_info {
 	} color;
 };
 
-bool intel_display_device_enabled(struct drm_i915_private *i915);
+bool intel_display_device_enabled(struct intel_display *display);
 void intel_display_device_probe(struct drm_i915_private *i915);
-void intel_display_device_remove(struct drm_i915_private *i915);
-void intel_display_device_info_runtime_init(struct drm_i915_private *i915);
+void intel_display_device_remove(struct intel_display *display);
+void intel_display_device_info_runtime_init(struct intel_display *display);
 
 void intel_display_device_info_print(const struct intel_display_device_info *info,
 				     const struct intel_display_runtime_info *runtime,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7d65945c9563..8debc0792d24 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5607,6 +5607,7 @@ intel_dp_detect(struct drm_connector *connector,
 		struct drm_modeset_acquire_ctx *ctx,
 		bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *dev_priv = to_i915(connector->dev);
 	struct intel_connector *intel_connector =
 		to_intel_connector(connector);
@@ -5621,7 +5622,7 @@ intel_dp_detect(struct drm_connector *connector,
 	drm_WARN_ON(&dev_priv->drm,
 		    !drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
 
-	if (!intel_display_device_enabled(dev_priv))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 5bba078c00d8..ebe1ac100aab 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1560,11 +1560,12 @@ static int
 intel_dp_mst_detect(struct drm_connector *connector,
 		    struct drm_modeset_acquire_ctx *ctx, bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 	struct intel_connector *intel_connector = to_intel_connector(connector);
 	struct intel_dp *intel_dp = intel_connector->mst_port;
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (drm_connector_is_unregistered(connector))
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index 2d5ffb37eac9..93a9af67ca47 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -318,6 +318,7 @@ static void intel_dvo_pre_enable(struct intel_atomic_state *state,
 static enum drm_connector_status
 intel_dvo_detect(struct drm_connector *_connector, bool force)
 {
+	struct intel_display *display = to_intel_display(_connector->dev);
 	struct intel_connector *connector = to_intel_connector(_connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
@@ -325,7 +326,7 @@ intel_dvo_detect(struct drm_connector *_connector, bool force)
 	drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.base.id, connector->base.name);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index c6ce6bb88d7c..23c270a8c4aa 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2556,7 +2556,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.id, connector->name);
 
-	if (!intel_display_device_enabled(dev_priv))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index a013b0e0ef54..3adc791d3776 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -813,8 +813,10 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
  */
 void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
 {
+	struct intel_display *display = &dev_priv->display;
+
 	if (!HAS_DISPLAY(dev_priv) ||
-	    !intel_display_device_enabled(dev_priv))
+	    !intel_display_device_enabled(display))
 		return;
 
 	WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, true);
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 313bd3f35ace..fdf9ef88a775 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -383,9 +383,10 @@ void intel_panel_add_encoder_fixed_mode(struct intel_connector *connector,
 enum drm_connector_status
 intel_panel_detect(struct drm_connector *connector, bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 7a28104f68ad..df855bf3ecec 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2136,6 +2136,7 @@ intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
 static enum drm_connector_status
 intel_sdvo_detect(struct drm_connector *connector, bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
 	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
@@ -2145,7 +2146,7 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
 	drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.id, connector->name);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index bfd16054ca05..ece16fc50429 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1722,7 +1722,7 @@ intel_tv_detect(struct drm_connector *connector,
 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",
 		    connector->base.id, connector->name, force);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 365329ff8a07..596aaf940d0c 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -307,6 +307,7 @@ static void i915_driver_late_release(struct drm_i915_private *dev_priv)
  */
 static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 {
+	struct intel_display *display = &dev_priv->display;
 	struct intel_gt *gt;
 	int ret, i;
 
@@ -332,7 +333,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 	/* Try to make sure MCHBAR is enabled before poking at it */
 	intel_gmch_bar_setup(dev_priv);
 	intel_device_info_runtime_init(dev_priv);
-	intel_display_device_info_runtime_init(dev_priv);
+	intel_display_device_info_runtime_init(display);
 
 	for_each_gt(gt, dev_priv, i) {
 		ret = intel_gt_init_mmio(gt);
@@ -883,6 +884,7 @@ void i915_driver_remove(struct drm_i915_private *i915)
 static void i915_driver_release(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct intel_display *display = &dev_priv->display;
 	struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
 	intel_wakeref_t wakeref;
 
@@ -906,7 +908,7 @@ static void i915_driver_release(struct drm_device *dev)
 
 	i915_driver_late_release(dev_priv);
 
-	intel_display_device_remove(dev_priv);
+	intel_display_device_remove(display);
 }
 
 static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index b5502f335f53..9b8acf2074e0 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -157,7 +157,7 @@ int xe_display_init_noirq(struct xe_device *xe)
 
 	intel_bw_init_hw(xe);
 
-	intel_display_device_info_runtime_init(xe);
+	intel_display_device_info_runtime_init(display);
 
 	err = intel_display_driver_probe_noirq(xe);
 	if (err) {
@@ -495,13 +495,14 @@ void xe_display_pm_runtime_resume(struct xe_device *xe)
 
 static void display_device_remove(struct drm_device *dev, void *arg)
 {
-	struct xe_device *xe = arg;
+	struct intel_display *display = arg;
 
-	intel_display_device_remove(xe);
+	intel_display_device_remove(display);
 }
 
 int xe_display_probe(struct xe_device *xe)
 {
+	struct intel_display *display = &xe->display;
 	int err;
 
 	if (!xe->info.probe_display)
@@ -509,7 +510,7 @@ int xe_display_probe(struct xe_device *xe)
 
 	intel_display_device_probe(xe);
 
-	err = drmm_add_action_or_reset(&xe->drm, display_device_remove, xe);
+	err = drmm_add_action_or_reset(&xe->drm, display_device_remove, display);
 	if (err)
 		return err;
 
-- 
2.39.5

[PATCH 14/15] drm/i915/display: pass struct pci_dev * to intel_display_device_probe()

[Jani Nikula]

Convert intel_display_device_probe() to accept struct pci_dev * instead
of struct drm_i915_private *. Return struct intel_display * in
preparation of allocating the memory of it later.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 10 ++++++----
 drivers/gpu/drm/i915/display/intel_display_device.h |  4 ++--
 drivers/gpu/drm/i915/i915_driver.c                  |  2 +-
 drivers/gpu/drm/i915/selftests/mock_gem_device.c    |  2 +-
 drivers/gpu/drm/xe/display/xe_display.c             |  5 +++--
 5 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index aabf6ece40c4..8ba1b4652ca9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -16,6 +16,7 @@
 #include "intel_display_params.h"
 #include "intel_display_power.h"
 #include "intel_display_reg_defs.h"
+#include "intel_display_types.h"
 #include "intel_fbc.h"
 #include "intel_step.h"
 
@@ -1569,10 +1570,9 @@ static void display_platforms_or(struct intel_display_platforms *dst,
 	bitmap_or(dst->bitmap, dst->bitmap, src->bitmap, display_platforms_num_bits());
 }
 
-void intel_display_device_probe(struct drm_i915_private *i915)
+struct intel_display *intel_display_device_probe(struct pci_dev *pdev)
 {
-	struct intel_display *display = &i915->display;
-	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+	struct intel_display *display = to_intel_display(pdev);
 	const struct intel_display_device_info *info;
 	struct intel_display_ip_ver ip_ver = {};
 	const struct platform_desc *desc;
@@ -1649,10 +1649,12 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 		 DISPLAY_RUNTIME_INFO(display)->ip.rel,
 		 step != STEP_NONE ? intel_step_name(step) : "N/A");
 
-	return;
+	return display;
 
 no_display:
 	DISPLAY_INFO(display) = &no_display;
+
+	return display;
 }
 
 void intel_display_device_remove(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 01e3cc0fde4b..e1398689cda5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -12,9 +12,9 @@
 #include "intel_display_conversion.h"
 #include "intel_display_limits.h"
 
-struct drm_i915_private;
 struct drm_printer;
 struct intel_display;
+struct pci_dev;
 
 /*
  * Display platforms and subplatforms. Keep platforms in display version based
@@ -288,7 +288,7 @@ struct intel_display_device_info {
 };
 
 bool intel_display_device_enabled(struct intel_display *display);
-void intel_display_device_probe(struct drm_i915_private *i915);
+struct intel_display *intel_display_device_probe(struct pci_dev *pdev);
 void intel_display_device_remove(struct intel_display *display);
 void intel_display_device_info_runtime_init(struct intel_display *display);
 
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 596aaf940d0c..310c0a2e9e26 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -732,7 +732,7 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
 	/* Set up device info and initial runtime info. */
 	intel_device_info_driver_create(i915, pdev->device, match_info);
 
-	intel_display_device_probe(i915);
+	intel_display_device_probe(pdev);
 
 	return i915;
 }
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index ae57eb03dfca..a77e5b26542c 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -180,7 +180,7 @@ struct drm_i915_private *mock_gem_device(void)
 	/* Set up device info and initial runtime info. */
 	intel_device_info_driver_create(i915, pdev->device, &mock_info);
 
-	intel_display_device_probe(i915);
+	intel_display_device_probe(pdev);
 
 	dev_pm_domain_set(&pdev->dev, &pm_domain);
 	pm_runtime_enable(&pdev->dev);
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 9b8acf2074e0..60ff48604e3b 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -502,13 +502,14 @@ static void display_device_remove(struct drm_device *dev, void *arg)
 
 int xe_display_probe(struct xe_device *xe)
 {
-	struct intel_display *display = &xe->display;
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct intel_display *display;
 	int err;
 
 	if (!xe->info.probe_display)
 		goto no_display;
 
-	intel_display_device_probe(xe);
+	display = intel_display_device_probe(pdev);
 
 	err = drmm_add_action_or_reset(&xe->drm, display_device_remove, display);
 	if (err)
-- 
2.39.5

[PATCH 15/15] drm/i915/display: add mobile platform group

[Jani Nikula]

Identify mobile platforms separately in display, using the platform
group mechanism. This enables dropping the dependency on i915_drv.h
IS_MOBILE() from display code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.c   | 104 ++++++++++++------
 .../drm/i915/display/intel_display_device.h   |   1 +
 2 files changed, 70 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 8ba1b4652ca9..5689c5e5db0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -253,6 +253,7 @@ static const struct intel_display_device_info no_display = {};
 
 static const struct platform_desc i830_desc = {
 	PLATFORM(i830),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		I830_DISPLAY,
 
@@ -271,6 +272,7 @@ static const struct platform_desc i845_desc = {
 
 static const struct platform_desc i85x_desc = {
 	PLATFORM(i85x),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		I830_DISPLAY,
 
@@ -313,6 +315,7 @@ static const struct platform_desc i915g_desc = {
 
 static const struct platform_desc i915gm_desc = {
 	PLATFORM(i915gm),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I9XX_COLORS,
@@ -337,6 +340,7 @@ static const struct platform_desc i945g_desc = {
 
 static const struct platform_desc i945gm_desc = {
 	PLATFORM(i915gm),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I9XX_COLORS,
@@ -358,13 +362,21 @@ static const struct platform_desc g33_desc = {
 	},
 };
 
-static const struct platform_desc pnv_desc = {
+static const struct intel_display_device_info pnv_display = {
+	GEN3_DISPLAY,
+	I9XX_COLORS,
+	.has_hotplug = 1,
+};
+
+static const struct platform_desc pnv_g_desc = {
 	PLATFORM(pineview),
-	.info = &(const struct intel_display_device_info) {
-		GEN3_DISPLAY,
-		I9XX_COLORS,
-		.has_hotplug = 1,
-	},
+	.info = &pnv_display,
+};
+
+static const struct platform_desc pnv_m_desc = {
+	PLATFORM(pineview),
+	PLATFORM_GROUP(mobile),
+	.info = &pnv_display,
 };
 
 #define GEN4_DISPLAY \
@@ -391,6 +403,7 @@ static const struct platform_desc i965g_desc = {
 
 static const struct platform_desc i965gm_desc = {
 	PLATFORM(i965gm),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.has_overlay = 1,
@@ -414,6 +427,7 @@ static const struct platform_desc g45_desc = {
 static const struct platform_desc gm45_desc = {
 	PLATFORM(gm45),
 	PLATFORM_GROUP(g4x),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.supports_tv = 1,
@@ -444,6 +458,7 @@ static const struct platform_desc ilk_d_desc = {
 
 static const struct platform_desc ilk_m_desc = {
 	PLATFORM(ironlake),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		ILK_DISPLAY,
 
@@ -451,38 +466,54 @@ static const struct platform_desc ilk_m_desc = {
 	},
 };
 
-static const struct platform_desc snb_desc = {
+const struct intel_display_device_info snb_display = {
+	.has_hotplug = 1,
+	I9XX_PIPE_OFFSETS,
+	I9XX_CURSOR_OFFSETS,
+	ILK_COLORS,
+
+	.__runtime_defaults.ip.ver = 6,
+	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
+	.__runtime_defaults.cpu_transcoder_mask =
+	BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
+	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
+};
+
+static const struct platform_desc snb_d_desc = {
 	PLATFORM(sandybridge),
-	.info = &(const struct intel_display_device_info) {
-		.has_hotplug = 1,
-		I9XX_PIPE_OFFSETS,
-		I9XX_CURSOR_OFFSETS,
-		ILK_COLORS,
+	.info = &snb_display,
+};
 
-		.__runtime_defaults.ip.ver = 6,
-		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
-		.__runtime_defaults.cpu_transcoder_mask =
-		BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
-		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
-		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
-	},
+static const struct platform_desc snb_m_desc = {
+	PLATFORM(sandybridge),
+	PLATFORM_GROUP(mobile),
+	.info = &snb_display,
+};
+
+static const struct intel_display_device_info ivb_display = {
+	.has_hotplug = 1,
+	IVB_PIPE_OFFSETS,
+	IVB_CURSOR_OFFSETS,
+	IVB_COLORS,
+
+	.__runtime_defaults.ip.ver = 7,
+	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
+	.__runtime_defaults.cpu_transcoder_mask =
+	BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
+	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
 };
 
-static const struct platform_desc ivb_desc = {
+static const struct platform_desc ivb_d_desc = {
 	PLATFORM(ivybridge),
-	.info = &(const struct intel_display_device_info) {
-		.has_hotplug = 1,
-		IVB_PIPE_OFFSETS,
-		IVB_CURSOR_OFFSETS,
-		IVB_COLORS,
+	.info = &ivb_display,
+};
 
-		.__runtime_defaults.ip.ver = 7,
-		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
-		.__runtime_defaults.cpu_transcoder_mask =
-		BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
-		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
-		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
-	},
+static const struct platform_desc ivb_m_desc = {
+	PLATFORM(ivybridge),
+	PLATFORM_GROUP(mobile),
+	.info = &ivb_display,
 };
 
 static const struct platform_desc vlv_desc = {
@@ -1385,11 +1416,14 @@ static const struct {
 	INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_desc),
 	INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_desc),
 	INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_desc),
-	INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_desc),
+	INTEL_PNV_G_IDS(INTEL_DISPLAY_DEVICE, &pnv_g_desc),
+	INTEL_PNV_M_IDS(INTEL_DISPLAY_DEVICE, &pnv_m_desc),
 	INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_desc),
 	INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_desc),
-	INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_desc),
-	INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_desc),
+	INTEL_SNB_D_IDS(INTEL_DISPLAY_DEVICE, &snb_d_desc),
+	INTEL_SNB_M_IDS(INTEL_DISPLAY_DEVICE, &snb_m_desc),
+	INTEL_IVB_D_IDS(INTEL_DISPLAY_DEVICE, &ivb_d_desc),
+	INTEL_IVB_M_IDS(INTEL_DISPLAY_DEVICE, &ivb_m_desc),
 	INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_desc),
 	INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_desc),
 	INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_desc),
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index e1398689cda5..84378c787923 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -24,6 +24,7 @@ struct pci_dev;
 #define INTEL_DISPLAY_PLATFORMS(func) \
 	/* Platform group aliases */ \
 	func(g4x) /* g45 and gm45 */ \
+	func(mobile) /* mobile platforms */ \
 	func(dgfx) /* discrete graphics */ \
 	/* Display ver 2 */ \
 	func(i830) \
-- 
2.39.5

✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: convert display feature helpers to struct intel_display

[Patchwork]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display
URL   : https://patchwork.freedesktop.org/series/140886/
State : warning

== Summary ==

Error: dim checkpatch failed
53184469be94 drm/i915/display: identify discrete graphics
ee81f136f724 drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display
-:34: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#34: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:147:
+#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)

-:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#34: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:147:
+#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)

total: 0 errors, 1 warnings, 1 checks, 68 lines checked
93fd1fe4ac07 drm/i915/display: convert HAS_4TILE() to struct intel_display
-:20: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#20: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:141:
+#define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)

total: 0 errors, 0 warnings, 1 checks, 56 lines checked
9afa92b7a8d2 drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display
-:42: WARNING:LONG_LINE: line length of 112 exceeds 100 columns
#42: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:152:
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)

-:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#42: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:152:
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)

total: 0 errors, 1 warnings, 1 checks, 48 lines checked
8a57e86596b6 drm/i915/display: convert HAS_DP20() to struct intel_display
-:142: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#142: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:154:
+#define HAS_DP20(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)

total: 0 errors, 0 warnings, 1 checks, 146 lines checked
dfb23d4815a7 drm/i915/display: convert HAS_GMBUS_BURST_READ() to struct intel_display
-:21: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:163:
+#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:163:
+#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)

total: 0 errors, 1 warnings, 1 checks, 23 lines checked
0ed6a2d6a910 drm/i915/display: convert HAS_IPS() to struct intel_display
-:56: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#56: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:167:
+#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)

-:56: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#56: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:167:
+#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)

total: 0 errors, 1 warnings, 1 checks, 33 lines checked
e8b5d5cae62b drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display
-:21: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:170:
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:170:
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)

total: 0 errors, 1 warnings, 1 checks, 61 lines checked
6137c255aa0c drm/i915/display: convert HAS_SAGV() to struct intel_display
-:20: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#20: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:176:
+#define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
+					 !(__display)->platform.broxton && !(__display)->platform.geminilake)

-:21: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:177:
+					 !(__display)->platform.broxton && !(__display)->platform.geminilake)

total: 0 errors, 1 warnings, 1 checks, 115 lines checked
b4e771cdb0f4 drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_display
-:50: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#50: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:165:
+#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)

-:50: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#50: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:165:
+#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)

total: 0 errors, 1 warnings, 1 checks, 161 lines checked
a77de9a6cfd5 drm/i915/display: convert HAS_ULTRAJOINER() to struct intel_display
-:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#80: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:181:
+#define HAS_ULTRAJOINER(__display)	((DISPLAY_VER(__display) >= 20 || \
+					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
+					 HAS_DSC(__display))

-:81: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#81: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:182:
+					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \

total: 0 errors, 1 warnings, 1 checks, 75 lines checked
73f7fcbd0c1e drm/i915/display: rename i915 parameter to __display in feature helpers
-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:143:
+#define HAS_BIGJOINER(__display)	(DISPLAY_VER(__display) >= 11 && HAS_DSC(__display))

-:30: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#30: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:146:
+#define HAS_CUR_FBC(__display)		(!HAS_GMCH(__display) && IS_DISPLAY_VER(__display, 7, 13))

-:36: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#36: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:148:
+#define HAS_DBUF_OVERLAP_DETECTION(__display)	(DISPLAY_RUNTIME_INFO(__display)->has_dbuf_overlap_detection)

-:55: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#55: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:158:
+#define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))

-:87: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#87: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:178:
+#define HAS_TRANSCODER(__display, trans)	((DISPLAY_RUNTIME_INFO(__display)->cpu_transcoder_mask & \

-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#110: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:193:
+#define IS_DISPLAY_VERx100(__display, from, until) ( \
 	BUILD_BUG_ON_ZERO((from) < 200) + \
+	(DISPLAY_VERx100(__display) >= (from) && \
+	 DISPLAY_VERx100(__display) <= (until)))

-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'from' - possible side-effects?
#110: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:193:
+#define IS_DISPLAY_VERx100(__display, from, until) ( \
 	BUILD_BUG_ON_ZERO((from) < 200) + \
+	(DISPLAY_VERx100(__display) >= (from) && \
+	 DISPLAY_VERx100(__display) <= (until)))

-:134: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#134: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:213:
+#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
+	(IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
+	 IS_DISPLAY_STEP((__display), (from), (until)))

-:134: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'ipver' - possible side-effects?
#134: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:213:
+#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
+	(IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
+	 IS_DISPLAY_STEP((__display), (from), (until)))

-:149: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#149: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:221:
+#define DISPLAY_VERx100(__display)	(DISPLAY_RUNTIME_INFO(__display)->ip.ver * 100 + \
+					 DISPLAY_RUNTIME_INFO(__display)->ip.rel)

-:151: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#151: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:223:
+#define IS_DISPLAY_VER(__display, from, until) \
+	(DISPLAY_VER(__display) >= (from) && DISPLAY_VER(__display) <= (until))

-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#160: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:228:
+#define IS_DISPLAY_STEP(__display, since, until) \
+	(drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) == STEP_NONE), \
+	 INTEL_DISPLAY_STEP(__display) >= (since) && INTEL_DISPLAY_STEP(__display) < (until))

-:161: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#161: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:229:
+	(drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) == STEP_NONE), \

total: 0 errors, 3 warnings, 10 checks, 147 lines checked
38bff7af6490 drm/i915/display: convert display device identification to struct intel_display
54aba0c85fe6 drm/i915/display: pass struct pci_dev * to intel_display_device_probe()
0a75e50a17cc drm/i915/display: add mobile platform group
-:115: WARNING:LONG_LINE_COMMENT: line length of 134 exceeds 100 columns
#115: FILE: drivers/gpu/drm/i915/display/intel_display_device.c:479:
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

-:152: WARNING:LONG_LINE_COMMENT: line length of 134 exceeds 100 columns
#152: FILE: drivers/gpu/drm/i915/display/intel_display_device.c:504:
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

total: 0 errors, 2 warnings, 0 checks, 180 lines checked

✗ Fi.CI.SPARSE: warning for drm/i915/display: convert display feature helpers to struct intel_display

[Patchwork]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display
URL   : https://patchwork.freedesktop.org/series/140886/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.BAT: failure for drm/i915/display: convert display feature helpers to struct intel_display

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 13428 bytes --]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display
URL   : https://patchwork.freedesktop.org/series/140886/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15627 -> Patchwork_140886v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_140886v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_140886v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/index.html

Participating hosts (44 -> 44)
------------------------------

  Additional (1): bat-arls-1 
  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_140886v1:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@load:
    - fi-ilk-650:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-ilk-650/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-ilk-650/igt@i915_module_load@load.html
    - bat-jsl-1:          [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-jsl-1/igt@i915_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-jsl-1/igt@i915_module_load@load.html
    - bat-arls-1:         NOTRUN -> [ABORT][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-arls-1/igt@i915_module_load@load.html
    - fi-blb-e6850:       [PASS][6] -> [ABORT][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-blb-e6850/igt@i915_module_load@load.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-blb-e6850/igt@i915_module_load@load.html
    - bat-adlp-6:         [PASS][8] -> [ABORT][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-adlp-6/igt@i915_module_load@load.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-adlp-6/igt@i915_module_load@load.html
    - bat-arlh-2:         [PASS][10] -> [ABORT][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-arlh-2/igt@i915_module_load@load.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-arlh-2/igt@i915_module_load@load.html
    - fi-rkl-11600:       [PASS][12] -> [ABORT][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-rkl-11600/igt@i915_module_load@load.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-rkl-11600/igt@i915_module_load@load.html
    - fi-skl-6600u:       [PASS][14] -> [ABORT][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-skl-6600u/igt@i915_module_load@load.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-skl-6600u/igt@i915_module_load@load.html
    - bat-arlh-3:         [PASS][16] -> [ABORT][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-arlh-3/igt@i915_module_load@load.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-arlh-3/igt@i915_module_load@load.html
    - fi-pnv-d510:        [PASS][18] -> [ABORT][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-pnv-d510/igt@i915_module_load@load.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-pnv-d510/igt@i915_module_load@load.html
    - bat-dg1-7:          [PASS][20] -> [ABORT][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-dg1-7/igt@i915_module_load@load.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-dg1-7/igt@i915_module_load@load.html
    - bat-dg2-13:         [PASS][22] -> [ABORT][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-dg2-13/igt@i915_module_load@load.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-dg2-13/igt@i915_module_load@load.html
    - bat-jsl-3:          [PASS][24] -> [ABORT][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-jsl-3/igt@i915_module_load@load.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-jsl-3/igt@i915_module_load@load.html
    - fi-glk-j4005:       [PASS][26] -> [ABORT][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-glk-j4005/igt@i915_module_load@load.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-glk-j4005/igt@i915_module_load@load.html
    - bat-adlp-9:         [PASS][28] -> [ABORT][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-adlp-9/igt@i915_module_load@load.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-adlp-9/igt@i915_module_load@load.html
    - bat-twl-2:          [PASS][30] -> [ABORT][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-twl-2/igt@i915_module_load@load.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-twl-2/igt@i915_module_load@load.html
    - bat-dg2-11:         [PASS][32] -> [ABORT][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-dg2-11/igt@i915_module_load@load.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-dg2-11/igt@i915_module_load@load.html
    - bat-rpls-4:         [PASS][34] -> [ABORT][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-rpls-4/igt@i915_module_load@load.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-rpls-4/igt@i915_module_load@load.html
    - fi-kbl-7567u:       [PASS][36] -> [ABORT][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-kbl-7567u/igt@i915_module_load@load.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-kbl-7567u/igt@i915_module_load@load.html
    - fi-cfl-8700k:       [PASS][38] -> [ABORT][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-cfl-8700k/igt@i915_module_load@load.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-cfl-8700k/igt@i915_module_load@load.html
    - bat-twl-1:          [PASS][40] -> [ABORT][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-twl-1/igt@i915_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-twl-1/igt@i915_module_load@load.html
    - fi-kbl-8809g:       [PASS][42] -> [ABORT][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-kbl-8809g/igt@i915_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-kbl-8809g/igt@i915_module_load@load.html
    - bat-dg2-14:         [PASS][44] -> [ABORT][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-dg2-14/igt@i915_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-dg2-14/igt@i915_module_load@load.html
    - fi-elk-e7500:       [PASS][46] -> [ABORT][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-elk-e7500/igt@i915_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-elk-e7500/igt@i915_module_load@load.html
    - fi-bsw-nick:        [PASS][48] -> [ABORT][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-bsw-nick/igt@i915_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-bsw-nick/igt@i915_module_load@load.html
    - bat-kbl-2:          [PASS][50] -> [ABORT][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-kbl-2/igt@i915_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-kbl-2/igt@i915_module_load@load.html
    - bat-adlm-1:         [PASS][52] -> [ABORT][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-adlm-1/igt@i915_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-adlm-1/igt@i915_module_load@load.html
    - bat-rplp-1:         [PASS][54] -> [ABORT][55]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-rplp-1/igt@i915_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-rplp-1/igt@i915_module_load@load.html
    - fi-tgl-1115g4:      [PASS][56] -> [ABORT][57]
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-tgl-1115g4/igt@i915_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-tgl-1115g4/igt@i915_module_load@load.html
    - bat-atsm-1:         [PASS][58] -> [ABORT][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-atsm-1/igt@i915_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-atsm-1/igt@i915_module_load@load.html
    - fi-cfl-guc:         [PASS][60] -> [ABORT][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-cfl-guc/igt@i915_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-cfl-guc/igt@i915_module_load@load.html
    - bat-mtlp-6:         [PASS][62] -> [ABORT][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-mtlp-6/igt@i915_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-mtlp-6/igt@i915_module_load@load.html
    - fi-kbl-x1275:       [PASS][64] -> [ABORT][65]
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-kbl-x1275/igt@i915_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-kbl-x1275/igt@i915_module_load@load.html
    - bat-adlp-11:        [PASS][66] -> [ABORT][67]
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-adlp-11/igt@i915_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-adlp-11/igt@i915_module_load@load.html
    - fi-hsw-4770:        [PASS][68] -> [ABORT][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-hsw-4770/igt@i915_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-hsw-4770/igt@i915_module_load@load.html
    - fi-cfl-8109u:       [PASS][70] -> [ABORT][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-cfl-8109u/igt@i915_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-cfl-8109u/igt@i915_module_load@load.html
    - bat-arls-2:         [PASS][72] -> [ABORT][73]
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-arls-2/igt@i915_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-arls-2/igt@i915_module_load@load.html
    - fi-ivb-3770:        [PASS][74] -> [ABORT][75]
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-ivb-3770/igt@i915_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-ivb-3770/igt@i915_module_load@load.html
    - bat-mtlp-8:         [PASS][76] -> [ABORT][77]
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-mtlp-8/igt@i915_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-mtlp-8/igt@i915_module_load@load.html
    - bat-dg1-6:          [PASS][78] -> [ABORT][79]
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-dg1-6/igt@i915_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-dg1-6/igt@i915_module_load@load.html
    - bat-dg2-8:          [PASS][80] -> [ABORT][81]
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-dg2-8/igt@i915_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-dg2-8/igt@i915_module_load@load.html
    - fi-kbl-guc:         [PASS][82] -> [ABORT][83]
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/fi-kbl-guc/igt@i915_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/fi-kbl-guc/igt@i915_module_load@load.html

  
#### Warnings ####

  * igt@i915_module_load@load:
    - bat-apl-1:          [DMESG-WARN][84] ([i915#180]) -> [ABORT][85]
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-apl-1/igt@i915_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-apl-1/igt@i915_module_load@load.html
    - bat-dg2-9:          [DMESG-WARN][86] -> [ABORT][87]
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15627/bat-dg2-9/igt@i915_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/bat-dg2-9/igt@i915_module_load@load.html

  
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180


Build changes
-------------

  * Linux: CI_DRM_15627 -> Patchwork_140886v1

  CI-20190529: 20190529
  CI_DRM_15627: 0a6cc4357ae4d824f909468ca1deed28ae5ac96f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8093: 8093
  Patchwork_140886v1: 0a6cc4357ae4d824f909468ca1deed28ae5ac96f @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v1/index.html

[-- Attachment #2: Type: text/html, Size: 14242 bytes --]

[PATCH v2] drm/i915/display: convert display device identification to struct intel_display

[Jani Nikula]

Convert intel_display_device.[ch] to struct intel_display, including
callers, but excluding intel_display_device_probe() which will be
handled in follow-up.

v2: fix display->drm = display->drm goof-up

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
 .../drm/i915/display/intel_display_device.c   | 156 +++++++++---------
 .../drm/i915/display/intel_display_device.h   |   7 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |   3 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +-
 drivers/gpu/drm/i915/display/intel_dvo.c      |   3 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |   2 +-
 drivers/gpu/drm/i915/display/intel_hotplug.c  |   4 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |   3 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c     |   3 +-
 drivers/gpu/drm/i915/display/intel_tv.c       |   2 +-
 drivers/gpu/drm/i915/i915_driver.c            |   6 +-
 drivers/gpu/drm/xe/display/xe_display.c       |   9 +-
 13 files changed, 108 insertions(+), 95 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 74c1983fe07e..06341baaef42 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -865,7 +865,7 @@ intel_crt_detect(struct drm_connector *connector,
 		    connector->base.id, connector->name,
 		    force);
 
-	if (!intel_display_device_enabled(dev_priv))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 1e561df02751..45a80b358aa0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1432,9 +1432,9 @@ static const struct {
 };
 
 static const struct intel_display_device_info *
-probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *ip_ver)
+probe_gmdid_display(struct intel_display *display, struct intel_display_ip_ver *ip_ver)
 {
-	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
 	struct intel_display_ip_ver gmd_id;
 	void __iomem *addr;
 	u32 val;
@@ -1442,7 +1442,8 @@ probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *
 
 	addr = pci_iomap_range(pdev, 0, i915_mmio_reg_offset(GMD_ID_DISPLAY), sizeof(u32));
 	if (!addr) {
-		drm_err(&i915->drm, "Cannot map MMIO BAR to read display GMD_ID\n");
+		drm_err(display->drm,
+			"Cannot map MMIO BAR to read display GMD_ID\n");
 		return NULL;
 	}
 
@@ -1450,7 +1451,7 @@ probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *
 	pci_iounmap(pdev, addr);
 
 	if (val == 0) {
-		drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
+		drm_dbg_kms(display->drm, "Device doesn't have display\n");
 		return NULL;
 	}
 
@@ -1466,7 +1467,8 @@ probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *
 		}
 	}
 
-	drm_err(&i915->drm, "Unrecognized display IP version %d.%02d; disabling display.\n",
+	drm_err(display->drm,
+		"Unrecognized display IP version %d.%02d; disabling display.\n",
 		gmd_id.ver, gmd_id.rel);
 	return NULL;
 }
@@ -1578,55 +1580,56 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 	enum intel_step step;
 
 	/* Add drm device backpointer as early as possible. */
-	i915->display.drm = &i915->drm;
+	display->drm = pci_get_drvdata(pdev);
 
-	intel_display_params_copy(&i915->display.params);
+	intel_display_params_copy(&display->params);
 
 	if (has_no_display(pdev)) {
-		drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
+		drm_dbg_kms(display->drm, "Device doesn't have display\n");
 		goto no_display;
 	}
 
 	desc = find_platform_desc(pdev);
 	if (!desc) {
-		drm_dbg_kms(&i915->drm, "Unknown device ID %04x; disabling display.\n",
+		drm_dbg_kms(display->drm,
+			    "Unknown device ID %04x; disabling display.\n",
 			    pdev->device);
 		goto no_display;
 	}
 
 	info = desc->info;
 	if (!info)
-		info = probe_gmdid_display(i915, &ip_ver);
+		info = probe_gmdid_display(display, &ip_ver);
 	if (!info)
 		goto no_display;
 
-	DISPLAY_INFO(i915) = info;
+	DISPLAY_INFO(display) = info;
 
-	memcpy(DISPLAY_RUNTIME_INFO(i915),
-	       &DISPLAY_INFO(i915)->__runtime_defaults,
-	       sizeof(*DISPLAY_RUNTIME_INFO(i915)));
+	memcpy(DISPLAY_RUNTIME_INFO(display),
+	       &DISPLAY_INFO(display)->__runtime_defaults,
+	       sizeof(*DISPLAY_RUNTIME_INFO(display)));
 
-	drm_WARN_ON(&i915->drm, !desc->name ||
+	drm_WARN_ON(display->drm, !desc->name ||
 		    !display_platforms_weight(&desc->platforms));
 
 	display->platform = desc->platforms;
 
 	subdesc = find_subplatform_desc(pdev, desc);
 	if (subdesc) {
-		drm_WARN_ON(&i915->drm, !subdesc->name ||
+		drm_WARN_ON(display->drm, !subdesc->name ||
 			    !display_platforms_weight(&subdesc->platforms));
 
 		display_platforms_or(&display->platform, &subdesc->platforms);
 
 		/* Ensure platform and subplatform are distinct */
-		drm_WARN_ON(&i915->drm,
+		drm_WARN_ON(display->drm,
 			    display_platforms_weight(&display->platform) !=
 			    display_platforms_weight(&desc->platforms) +
 			    display_platforms_weight(&subdesc->platforms));
 	}
 
 	if (ip_ver.ver || ip_ver.rel || ip_ver.step) {
-		DISPLAY_RUNTIME_INFO(i915)->ip = ip_ver;
+		DISPLAY_RUNTIME_INFO(display)->ip = ip_ver;
 		step = STEP_A0 + ip_ver.step;
 		if (step > STEP_FUTURE) {
 			drm_dbg_kms(display->drm, "Using future display stepping\n");
@@ -1637,30 +1640,30 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 					  subdesc ? &subdesc->step_info : NULL);
 	}
 
-	DISPLAY_RUNTIME_INFO(i915)->step = step;
+	DISPLAY_RUNTIME_INFO(display)->step = step;
 
-	drm_info(&i915->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping %s\n",
+	drm_info(display->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping %s\n",
 		 desc->name, subdesc ? "/" : "", subdesc ? subdesc->name : "",
 		 pdev->device, display->platform.dgfx ? "discrete" : "integrated",
-		 DISPLAY_RUNTIME_INFO(i915)->ip.ver,
-		 DISPLAY_RUNTIME_INFO(i915)->ip.rel,
+		 DISPLAY_RUNTIME_INFO(display)->ip.ver,
+		 DISPLAY_RUNTIME_INFO(display)->ip.rel,
 		 step != STEP_NONE ? intel_step_name(step) : "N/A");
 
 	return;
 
 no_display:
-	DISPLAY_INFO(i915) = &no_display;
+	DISPLAY_INFO(display) = &no_display;
 }
 
-void intel_display_device_remove(struct drm_i915_private *i915)
+void intel_display_device_remove(struct intel_display *display)
 {
-	intel_display_params_free(&i915->display.params);
+	intel_display_params_free(&display->params);
 }
 
-static void __intel_display_device_info_runtime_init(struct drm_i915_private *i915)
+static void __intel_display_device_info_runtime_init(struct intel_display *display)
 {
-	struct intel_display *display = &i915->display;
-	struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(i915);
+	struct drm_i915_private *i915 = to_i915(display->drm);
+	struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(display);
 	enum pipe pipe;
 
 	BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->pipe_mask) < I915_MAX_PIPES);
@@ -1668,35 +1671,35 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 	BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->port_mask) < I915_MAX_PORTS);
 
 	/* This covers both ULT and ULX */
-	if (IS_HASWELL_ULT(i915) || IS_BROADWELL_ULT(i915))
+	if (display->platform.haswell_ult || display->platform.broadwell_ult)
 		display_runtime->port_mask &= ~BIT(PORT_D);
 
-	if (IS_ICL_WITH_PORT_F(i915))
+	if (display->platform.icelake_port_f)
 		display_runtime->port_mask |= BIT(PORT_F);
 
 	/* Wa_14011765242: adl-s A0,A1 */
-	if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
-		for_each_pipe(i915, pipe)
+	if (display->platform.alderlake_s && IS_DISPLAY_STEP(display, STEP_A0, STEP_A2))
+		for_each_pipe(display, pipe)
 			display_runtime->num_scalers[pipe] = 0;
-	else if (DISPLAY_VER(i915) >= 11) {
-		for_each_pipe(i915, pipe)
+	else if (DISPLAY_VER(display) >= 11) {
+		for_each_pipe(display, pipe)
 			display_runtime->num_scalers[pipe] = 2;
-	} else if (DISPLAY_VER(i915) >= 9) {
+	} else if (DISPLAY_VER(display) >= 9) {
 		display_runtime->num_scalers[PIPE_A] = 2;
 		display_runtime->num_scalers[PIPE_B] = 2;
 		display_runtime->num_scalers[PIPE_C] = 1;
 	}
 
-	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
-		for_each_pipe(i915, pipe)
+	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 4;
-	else if (DISPLAY_VER(i915) >= 11)
-		for_each_pipe(i915, pipe)
+	else if (DISPLAY_VER(display) >= 11)
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 6;
-	else if (DISPLAY_VER(i915) == 10)
-		for_each_pipe(i915, pipe)
+	else if (DISPLAY_VER(display) == 10)
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 3;
-	else if (IS_BROXTON(i915)) {
+	else if (display->platform.broxton) {
 		/*
 		 * Skylake and Broxton currently don't expose the topmost plane as its
 		 * use is exclusive with the legacy cursor and we only want to expose
@@ -1709,23 +1712,23 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 		display_runtime->num_sprites[PIPE_A] = 2;
 		display_runtime->num_sprites[PIPE_B] = 2;
 		display_runtime->num_sprites[PIPE_C] = 1;
-	} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
-		for_each_pipe(i915, pipe)
+	} else if (display->platform.valleyview || display->platform.cherryview) {
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 2;
-	} else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915)) {
-		for_each_pipe(i915, pipe)
+	} else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) {
+		for_each_pipe(display, pipe)
 			display_runtime->num_sprites[pipe] = 1;
 	}
 
-	if ((IS_DGFX(i915) || DISPLAY_VER(i915) >= 14) &&
-	    !(intel_de_read(i915, GU_CNTL_PROTECTED) & DEPRESENT)) {
-		drm_info(&i915->drm, "Display not present, disabling\n");
+	if ((display->platform.dgfx || DISPLAY_VER(display) >= 14) &&
+	    !(intel_de_read(display, GU_CNTL_PROTECTED) & DEPRESENT)) {
+		drm_info(display->drm, "Display not present, disabling\n");
 		goto display_fused_off;
 	}
 
-	if (IS_DISPLAY_VER(i915, 7, 8) && HAS_PCH_SPLIT(i915)) {
-		u32 fuse_strap = intel_de_read(i915, FUSE_STRAP);
-		u32 sfuse_strap = intel_de_read(i915, SFUSE_STRAP);
+	if (IS_DISPLAY_VER(display, 7, 8) && HAS_PCH_SPLIT(i915)) {
+		u32 fuse_strap = intel_de_read(display, FUSE_STRAP);
+		u32 sfuse_strap = intel_de_read(display, SFUSE_STRAP);
 
 		/*
 		 * SFUSE_STRAP is supposed to have a bit signalling the display
@@ -1740,16 +1743,16 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 		    sfuse_strap & SFUSE_STRAP_DISPLAY_DISABLED ||
 		    (HAS_PCH_CPT(i915) &&
 		     !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
-			drm_info(&i915->drm,
+			drm_info(display->drm,
 				 "Display fused off, disabling\n");
 			goto display_fused_off;
 		} else if (fuse_strap & IVB_PIPE_C_DISABLE) {
-			drm_info(&i915->drm, "PipeC fused off\n");
+			drm_info(display->drm, "PipeC fused off\n");
 			display_runtime->pipe_mask &= ~BIT(PIPE_C);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
 		}
-	} else if (DISPLAY_VER(i915) >= 9) {
-		u32 dfsm = intel_de_read(i915, SKL_DFSM);
+	} else if (DISPLAY_VER(display) >= 9) {
+		u32 dfsm = intel_de_read(display, SKL_DFSM);
 
 		if (dfsm & SKL_DFSM_PIPE_A_DISABLE) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_A);
@@ -1767,7 +1770,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 			display_runtime->fbc_mask &= ~BIT(INTEL_FBC_C);
 		}
 
-		if (DISPLAY_VER(i915) >= 12 &&
+		if (DISPLAY_VER(display) >= 12 &&
 		    (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
 			display_runtime->pipe_mask &= ~BIT(PIPE_D);
 			display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
@@ -1780,15 +1783,15 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 		if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
 			display_runtime->has_hdcp = 0;
 
-		if (IS_DG2(i915) || DISPLAY_VER(i915) < 13) {
+		if (display->platform.dg2 || DISPLAY_VER(display) < 13) {
 			if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
 				display_runtime->fbc_mask = 0;
 		}
 
-		if (DISPLAY_VER(i915) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
+		if (DISPLAY_VER(display) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
 			display_runtime->has_dmc = 0;
 
-		if (IS_DISPLAY_VER(i915, 10, 12) &&
+		if (IS_DISPLAY_VER(display, 10, 12) &&
 		    (dfsm & GLK_DFSM_DISPLAY_DSC_DISABLE))
 			display_runtime->has_dsc = 0;
 
@@ -1797,8 +1800,8 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 			display_runtime->has_dbuf_overlap_detection = false;
 	}
 
-	if (DISPLAY_VER(i915) >= 20) {
-		u32 cap = intel_de_read(i915, XE2LPD_DE_CAP);
+	if (DISPLAY_VER(display) >= 20) {
+		u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
 
 		if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
 		    XE2LPD_DE_CAP_DSC_REMOVED)
@@ -1806,18 +1809,19 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 
 		if (REG_FIELD_GET(XE2LPD_DE_CAP_SCALER_MASK, cap) ==
 		    XE2LPD_DE_CAP_SCALER_SINGLE) {
-			for_each_pipe(i915, pipe)
+			for_each_pipe(display, pipe)
 				if (display_runtime->num_scalers[pipe])
 					display_runtime->num_scalers[pipe] = 1;
 		}
 	}
 
-	if (DISPLAY_VER(i915) >= 30)
+	if (DISPLAY_VER(display) >= 30)
 		display_runtime->edp_typec_support =
 			intel_de_read(display, PICA_PHY_CONFIG_CONTROL) & EDP_ON_TYPEC;
 
 	display_runtime->rawclk_freq = intel_read_rawclk(display);
-	drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", display_runtime->rawclk_freq);
+	drm_dbg_kms(display->drm, "rawclk rate: %d kHz\n",
+		    display_runtime->rawclk_freq);
 
 	return;
 
@@ -1825,21 +1829,21 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
 	memset(display_runtime, 0, sizeof(*display_runtime));
 }
 
-void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
+void intel_display_device_info_runtime_init(struct intel_display *display)
 {
-	if (HAS_DISPLAY(i915))
-		__intel_display_device_info_runtime_init(i915);
+	if (HAS_DISPLAY(display))
+		__intel_display_device_info_runtime_init(display);
 
 	/* Display may have been disabled by runtime init */
-	if (!HAS_DISPLAY(i915)) {
-		i915->drm.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
-		i915->display.info.__device_info = &no_display;
+	if (!HAS_DISPLAY(display)) {
+		display->drm->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
+		display->info.__device_info = &no_display;
 	}
 
 	/* Disable nuclear pageflip by default on pre-g4x */
-	if (!i915->display.params.nuclear_pageflip &&
-	    DISPLAY_VER(i915) < 5 && !IS_G4X(i915))
-		i915->drm.driver_features &= ~DRIVER_ATOMIC;
+	if (!display->params.nuclear_pageflip &&
+	    DISPLAY_VER(display) < 5 && !display->platform.g4x)
+		display->drm->driver_features &= ~DRIVER_ATOMIC;
 }
 
 void intel_display_device_info_print(const struct intel_display_device_info *info,
@@ -1876,10 +1880,8 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
  * Disabling display means taking over the display hardware, putting it to
  * sleep, and preventing connectors from being connected via any means.
  */
-bool intel_display_device_enabled(struct drm_i915_private *i915)
+bool intel_display_device_enabled(struct intel_display *display)
 {
-	struct intel_display *display = &i915->display;
-
 	/* Only valid when HAS_DISPLAY() is true */
 	drm_WARN_ON(display->drm, !HAS_DISPLAY(display));
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 48f32280145f..01e3cc0fde4b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -14,6 +14,7 @@
 
 struct drm_i915_private;
 struct drm_printer;
+struct intel_display;
 
 /*
  * Display platforms and subplatforms. Keep platforms in display version based
@@ -286,10 +287,10 @@ struct intel_display_device_info {
 	} color;
 };
 
-bool intel_display_device_enabled(struct drm_i915_private *i915);
+bool intel_display_device_enabled(struct intel_display *display);
 void intel_display_device_probe(struct drm_i915_private *i915);
-void intel_display_device_remove(struct drm_i915_private *i915);
-void intel_display_device_info_runtime_init(struct drm_i915_private *i915);
+void intel_display_device_remove(struct intel_display *display);
+void intel_display_device_info_runtime_init(struct intel_display *display);
 
 void intel_display_device_info_print(const struct intel_display_device_info *info,
 				     const struct intel_display_runtime_info *runtime,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7d65945c9563..8debc0792d24 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5607,6 +5607,7 @@ intel_dp_detect(struct drm_connector *connector,
 		struct drm_modeset_acquire_ctx *ctx,
 		bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *dev_priv = to_i915(connector->dev);
 	struct intel_connector *intel_connector =
 		to_intel_connector(connector);
@@ -5621,7 +5622,7 @@ intel_dp_detect(struct drm_connector *connector,
 	drm_WARN_ON(&dev_priv->drm,
 		    !drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
 
-	if (!intel_display_device_enabled(dev_priv))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 5bba078c00d8..ebe1ac100aab 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1560,11 +1560,12 @@ static int
 intel_dp_mst_detect(struct drm_connector *connector,
 		    struct drm_modeset_acquire_ctx *ctx, bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 	struct intel_connector *intel_connector = to_intel_connector(connector);
 	struct intel_dp *intel_dp = intel_connector->mst_port;
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (drm_connector_is_unregistered(connector))
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index 2d5ffb37eac9..93a9af67ca47 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -318,6 +318,7 @@ static void intel_dvo_pre_enable(struct intel_atomic_state *state,
 static enum drm_connector_status
 intel_dvo_detect(struct drm_connector *_connector, bool force)
 {
+	struct intel_display *display = to_intel_display(_connector->dev);
 	struct intel_connector *connector = to_intel_connector(_connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
@@ -325,7 +326,7 @@ intel_dvo_detect(struct drm_connector *_connector, bool force)
 	drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.base.id, connector->base.name);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index c6ce6bb88d7c..23c270a8c4aa 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2556,7 +2556,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.id, connector->name);
 
-	if (!intel_display_device_enabled(dev_priv))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index a013b0e0ef54..3adc791d3776 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -813,8 +813,10 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
  */
 void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
 {
+	struct intel_display *display = &dev_priv->display;
+
 	if (!HAS_DISPLAY(dev_priv) ||
-	    !intel_display_device_enabled(dev_priv))
+	    !intel_display_device_enabled(display))
 		return;
 
 	WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, true);
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 313bd3f35ace..fdf9ef88a775 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -383,9 +383,10 @@ void intel_panel_add_encoder_fixed_mode(struct intel_connector *connector,
 enum drm_connector_status
 intel_panel_detect(struct drm_connector *connector, bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 7a28104f68ad..df855bf3ecec 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2136,6 +2136,7 @@ intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
 static enum drm_connector_status
 intel_sdvo_detect(struct drm_connector *connector, bool force)
 {
+	struct intel_display *display = to_intel_display(connector->dev);
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
 	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
@@ -2145,7 +2146,7 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
 	drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.id, connector->name);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index bfd16054ca05..ece16fc50429 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1722,7 +1722,7 @@ intel_tv_detect(struct drm_connector *connector,
 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",
 		    connector->base.id, connector->name, force);
 
-	if (!intel_display_device_enabled(i915))
+	if (!intel_display_device_enabled(display))
 		return connector_status_disconnected;
 
 	if (!intel_display_driver_check_access(i915))
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 365329ff8a07..596aaf940d0c 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -307,6 +307,7 @@ static void i915_driver_late_release(struct drm_i915_private *dev_priv)
  */
 static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 {
+	struct intel_display *display = &dev_priv->display;
 	struct intel_gt *gt;
 	int ret, i;
 
@@ -332,7 +333,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 	/* Try to make sure MCHBAR is enabled before poking at it */
 	intel_gmch_bar_setup(dev_priv);
 	intel_device_info_runtime_init(dev_priv);
-	intel_display_device_info_runtime_init(dev_priv);
+	intel_display_device_info_runtime_init(display);
 
 	for_each_gt(gt, dev_priv, i) {
 		ret = intel_gt_init_mmio(gt);
@@ -883,6 +884,7 @@ void i915_driver_remove(struct drm_i915_private *i915)
 static void i915_driver_release(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct intel_display *display = &dev_priv->display;
 	struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
 	intel_wakeref_t wakeref;
 
@@ -906,7 +908,7 @@ static void i915_driver_release(struct drm_device *dev)
 
 	i915_driver_late_release(dev_priv);
 
-	intel_display_device_remove(dev_priv);
+	intel_display_device_remove(display);
 }
 
 static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index b5502f335f53..9b8acf2074e0 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -157,7 +157,7 @@ int xe_display_init_noirq(struct xe_device *xe)
 
 	intel_bw_init_hw(xe);
 
-	intel_display_device_info_runtime_init(xe);
+	intel_display_device_info_runtime_init(display);
 
 	err = intel_display_driver_probe_noirq(xe);
 	if (err) {
@@ -495,13 +495,14 @@ void xe_display_pm_runtime_resume(struct xe_device *xe)
 
 static void display_device_remove(struct drm_device *dev, void *arg)
 {
-	struct xe_device *xe = arg;
+	struct intel_display *display = arg;
 
-	intel_display_device_remove(xe);
+	intel_display_device_remove(display);
 }
 
 int xe_display_probe(struct xe_device *xe)
 {
+	struct intel_display *display = &xe->display;
 	int err;
 
 	if (!xe->info.probe_display)
@@ -509,7 +510,7 @@ int xe_display_probe(struct xe_device *xe)
 
 	intel_display_device_probe(xe);
 
-	err = drmm_add_action_or_reset(&xe->drm, display_device_remove, xe);
+	err = drmm_add_action_or_reset(&xe->drm, display_device_remove, display);
 	if (err)
 		return err;
 
-- 
2.39.5

✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: convert display feature helpers to struct intel_display (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display (rev2)
URL   : https://patchwork.freedesktop.org/series/140886/
State : warning

== Summary ==

Error: dim checkpatch failed
34b6bf6dffe3 drm/i915/display: identify discrete graphics
98b45b9902e5 drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display
-:34: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#34: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:147:
+#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)

-:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#34: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:147:
+#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)

total: 0 errors, 1 warnings, 1 checks, 68 lines checked
11d736491ec0 drm/i915/display: convert HAS_4TILE() to struct intel_display
-:20: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#20: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:141:
+#define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)

total: 0 errors, 0 warnings, 1 checks, 56 lines checked
a98549940a78 drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display
-:42: WARNING:LONG_LINE: line length of 112 exceeds 100 columns
#42: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:152:
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)

-:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#42: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:152:
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)

total: 0 errors, 1 warnings, 1 checks, 48 lines checked
cb3b8998aec7 drm/i915/display: convert HAS_DP20() to struct intel_display
-:142: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#142: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:154:
+#define HAS_DP20(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)

total: 0 errors, 0 warnings, 1 checks, 146 lines checked
f65e8d5edb2f drm/i915/display: convert HAS_GMBUS_BURST_READ() to struct intel_display
-:21: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:163:
+#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:163:
+#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)

total: 0 errors, 1 warnings, 1 checks, 23 lines checked
8cfe7cdca663 drm/i915/display: convert HAS_IPS() to struct intel_display
-:56: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#56: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:167:
+#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)

-:56: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#56: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:167:
+#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)

total: 0 errors, 1 warnings, 1 checks, 33 lines checked
551526d59f8a drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display
-:21: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:170:
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:170:
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)

total: 0 errors, 1 warnings, 1 checks, 61 lines checked
06052e9b4584 drm/i915/display: convert HAS_SAGV() to struct intel_display
-:20: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#20: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:176:
+#define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
+					 !(__display)->platform.broxton && !(__display)->platform.geminilake)

-:21: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:177:
+					 !(__display)->platform.broxton && !(__display)->platform.geminilake)

total: 0 errors, 1 warnings, 1 checks, 115 lines checked
889a3af2ff84 drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_display
-:50: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#50: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:165:
+#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)

-:50: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#50: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:165:
+#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)

total: 0 errors, 1 warnings, 1 checks, 161 lines checked
925d95e136e4 drm/i915/display: convert HAS_ULTRAJOINER() to struct intel_display
-:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#80: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:181:
+#define HAS_ULTRAJOINER(__display)	((DISPLAY_VER(__display) >= 20 || \
+					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
+					 HAS_DSC(__display))

-:81: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#81: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:182:
+					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \

total: 0 errors, 1 warnings, 1 checks, 75 lines checked
01c72d78885d drm/i915/display: rename i915 parameter to __display in feature helpers
-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:143:
+#define HAS_BIGJOINER(__display)	(DISPLAY_VER(__display) >= 11 && HAS_DSC(__display))

-:30: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#30: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:146:
+#define HAS_CUR_FBC(__display)		(!HAS_GMCH(__display) && IS_DISPLAY_VER(__display, 7, 13))

-:36: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#36: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:148:
+#define HAS_DBUF_OVERLAP_DETECTION(__display)	(DISPLAY_RUNTIME_INFO(__display)->has_dbuf_overlap_detection)

-:55: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#55: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:158:
+#define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))

-:87: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#87: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:178:
+#define HAS_TRANSCODER(__display, trans)	((DISPLAY_RUNTIME_INFO(__display)->cpu_transcoder_mask & \

-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#110: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:193:
+#define IS_DISPLAY_VERx100(__display, from, until) ( \
 	BUILD_BUG_ON_ZERO((from) < 200) + \
+	(DISPLAY_VERx100(__display) >= (from) && \
+	 DISPLAY_VERx100(__display) <= (until)))

-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'from' - possible side-effects?
#110: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:193:
+#define IS_DISPLAY_VERx100(__display, from, until) ( \
 	BUILD_BUG_ON_ZERO((from) < 200) + \
+	(DISPLAY_VERx100(__display) >= (from) && \
+	 DISPLAY_VERx100(__display) <= (until)))

-:134: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#134: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:213:
+#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
+	(IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
+	 IS_DISPLAY_STEP((__display), (from), (until)))

-:134: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'ipver' - possible side-effects?
#134: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:213:
+#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
+	(IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
+	 IS_DISPLAY_STEP((__display), (from), (until)))

-:149: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#149: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:221:
+#define DISPLAY_VERx100(__display)	(DISPLAY_RUNTIME_INFO(__display)->ip.ver * 100 + \
+					 DISPLAY_RUNTIME_INFO(__display)->ip.rel)

-:151: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#151: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:223:
+#define IS_DISPLAY_VER(__display, from, until) \
+	(DISPLAY_VER(__display) >= (from) && DISPLAY_VER(__display) <= (until))

-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#160: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:228:
+#define IS_DISPLAY_STEP(__display, since, until) \
+	(drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) == STEP_NONE), \
+	 INTEL_DISPLAY_STEP(__display) >= (since) && INTEL_DISPLAY_STEP(__display) < (until))

-:161: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#161: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:229:
+	(drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) == STEP_NONE), \

total: 0 errors, 3 warnings, 10 checks, 147 lines checked
772a3a45e504 drm/i915/display: convert display device identification to struct intel_display
ab1198bdbb45 drm/i915/display: pass struct pci_dev * to intel_display_device_probe()
5a0d7007b641 drm/i915/display: add mobile platform group
-:115: WARNING:LONG_LINE_COMMENT: line length of 134 exceeds 100 columns
#115: FILE: drivers/gpu/drm/i915/display/intel_display_device.c:479:
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

-:152: WARNING:LONG_LINE_COMMENT: line length of 134 exceeds 100 columns
#152: FILE: drivers/gpu/drm/i915/display/intel_display_device.c:504:
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

total: 0 errors, 2 warnings, 0 checks, 180 lines checked

✗ Fi.CI.SPARSE: warning for drm/i915/display: convert display feature helpers to struct intel_display (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display (rev2)
URL   : https://patchwork.freedesktop.org/series/140886/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for drm/i915/display: convert display feature helpers to struct intel_display (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 7893 bytes --]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display (rev2)
URL   : https://patchwork.freedesktop.org/series/140886/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15633 -> Patchwork_140886v2
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/index.html

Participating hosts (46 -> 45)
------------------------------

  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_140886v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@load:
    - fi-kbl-7567u:       [PASS][1] -> [DMESG-WARN][2] ([i915#11621] / [i915#180]) +1 other test dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@i915_module_load@load.html

  * igt@i915_module_load@reload:
    - fi-kbl-7567u:       [PASS][3] -> [DMESG-WARN][4] ([i915#11621] / [i915#180] / [i915#1982])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@i915_module_load@reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@i915_module_load@reload.html

  * igt@i915_selftest@live:
    - bat-mtlp-6:         [PASS][5] -> [ABORT][6] ([i915#12061] / [i915#12133])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/bat-mtlp-6/igt@i915_selftest@live.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/bat-mtlp-6/igt@i915_selftest@live.html

  * igt@i915_selftest@live@sanitycheck:
    - fi-kbl-7567u:       [PASS][7] -> [DMESG-WARN][8] ([i915#11621]) +47 other tests dmesg-warn
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-6:         [PASS][9] -> [ABORT][10] ([i915#12061])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/bat-mtlp-6/igt@i915_selftest@live@workarounds.html

  
#### Possible fixes ####

  * igt@core_auth@basic-auth:
    - fi-kbl-7567u:       [DMESG-WARN][11] ([i915#11621] / [i915#1982]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@core_auth@basic-auth.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@core_auth@basic-auth.html

  * igt@i915_selftest@live:
    - {bat-mtlp-9}:       [DMESG-WARN][13] ([i915#10341] / [i915#12133]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/bat-mtlp-9/igt@i915_selftest@live.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/bat-mtlp-9/igt@i915_selftest@live.html

  * igt@i915_selftest@live@hangcheck:
    - {bat-mtlp-9}:       [DMESG-WARN][15] ([i915#11349] / [i915#12133]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/bat-mtlp-9/igt@i915_selftest@live@hangcheck.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/bat-mtlp-9/igt@i915_selftest@live@hangcheck.html

  * igt@kms_chamelium_frames@dp-crc-fast:
    - bat-dg2-13:         [DMESG-FAIL][17] -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/bat-dg2-13/igt@kms_chamelium_frames@dp-crc-fast.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-dp-1:
    - fi-kbl-7567u:       [DMESG-FAIL][19] ([i915#11621]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-dp-1.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-dp-1.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-1:
    - fi-kbl-7567u:       [DMESG-WARN][21] ([i915#11621]) -> [PASS][22] +5 other tests pass
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-1.html

  
#### Warnings ####

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-7567u:       [DMESG-WARN][23] ([i915#11621]) -> [DMESG-WARN][24] ([i915#11621] / [i915#180] / [i915#1982])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@i915_pm_rpm@module-reload.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@i915_pm_rpm@module-reload.html

  * igt@kms_busy@basic@flip:
    - fi-kbl-7567u:       [DMESG-WARN][25] ([i915#11621]) -> [DMESG-WARN][26] ([i915#180])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@kms_busy@basic@flip.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@kms_busy@basic@flip.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1:
    - fi-kbl-7567u:       [DMESG-FAIL][27] ([i915#11621]) -> [DMESG-WARN][28] ([i915#11621] / [i915#180]) +4 other tests dmesg-warn
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-kbl-7567u:       [DMESG-FAIL][29] ([i915#11621]) -> [DMESG-WARN][30] ([i915#11621])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@kms_frontbuffer_tracking@basic.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - fi-kbl-7567u:       [DMESG-WARN][31] ([i915#11621]) -> [DMESG-WARN][32] ([i915#11621] / [i915#180]) +43 other tests dmesg-warn
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15633/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10341]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10341
  [i915#11349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11349
  [i915#11621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11621
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982


Build changes
-------------

  * Linux: CI_DRM_15633 -> Patchwork_140886v2

  CI-20190529: 20190529
  CI_DRM_15633: b8afc977cf5cb11c142c28538eef75ff9664acb9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8097: 2e7c8e4b88a50e33e10d6c13286818aa833bef9b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_140886v2: b8afc977cf5cb11c142c28538eef75ff9664acb9 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v2/index.html

[-- Attachment #2: Type: text/html, Size: 10686 bytes --]

Re: [PATCH 15/15] drm/i915/display: add mobile platform group

[kernel test robot]

Hi Jani,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20241105]
[cannot apply to drm-xe/drm-xe-next linus/master drm-intel/for-linux-next-fixes drm-tip/drm-tip v6.12-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-i915-display-identify-discrete-graphics/20241105-012305
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
patch link:    https://lore.kernel.org/r/e9277a5635fc02106ca69b9071928c2249323500.1730740629.git.jani.nikula%40intel.com
patch subject: [PATCH 15/15] drm/i915/display: add mobile platform group
config: x86_64-randconfig-123-20241105 (https://download.01.org/0day-ci/archive/20241106/202411060217.jLvmbe0Z-lkp@intel.com/config)
compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241106/202411060217.jLvmbe0Z-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202411060217.jLvmbe0Z-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/display/intel_display_device.c:469:40: sparse: sparse: symbol 'snb_display' was not declared. Should it be static?
   drivers/gpu/drm/i915/display/intel_display_device.c: note: in included file (through include/linux/mmzone.h, include/linux/gfp.h, include/linux/xarray.h, ...):
   include/linux/page-flags.h:237:46: sparse: sparse: self-comparison always evaluates to false
   include/linux/page-flags.h:237:46: sparse: sparse: self-comparison always evaluates to false
   drivers/gpu/drm/i915/display/intel_display_device.c:555:25: sparse: sparse: Initializer entry defined twice
   drivers/gpu/drm/i915/display/intel_display_device.c:556:25: sparse:   also defined here
   drivers/gpu/drm/i915/display/intel_display_device.c:608:25: sparse: sparse: Initializer entry defined twice
   drivers/gpu/drm/i915/display/intel_display_device.c:609:25: sparse:   also defined here
   drivers/gpu/drm/i915/display/intel_display_device.c:857:17: sparse: sparse: Initializer entry defined twice
   drivers/gpu/drm/i915/display/intel_display_device.c:859:17: sparse:   also defined here
   drivers/gpu/drm/i915/display/intel_display_device.c:1065:17: sparse: sparse: Initializer entry defined twice
   drivers/gpu/drm/i915/display/intel_display_device.c:1070:18: sparse:   also defined here
   drivers/gpu/drm/i915/display/intel_display_device.c:1108:17: sparse: sparse: Initializer entry defined twice
   drivers/gpu/drm/i915/display/intel_display_device.c:1110:18: sparse:   also defined here
   drivers/gpu/drm/i915/display/intel_display_device.c:1346:9: sparse: sparse: Initializer entry defined twice
   drivers/gpu/drm/i915/display/intel_display_device.c:1348:10: sparse:   also defined here
   drivers/gpu/drm/i915/display/intel_display_device.c:1355:9: sparse: sparse: Initializer entry defined twice
   drivers/gpu/drm/i915/display/intel_display_device.c:1356:10: sparse:   also defined here

vim +/snb_display +469 drivers/gpu/drm/i915/display/intel_display_device.c

   468	
 > 469	const struct intel_display_device_info snb_display = {
   470		.has_hotplug = 1,
   471		I9XX_PIPE_OFFSETS,
   472		I9XX_CURSOR_OFFSETS,
   473		ILK_COLORS,
   474	
   475		.__runtime_defaults.ip.ver = 6,
   476		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
   477		.__runtime_defaults.cpu_transcoder_mask =
   478		BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
   479		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
   480		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
   481	};
   482	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 02/15] drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_display_device.h |  2 +-
>  drivers/gpu/drm/i915/display/intel_display_irq.c    | 12 +++++++-----
>  drivers/gpu/drm/i915/display/skl_universal_plane.c  |  4 +++-
>  4 files changed, 12 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 47957384d56d..1e561df02751 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1687,7 +1687,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private
> *i9
>                 display_runtime->num_scalers[PIPE_C] = 1;
>         }
>  
> -       if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
> +       if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
Just want to note that, I guess you intentionally leftout rest of the "i915" in this
__intel_display_device_info_runtime_init(). Though all instances of i915 in
gen8_de_pipe_fault_mask() are changed to intel_display.

Anyway, doesnt impact any functionalities..

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

>                 for_each_pipe(i915, pipe)
>                         display_runtime->num_sprites[pipe] = 4;
>         else if (DISPLAY_VER(i915) >= 11)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 392fbe29e974..e45ba21166d3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -144,7 +144,7 @@ struct intel_display_platforms {
>  #define HAS_CDCLK_CRAWL(i915)          (DISPLAY_INFO(i915)->has_cdclk_crawl)
>  #define HAS_CDCLK_SQUASH(i915)         (DISPLAY_INFO(i915)->has_cdclk_squash)
>  #define HAS_CUR_FBC(i915)              (!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13))
> -#define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
> +#define HAS_D12_PLANE_MINIMIZATION(__display)  ((__display)->platform.rocketlake || (__display)-
> >platform.alderlake_s)
>  #define HAS_DBUF_OVERLAP_DETECTION(__i915) (DISPLAY_RUNTIME_INFO(__i915)-
> >has_dbuf_overlap_detection)
>  #define HAS_DDI(i915)                  (DISPLAY_INFO(i915)->has_ddi)
>  #define HAS_DISPLAY(i915)              (DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index e1547ebce60e..f0d3bdb5fc60 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -843,7 +843,9 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
>  
>  static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  {
> -       if (DISPLAY_VER(dev_priv) >= 14)
> +       struct intel_display *display = &dev_priv->display;
> +
> +       if (DISPLAY_VER(display) >= 14)
>                 return MTL_PIPEDMC_ATS_FAULT |
>                         MTL_PLANE_ATS_FAULT |
>                         GEN12_PIPEDMC_FAULT |
> @@ -853,7 +855,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>                         GEN9_PIPE_PLANE3_FAULT |
>                         GEN9_PIPE_PLANE2_FAULT |
>                         GEN9_PIPE_PLANE1_FAULT;
> -       if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv))
> +       if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>                 return GEN12_PIPEDMC_FAULT |
>                         GEN9_PIPE_CURSOR_FAULT |
>                         GEN11_PIPE_PLANE5_FAULT |
> @@ -861,7 +863,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>                         GEN9_PIPE_PLANE3_FAULT |
>                         GEN9_PIPE_PLANE2_FAULT |
>                         GEN9_PIPE_PLANE1_FAULT;
> -       else if (DISPLAY_VER(dev_priv) == 12)
> +       else if (DISPLAY_VER(display) == 12)
>                 return GEN12_PIPEDMC_FAULT |
>                         GEN9_PIPE_CURSOR_FAULT |
>                         GEN11_PIPE_PLANE7_FAULT |
> @@ -871,7 +873,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>                         GEN9_PIPE_PLANE3_FAULT |
>                         GEN9_PIPE_PLANE2_FAULT |
>                         GEN9_PIPE_PLANE1_FAULT;
> -       else if (DISPLAY_VER(dev_priv) == 11)
> +       else if (DISPLAY_VER(display) == 11)
>                 return GEN9_PIPE_CURSOR_FAULT |
>                         GEN11_PIPE_PLANE7_FAULT |
>                         GEN11_PIPE_PLANE6_FAULT |
> @@ -880,7 +882,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>                         GEN9_PIPE_PLANE3_FAULT |
>                         GEN9_PIPE_PLANE2_FAULT |
>                         GEN9_PIPE_PLANE1_FAULT;
> -       else if (DISPLAY_VER(dev_priv) >= 9)
> +       else if (DISPLAY_VER(display) >= 9)
>                 return GEN9_PIPE_CURSOR_FAULT |
>                         GEN9_PIPE_PLANE4_FAULT |
>                         GEN9_PIPE_PLANE3_FAULT |
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 038ca2ec5d7a..c6e464d70cc7 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -239,7 +239,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>  
>  static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915)
>  {
> -       if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
> +       struct intel_display *display = &i915->display;
> +
> +       if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>                 return BIT(PLANE_4) | BIT(PLANE_5);
>         else
>                 return BIT(PLANE_6) | BIT(PLANE_7);

Re: [PATCH 02/15] drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display

[Jani Nikula]

On Wed, 06 Nov 2024, "Govindapillai, Vinod" <vinod.govindapillai@intel.com> wrote:
> On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
>> Convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display. Do minimal
>> drive-by conversions to struct intel_display in the callers while at it.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_display_device.c |  2 +-
>>  drivers/gpu/drm/i915/display/intel_display_device.h |  2 +-
>>  drivers/gpu/drm/i915/display/intel_display_irq.c    | 12 +++++++-----
>>  drivers/gpu/drm/i915/display/skl_universal_plane.c  |  4 +++-
>>  4 files changed, 12 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
>> b/drivers/gpu/drm/i915/display/intel_display_device.c
>> index 47957384d56d..1e561df02751 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
>> @@ -1687,7 +1687,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private
>> *i9
>>                 display_runtime->num_scalers[PIPE_C] = 1;
>>         }
>>
>> -       if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
>> +       if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
> Just want to note that, I guess you intentionally leftout rest of the "i915" in this
> __intel_display_device_info_runtime_init(). Though all instances of i915 in
> gen8_de_pipe_fault_mask() are changed to intel_display.

Judgement call. Changing __intel_display_device_info_runtime_init()
would be a bigger change than everything else in the patch. It's done
separately in a later patch, and that depends on this
patch. gen8_de_pipe_fault_mask() has a few references only, so makes
sense to convert that.

> Anyway, doesnt impact any functionalities..
>
> Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

Thanks.

>
>>                 for_each_pipe(i915, pipe)
>>                         display_runtime->num_sprites[pipe] = 4;
>>         else if (DISPLAY_VER(i915) >= 11)
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
>> b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index 392fbe29e974..e45ba21166d3 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -144,7 +144,7 @@ struct intel_display_platforms {
>>  #define HAS_CDCLK_CRAWL(i915)          (DISPLAY_INFO(i915)->has_cdclk_crawl)
>>  #define HAS_CDCLK_SQUASH(i915)         (DISPLAY_INFO(i915)->has_cdclk_squash)
>>  #define HAS_CUR_FBC(i915)              (!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13))
>> -#define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
>> +#define HAS_D12_PLANE_MINIMIZATION(__display)  ((__display)->platform.rocketlake || (__display)-
>> >platform.alderlake_s)
>>  #define HAS_DBUF_OVERLAP_DETECTION(__i915) (DISPLAY_RUNTIME_INFO(__i915)-
>> >has_dbuf_overlap_detection)
>>  #define HAS_DDI(i915)                  (DISPLAY_INFO(i915)->has_ddi)
>>  #define HAS_DISPLAY(i915)              (DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
>> b/drivers/gpu/drm/i915/display/intel_display_irq.c
>> index e1547ebce60e..f0d3bdb5fc60 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>> @@ -843,7 +843,9 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
>>
>>  static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>>  {
>> -       if (DISPLAY_VER(dev_priv) >= 14)
>> +       struct intel_display *display = &dev_priv->display;
>> +
>> +       if (DISPLAY_VER(display) >= 14)
>>                 return MTL_PIPEDMC_ATS_FAULT |
>>                         MTL_PLANE_ATS_FAULT |
>>                         GEN12_PIPEDMC_FAULT |
>> @@ -853,7 +855,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>>                         GEN9_PIPE_PLANE3_FAULT |
>>                         GEN9_PIPE_PLANE2_FAULT |
>>                         GEN9_PIPE_PLANE1_FAULT;
>> -       if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv))
>> +       if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>>                 return GEN12_PIPEDMC_FAULT |
>>                         GEN9_PIPE_CURSOR_FAULT |
>>                         GEN11_PIPE_PLANE5_FAULT |
>> @@ -861,7 +863,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>>                         GEN9_PIPE_PLANE3_FAULT |
>>                         GEN9_PIPE_PLANE2_FAULT |
>>                         GEN9_PIPE_PLANE1_FAULT;
>> -       else if (DISPLAY_VER(dev_priv) == 12)
>> +       else if (DISPLAY_VER(display) == 12)
>>                 return GEN12_PIPEDMC_FAULT |
>>                         GEN9_PIPE_CURSOR_FAULT |
>>                         GEN11_PIPE_PLANE7_FAULT |
>> @@ -871,7 +873,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>>                         GEN9_PIPE_PLANE3_FAULT |
>>                         GEN9_PIPE_PLANE2_FAULT |
>>                         GEN9_PIPE_PLANE1_FAULT;
>> -       else if (DISPLAY_VER(dev_priv) == 11)
>> +       else if (DISPLAY_VER(display) == 11)
>>                 return GEN9_PIPE_CURSOR_FAULT |
>>                         GEN11_PIPE_PLANE7_FAULT |
>>                         GEN11_PIPE_PLANE6_FAULT |
>> @@ -880,7 +882,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>>                         GEN9_PIPE_PLANE3_FAULT |
>>                         GEN9_PIPE_PLANE2_FAULT |
>>                         GEN9_PIPE_PLANE1_FAULT;
>> -       else if (DISPLAY_VER(dev_priv) >= 9)
>> +       else if (DISPLAY_VER(display) >= 9)
>>                 return GEN9_PIPE_CURSOR_FAULT |
>>                         GEN9_PIPE_PLANE4_FAULT |
>>                         GEN9_PIPE_PLANE3_FAULT |
>> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
>> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>> index 038ca2ec5d7a..c6e464d70cc7 100644
>> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
>> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>> @@ -239,7 +239,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>>
>>  static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915)
>>  {
>> -       if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
>> +       struct intel_display *display = &i915->display;
>> +
>> +       if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>>                 return BIT(PLANE_4) | BIT(PLANE_5);
>>         else
>>                 return BIT(PLANE_6) | BIT(PLANE_7);
>

-- 
Jani Nikula, Intel

Re: [PATCH 03/15] drm/i915/display: convert HAS_4TILE() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_4TILE() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_device.h    |  2 +-
>  drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 ++++++++------
>  2 files changed, 9 insertions(+), 7 deletions(-)

Looks good to me.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e45ba21166d3..70d1beebbf8f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -138,7 +138,7 @@ struct intel_display_platforms {
>         func(overlay_needs_physical); \
>         func(supports_tv);
>  
> -#define HAS_4TILE(i915)                        (IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_4TILE(__display)           ((__display)->platform.dg2 || DISPLAY_VER(__display) >=
> 14)
>  #define HAS_ASYNC_FLIPS(i915)          (DISPLAY_VER(i915) >= 5)
>  #define HAS_BIGJOINER(i915)            (DISPLAY_VER(i915) >= 11 && HAS_DSC(i915))
>  #define HAS_CDCLK_CRAWL(i915)          (DISPLAY_INFO(i915)->has_cdclk_crawl)
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index c6e464d70cc7..28f7f2405ef3 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2550,13 +2550,14 @@ static bool tgl_plane_has_mc_ccs(struct drm_i915_private *i915,
>  static u8 skl_get_plane_caps(struct drm_i915_private *i915,
>                              enum pipe pipe, enum plane_id plane_id)
>  {
> +       struct intel_display *display = &i915->display;
>         u8 caps = INTEL_PLANE_CAP_TILING_X;
>  
> -       if (DISPLAY_VER(i915) < 13 || IS_ALDERLAKE_P(i915))
> +       if (DISPLAY_VER(display) < 13 || display->platform.alderlake_p)
>                 caps |= INTEL_PLANE_CAP_TILING_Y;
> -       if (DISPLAY_VER(i915) < 12)
> +       if (DISPLAY_VER(display) < 12)
>                 caps |= INTEL_PLANE_CAP_TILING_Yf;
> -       if (HAS_4TILE(i915))
> +       if (HAS_4TILE(display))
>                 caps |= INTEL_PLANE_CAP_TILING_4;
>  
>         if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(i915))
> @@ -2564,14 +2565,14 @@ static u8 skl_get_plane_caps(struct drm_i915_private *i915,
>  
>         if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) {
>                 caps |= INTEL_PLANE_CAP_CCS_RC;
> -               if (DISPLAY_VER(i915) >= 12)
> +               if (DISPLAY_VER(display) >= 12)
>                         caps |= INTEL_PLANE_CAP_CCS_RC_CC;
>         }
>  
>         if (tgl_plane_has_mc_ccs(i915, plane_id))
>                 caps |= INTEL_PLANE_CAP_CCS_MC;
>  
> -       if (DISPLAY_VER(i915) >= 14 && IS_DGFX(i915))
> +       if (DISPLAY_VER(display) >= 14 && display->platform.dgfx)
>                 caps |= INTEL_PLANE_CAP_NEED64K_PHYS;
>  
>         return caps;
> @@ -2745,6 +2746,7 @@ void
>  skl_get_initial_plane_config(struct intel_crtc *crtc,
>                              struct intel_initial_plane_config *plane_config)
>  {
> +       struct intel_display *display = to_intel_display(crtc);
>         struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);
>         struct drm_device *dev = crtc->base.dev;
>         struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -2826,7 +2828,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
>                         fb->modifier = I915_FORMAT_MOD_Y_TILED;
>                 break;
>         case PLANE_CTL_TILED_YF: /* aka PLANE_CTL_TILED_4 on XE_LPD+ */
> -               if (HAS_4TILE(dev_priv)) {
> +               if (HAS_4TILE(display)) {
>                         u32 rc_mask = PLANE_CTL_RENDER_DECOMPRESSION_ENABLE |
>                                       PLANE_CTL_CLEAR_COLOR_DISABLE;
>  

Re: [PATCH 04/15] drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c             | 4 ++--
>  drivers/gpu/drm/i915/display/intel_drrs.c           | 4 +++-
>  4 files changed, 8 insertions(+), 5 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 863927f429aa..57b42554d656 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5322,6 +5322,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>                           const struct intel_crtc_state *pipe_config,
>                           bool fastset)
>  {
> +       struct intel_display *display = to_intel_display(current_config);
>         struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev);
>         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>         struct drm_printer p;
> @@ -5562,7 +5563,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>         PIPE_CONF_CHECK_I(lane_count);
>         PIPE_CONF_CHECK_X(lane_lat_optim_mask);
>  
> -       if (HAS_DOUBLE_BUFFERED_M_N(dev_priv)) {
> +       if (HAS_DOUBLE_BUFFERED_M_N(display)) {
>                 if (!fastset || !pipe_config->update_m_n)
>                         PIPE_CONF_CHECK_M_N(dp_m_n);
>         } else {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 70d1beebbf8f..e11993a6f042 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -149,7 +149,7 @@ struct intel_display_platforms {
>  #define HAS_DDI(i915)                  (DISPLAY_INFO(i915)->has_ddi)
>  #define HAS_DISPLAY(i915)              (DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
>  #define HAS_DMC(i915)                  (DISPLAY_RUNTIME_INFO(i915)->has_dmc)
> -#define HAS_DOUBLE_BUFFERED_M_N(i915)  (DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
> +#define HAS_DOUBLE_BUFFERED_M_N(__display)     (DISPLAY_VER(__display) >= 9 || (__display)-
> >platform.broadwell)
>  #define HAS_DP_MST(i915)               (DISPLAY_INFO(i915)->has_dp_mst)
>  #define HAS_DP20(i915)                 (IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
>  #define HAS_DPT(i915)                  (DISPLAY_VER(i915) >= 13)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ff5ba7b3035f..a27da96d2c60 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1700,13 +1700,13 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>  
>  static bool has_seamless_m_n(struct intel_connector *connector)
>  {
> -       struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +       struct intel_display *display = to_intel_display(connector);
>  
>         /*
>          * Seamless M/N reprogramming only implemented
>          * for BDW+ double buffered M/N registers so far.
>          */
> -       return HAS_DOUBLE_BUFFERED_M_N(i915) &&
> +       return HAS_DOUBLE_BUFFERED_M_N(display) &&
>                 intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index bb39eb96e812..0fec01b79b23 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -68,7 +68,9 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
>  bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
>                                    enum transcoder cpu_transcoder)
>  {
> -       if (HAS_DOUBLE_BUFFERED_M_N(i915))
> +       struct intel_display *display = &i915->display;
> +
> +       if (HAS_DOUBLE_BUFFERED_M_N(display))
>                 return true;
>  
>         return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);

[PATCH v2] drm/i915/display: add mobile platform group

[Jani Nikula]

Identify mobile platforms separately in display, using the platform
group mechanism. This enables dropping the dependency on i915_drv.h
IS_MOBILE() from display code.

v2: Make snb_display static (kernel test robot)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.c   | 104 ++++++++++++------
 .../drm/i915/display/intel_display_device.h   |   1 +
 2 files changed, 70 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 41df7a8fd32e..68cb7f9b9ef3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -253,6 +253,7 @@ static const struct intel_display_device_info no_display = {};
 
 static const struct platform_desc i830_desc = {
 	PLATFORM(i830),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		I830_DISPLAY,
 
@@ -271,6 +272,7 @@ static const struct platform_desc i845_desc = {
 
 static const struct platform_desc i85x_desc = {
 	PLATFORM(i85x),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		I830_DISPLAY,
 
@@ -313,6 +315,7 @@ static const struct platform_desc i915g_desc = {
 
 static const struct platform_desc i915gm_desc = {
 	PLATFORM(i915gm),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I9XX_COLORS,
@@ -337,6 +340,7 @@ static const struct platform_desc i945g_desc = {
 
 static const struct platform_desc i945gm_desc = {
 	PLATFORM(i915gm),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I9XX_COLORS,
@@ -358,13 +362,21 @@ static const struct platform_desc g33_desc = {
 	},
 };
 
-static const struct platform_desc pnv_desc = {
+static const struct intel_display_device_info pnv_display = {
+	GEN3_DISPLAY,
+	I9XX_COLORS,
+	.has_hotplug = 1,
+};
+
+static const struct platform_desc pnv_g_desc = {
 	PLATFORM(pineview),
-	.info = &(const struct intel_display_device_info) {
-		GEN3_DISPLAY,
-		I9XX_COLORS,
-		.has_hotplug = 1,
-	},
+	.info = &pnv_display,
+};
+
+static const struct platform_desc pnv_m_desc = {
+	PLATFORM(pineview),
+	PLATFORM_GROUP(mobile),
+	.info = &pnv_display,
 };
 
 #define GEN4_DISPLAY \
@@ -391,6 +403,7 @@ static const struct platform_desc i965g_desc = {
 
 static const struct platform_desc i965gm_desc = {
 	PLATFORM(i965gm),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.has_overlay = 1,
@@ -414,6 +427,7 @@ static const struct platform_desc g45_desc = {
 static const struct platform_desc gm45_desc = {
 	PLATFORM(gm45),
 	PLATFORM_GROUP(g4x),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.supports_tv = 1,
@@ -444,6 +458,7 @@ static const struct platform_desc ilk_d_desc = {
 
 static const struct platform_desc ilk_m_desc = {
 	PLATFORM(ironlake),
+	PLATFORM_GROUP(mobile),
 	.info = &(const struct intel_display_device_info) {
 		ILK_DISPLAY,
 
@@ -451,38 +466,54 @@ static const struct platform_desc ilk_m_desc = {
 	},
 };
 
-static const struct platform_desc snb_desc = {
+static const struct intel_display_device_info snb_display = {
+	.has_hotplug = 1,
+	I9XX_PIPE_OFFSETS,
+	I9XX_CURSOR_OFFSETS,
+	ILK_COLORS,
+
+	.__runtime_defaults.ip.ver = 6,
+	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
+	.__runtime_defaults.cpu_transcoder_mask =
+	BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
+	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
+};
+
+static const struct platform_desc snb_d_desc = {
 	PLATFORM(sandybridge),
-	.info = &(const struct intel_display_device_info) {
-		.has_hotplug = 1,
-		I9XX_PIPE_OFFSETS,
-		I9XX_CURSOR_OFFSETS,
-		ILK_COLORS,
+	.info = &snb_display,
+};
 
-		.__runtime_defaults.ip.ver = 6,
-		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
-		.__runtime_defaults.cpu_transcoder_mask =
-		BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
-		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
-		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
-	},
+static const struct platform_desc snb_m_desc = {
+	PLATFORM(sandybridge),
+	PLATFORM_GROUP(mobile),
+	.info = &snb_display,
+};
+
+static const struct intel_display_device_info ivb_display = {
+	.has_hotplug = 1,
+	IVB_PIPE_OFFSETS,
+	IVB_CURSOR_OFFSETS,
+	IVB_COLORS,
+
+	.__runtime_defaults.ip.ver = 7,
+	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
+	.__runtime_defaults.cpu_transcoder_mask =
+	BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
+	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
 };
 
-static const struct platform_desc ivb_desc = {
+static const struct platform_desc ivb_d_desc = {
 	PLATFORM(ivybridge),
-	.info = &(const struct intel_display_device_info) {
-		.has_hotplug = 1,
-		IVB_PIPE_OFFSETS,
-		IVB_CURSOR_OFFSETS,
-		IVB_COLORS,
+	.info = &ivb_display,
+};
 
-		.__runtime_defaults.ip.ver = 7,
-		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
-		.__runtime_defaults.cpu_transcoder_mask =
-		BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
-		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
-		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
-	},
+static const struct platform_desc ivb_m_desc = {
+	PLATFORM(ivybridge),
+	PLATFORM_GROUP(mobile),
+	.info = &ivb_display,
 };
 
 static const struct platform_desc vlv_desc = {
@@ -1385,11 +1416,14 @@ static const struct {
 	INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_desc),
 	INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_desc),
 	INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_desc),
-	INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_desc),
+	INTEL_PNV_G_IDS(INTEL_DISPLAY_DEVICE, &pnv_g_desc),
+	INTEL_PNV_M_IDS(INTEL_DISPLAY_DEVICE, &pnv_m_desc),
 	INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_desc),
 	INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_desc),
-	INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_desc),
-	INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_desc),
+	INTEL_SNB_D_IDS(INTEL_DISPLAY_DEVICE, &snb_d_desc),
+	INTEL_SNB_M_IDS(INTEL_DISPLAY_DEVICE, &snb_m_desc),
+	INTEL_IVB_D_IDS(INTEL_DISPLAY_DEVICE, &ivb_d_desc),
+	INTEL_IVB_M_IDS(INTEL_DISPLAY_DEVICE, &ivb_m_desc),
 	INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_desc),
 	INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_desc),
 	INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_desc),
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index e1398689cda5..84378c787923 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -24,6 +24,7 @@ struct pci_dev;
 #define INTEL_DISPLAY_PLATFORMS(func) \
 	/* Platform group aliases */ \
 	func(g4x) /* g45 and gm45 */ \
+	func(mobile) /* mobile platforms */ \
 	func(dgfx) /* discrete graphics */ \
 	/* Display ver 2 */ \
 	func(i830) \
-- 
2.39.5

✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: convert display feature helpers to struct intel_display (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display (rev3)
URL   : https://patchwork.freedesktop.org/series/140886/
State : warning

== Summary ==

Error: dim checkpatch failed
5812ffd7d830 drm/i915/display: identify discrete graphics
09cfb5e7c651 drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display
-:35: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#35: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:147:
+#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)

-:35: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#35: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:147:
+#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)

total: 0 errors, 1 warnings, 1 checks, 68 lines checked
6e5a06b006b1 drm/i915/display: convert HAS_4TILE() to struct intel_display
-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:141:
+#define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)

total: 0 errors, 0 warnings, 1 checks, 56 lines checked
35a67e83c94b drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display
-:43: WARNING:LONG_LINE: line length of 112 exceeds 100 columns
#43: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:152:
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)

-:43: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#43: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:152:
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)

total: 0 errors, 1 warnings, 1 checks, 48 lines checked
19a15ba04506 drm/i915/display: convert HAS_DP20() to struct intel_display
-:142: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#142: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:154:
+#define HAS_DP20(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)

total: 0 errors, 0 warnings, 1 checks, 146 lines checked
0535305e2b95 drm/i915/display: convert HAS_GMBUS_BURST_READ() to struct intel_display
-:21: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:163:
+#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:163:
+#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)

total: 0 errors, 1 warnings, 1 checks, 23 lines checked
44b669672216 drm/i915/display: convert HAS_IPS() to struct intel_display
-:56: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#56: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:167:
+#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)

-:56: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#56: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:167:
+#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)

total: 0 errors, 1 warnings, 1 checks, 33 lines checked
a629687d1259 drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display
-:21: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:170:
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:170:
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)

total: 0 errors, 1 warnings, 1 checks, 61 lines checked
b0231f000375 drm/i915/display: convert HAS_SAGV() to struct intel_display
-:20: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#20: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:176:
+#define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
+					 !(__display)->platform.broxton && !(__display)->platform.geminilake)

-:21: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#21: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:177:
+					 !(__display)->platform.broxton && !(__display)->platform.geminilake)

total: 0 errors, 1 warnings, 1 checks, 115 lines checked
1208ffb92a23 drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_display
-:50: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#50: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:165:
+#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)

-:50: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#50: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:165:
+#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)

total: 0 errors, 1 warnings, 1 checks, 161 lines checked
80057ff07030 drm/i915/display: convert HAS_ULTRAJOINER() to struct intel_display
-:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#80: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:181:
+#define HAS_ULTRAJOINER(__display)	((DISPLAY_VER(__display) >= 20 || \
+					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
+					 HAS_DSC(__display))

-:81: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#81: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:182:
+					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \

total: 0 errors, 1 warnings, 1 checks, 75 lines checked
70580297c841 drm/i915/display: rename i915 parameter to __display in feature helpers
-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:143:
+#define HAS_BIGJOINER(__display)	(DISPLAY_VER(__display) >= 11 && HAS_DSC(__display))

-:30: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#30: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:146:
+#define HAS_CUR_FBC(__display)		(!HAS_GMCH(__display) && IS_DISPLAY_VER(__display, 7, 13))

-:36: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#36: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:148:
+#define HAS_DBUF_OVERLAP_DETECTION(__display)	(DISPLAY_RUNTIME_INFO(__display)->has_dbuf_overlap_detection)

-:55: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#55: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:158:
+#define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))

-:87: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#87: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:178:
+#define HAS_TRANSCODER(__display, trans)	((DISPLAY_RUNTIME_INFO(__display)->cpu_transcoder_mask & \

-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#110: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:193:
+#define IS_DISPLAY_VERx100(__display, from, until) ( \
 	BUILD_BUG_ON_ZERO((from) < 200) + \
+	(DISPLAY_VERx100(__display) >= (from) && \
+	 DISPLAY_VERx100(__display) <= (until)))

-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'from' - possible side-effects?
#110: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:193:
+#define IS_DISPLAY_VERx100(__display, from, until) ( \
 	BUILD_BUG_ON_ZERO((from) < 200) + \
+	(DISPLAY_VERx100(__display) >= (from) && \
+	 DISPLAY_VERx100(__display) <= (until)))

-:134: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#134: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:213:
+#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
+	(IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
+	 IS_DISPLAY_STEP((__display), (from), (until)))

-:134: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'ipver' - possible side-effects?
#134: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:213:
+#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
+	(IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
+	 IS_DISPLAY_STEP((__display), (from), (until)))

-:149: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#149: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:221:
+#define DISPLAY_VERx100(__display)	(DISPLAY_RUNTIME_INFO(__display)->ip.ver * 100 + \
+					 DISPLAY_RUNTIME_INFO(__display)->ip.rel)

-:151: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#151: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:223:
+#define IS_DISPLAY_VER(__display, from, until) \
+	(DISPLAY_VER(__display) >= (from) && DISPLAY_VER(__display) <= (until))

-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#160: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:228:
+#define IS_DISPLAY_STEP(__display, since, until) \
+	(drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) == STEP_NONE), \
+	 INTEL_DISPLAY_STEP(__display) >= (since) && INTEL_DISPLAY_STEP(__display) < (until))

-:161: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#161: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:229:
+	(drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) == STEP_NONE), \

total: 0 errors, 3 warnings, 10 checks, 147 lines checked
7fe6632cc1b1 drm/i915/display: convert display device identification to struct intel_display
2985a2806829 drm/i915/display: pass struct pci_dev * to intel_display_device_probe()
7667007c0d53 drm/i915/display: add mobile platform group
-:117: WARNING:LONG_LINE_COMMENT: line length of 134 exceeds 100 columns
#117: FILE: drivers/gpu/drm/i915/display/intel_display_device.c:479:
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

-:154: WARNING:LONG_LINE_COMMENT: line length of 134 exceeds 100 columns
#154: FILE: drivers/gpu/drm/i915/display/intel_display_device.c:504:
+	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

total: 0 errors, 2 warnings, 0 checks, 180 lines checked

✗ Fi.CI.SPARSE: warning for drm/i915/display: convert display feature helpers to struct intel_display (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display (rev3)
URL   : https://patchwork.freedesktop.org/series/140886/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for drm/i915/display: convert display feature helpers to struct intel_display (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3522 bytes --]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display (rev3)
URL   : https://patchwork.freedesktop.org/series/140886/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15642 -> Patchwork_140886v3
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/index.html

Participating hosts (46 -> 45)
------------------------------

  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_140886v3 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - {bat-mtlp-9}:       [SKIP][1] ([i915#12705]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/bat-mtlp-9/igt@i915_pm_rpm@module-reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/bat-mtlp-9/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [ABORT][3] ([i915#12061] / [i915#12133]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/bat-mtlp-8/igt@i915_selftest@live.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/bat-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-8:         [ABORT][5] ([i915#12061]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/bat-mtlp-8/igt@i915_selftest@live@workarounds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/bat-mtlp-8/igt@i915_selftest@live@workarounds.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - bat-dg2-13:         [DMESG-WARN][7] ([i915#12253]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/bat-dg2-13/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         [SKIP][9] ([i915#9197]) -> [PASS][10] +2 other tests pass
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
  [i915#12253]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12253
  [i915#12705]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12705
  [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197


Build changes
-------------

  * Linux: CI_DRM_15642 -> Patchwork_140886v3

  CI-20190529: 20190529
  CI_DRM_15642: e6ccd1b8868ec5bc1569c0dbd0dbbd46148cc541 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8099: 27be46dee80b6b0de80f9fa3cd9bb5f55edccaf8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_140886v3: e6ccd1b8868ec5bc1569c0dbd0dbbd46148cc541 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/index.html

[-- Attachment #2: Type: text/html, Size: 4311 bytes --]

Re: [PATCH 05/15] drm/i915/display: convert HAS_DP20() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_DP20() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_audio.c    |  7 +++--
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 26 ++++++++++---------
>  .../drm/i915/display/intel_display_device.h   |  2 +-
>  drivers/gpu/drm/i915/display/intel_psr.c      |  8 +++---
>  4 files changed, 21 insertions(+), 22 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
> b/drivers/gpu/drm/i915/display/intel_audio.c
> index 32aa9ec1a204..4cc70da8f467 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -681,12 +681,11 @@ static void ibx_audio_codec_enable(struct intel_encoder *encoder,
>  
>  void intel_audio_sdp_split_update(const struct intel_crtc_state *crtc_state)
>  {
> -       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -       struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +       struct intel_display *display = to_intel_display(crtc_state);
>         enum transcoder trans = crtc_state->cpu_transcoder;
>  
> -       if (HAS_DP20(i915))
> -               intel_de_rmw(i915, AUD_DP_2DOT0_CTRL(trans), AUD_ENABLE_SDP_SPLIT,
> +       if (HAS_DP20(display))
> +               intel_de_rmw(display, AUD_DP_2DOT0_CTRL(trans), AUD_ENABLE_SDP_SPLIT,
>                              crtc_state->sdp_split_enable ? AUD_ENABLE_SDP_SPLIT : 0);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 49b5cc01ce40..46b7b90d3d98 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -700,8 +700,8 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
>  
>  bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
>  {
> -       struct drm_device *dev = intel_connector->base.dev;
> -       struct drm_i915_private *dev_priv = to_i915(dev);
> +       struct intel_display *display = to_intel_display(intel_connector);
> +       struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_encoder *encoder = intel_attached_encoder(intel_connector);
>         int type = intel_connector->base.connector_type;
>         enum port port = encoder->port;
> @@ -747,7 +747,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
>                 break;
>  
>         case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
> -               if (HAS_DP20(dev_priv))
> +               if (HAS_DP20(display))
>                         /* 128b/132b */
>                         ret = false;
>                 else
> @@ -769,8 +769,8 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
>  static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
>                                         u8 *pipe_mask, bool *is_dp_mst)
>  {
> -       struct drm_device *dev = encoder->base.dev;
> -       struct drm_i915_private *dev_priv = to_i915(dev);
> +       struct intel_display *display = to_intel_display(encoder);
> +       struct drm_i915_private *dev_priv = to_i915(display->drm);
>         enum port port = encoder->port;
>         intel_wakeref_t wakeref;
>         enum pipe p;
> @@ -840,7 +840,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
>                         continue;
>  
>                 if ((tmp & TRANS_DDI_MODE_SELECT_MASK) == TRANS_DDI_MODE_SELECT_DP_MST ||
> -                   (HAS_DP20(dev_priv) &&
> +                   (HAS_DP20(display) &&
>                      (tmp & TRANS_DDI_MODE_SELECT_MASK) == TRANS_DDI_MODE_SELECT_FDI_OR_128B132B))
>                         mst_pipe_mask |= BIT(p);
>  
> @@ -2653,6 +2653,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>                                   const struct intel_crtc_state *crtc_state,
>                                   const struct drm_connector_state *conn_state)
>  {
> +       struct intel_display *display = to_intel_display(encoder);
>         struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>         struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> @@ -2721,7 +2722,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>          */
>         intel_ddi_enable_transcoder_clock(encoder, crtc_state);
>  
> -       if (HAS_DP20(dev_priv))
> +       if (HAS_DP20(display))
>                 intel_ddi_config_transcoder_dp2(encoder, crtc_state);
>  
>         /*
> @@ -2862,9 +2863,9 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
>                                     const struct intel_crtc_state *crtc_state,
>                                     const struct drm_connector_state *conn_state)
>  {
> -       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +       struct intel_display *display = to_intel_display(encoder);
>  
> -       if (HAS_DP20(dev_priv))
> +       if (HAS_DP20(display))
>                 intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
>                                             crtc_state);
>  
> @@ -2872,9 +2873,9 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
>         if (crtc_state->has_panel_replay)
>                 intel_psr_enable_sink(enc_to_intel_dp(encoder), crtc_state);
>  
> -       if (DISPLAY_VER(dev_priv) >= 14)
> +       if (DISPLAY_VER(display) >= 14)
>                 mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
> -       else if (DISPLAY_VER(dev_priv) >= 12)
> +       else if (DISPLAY_VER(display) >= 12)
>                 tgl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
>         else
>                 hsw_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
> @@ -3871,6 +3872,7 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state
> *crtc_state)
>  static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
>                                     struct intel_crtc_state *pipe_config)
>  {
> +       struct intel_display *display = to_intel_display(encoder);
>         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>         enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
> @@ -3960,7 +3962,7 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
>                                 intel_hdmi_infoframes_enabled(encoder, pipe_config);
>                 break;
>         case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
> -               if (!HAS_DP20(dev_priv)) {
> +               if (!HAS_DP20(display)) {
>                         /* FDI */
>                         pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG);
>                         pipe_config->enhanced_framing =
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e11993a6f042..c861a61839b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -151,7 +151,7 @@ struct intel_display_platforms {
>  #define HAS_DMC(i915)                  (DISPLAY_RUNTIME_INFO(i915)->has_dmc)
>  #define HAS_DOUBLE_BUFFERED_M_N(__display)     (DISPLAY_VER(__display) >= 9 || (__display)-
> >platform.broadwell)
>  #define HAS_DP_MST(i915)               (DISPLAY_INFO(i915)->has_dp_mst)
> -#define HAS_DP20(i915)                 (IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_DP20(__display)            ((__display)->platform.dg2 || DISPLAY_VER(__display) >=
> 14)
>  #define HAS_DPT(i915)                  (DISPLAY_VER(i915) >= 13)
>  #define HAS_DSB(i915)                  (DISPLAY_INFO(i915)->has_dsb)
>  #define HAS_DSC(__i915)                        (DISPLAY_RUNTIME_INFO(__i915)->has_dsc)
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index a784c0b81556..74c2e3635d9e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -3335,11 +3335,10 @@ void intel_psr_flush(struct intel_display *display,
>  void intel_psr_init(struct intel_dp *intel_dp)
>  {
>         struct intel_display *display = to_intel_display(intel_dp);
> -       struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_connector *connector = intel_dp->attached_connector;
>         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  
> -       if (!(HAS_PSR(display) || HAS_DP20(dev_priv)))
> +       if (!(HAS_PSR(display) || HAS_DP20(display)))
>                 return;
>  
>         /*
> @@ -3357,7 +3356,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
>                 return;
>         }
>  
> -       if ((HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp)) ||
> +       if ((HAS_DP20(display) && !intel_dp_is_edp(intel_dp)) ||
>             DISPLAY_VER(display) >= 20)
>                 intel_dp->psr.source_panel_replay_support = true;
>  
> @@ -3974,7 +3973,6 @@ DEFINE_SHOW_ATTRIBUTE(i915_psr_status);
>  void intel_psr_connector_debugfs_add(struct intel_connector *connector)
>  {
>         struct intel_display *display = to_intel_display(connector);
> -       struct drm_i915_private *i915 = to_i915(connector->base.dev);
>         struct dentry *root = connector->base.debugfs_entry;
>  
>         if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> @@ -3984,7 +3982,7 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
>         debugfs_create_file("i915_psr_sink_status", 0444, root,
>                             connector, &i915_psr_sink_status_fops);
>  
> -       if (HAS_PSR(display) || HAS_DP20(i915))
> +       if (HAS_PSR(display) || HAS_DP20(display))
>                 debugfs_create_file("i915_psr_status", 0444, root,
>                                     connector, &i915_psr_status_fops);
>  }

Re: [PATCH 06/15] drm/i915/display: convert HAS_GMBUS_BURST_READ() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_GMBUS_BURST_READ() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  drivers/gpu/drm/i915/display/intel_gmbus.c          | 3 +--
>  2 files changed, 2 insertions(+), 3 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index c861a61839b8..6279c6c6e831 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -160,7 +160,7 @@ struct intel_display_platforms {
>  #define HAS_FPGA_DBG_UNCLAIMED(i915)   (DISPLAY_INFO(i915)->has_fpga_dbg)
>  #define HAS_FW_BLC(i915)               (DISPLAY_VER(i915) >= 3)
>  #define HAS_GMBUS_IRQ(i915)            (DISPLAY_VER(i915) >= 4)
> -#define HAS_GMBUS_BURST_READ(i915)     (DISPLAY_VER(i915) >= 10 || IS_KABYLAKE(i915))
> +#define HAS_GMBUS_BURST_READ(__display)        (DISPLAY_VER(__display) >= 10 || (__display)-
> >platform.kabylake)
>  #define HAS_GMCH(i915)                 (DISPLAY_INFO(i915)->has_gmch)
>  #define HAS_HW_SAGV_WM(i915)           (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
>  #define HAS_IPC(i915)                  (DISPLAY_INFO(i915)->has_ipc)
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
> b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index e3d938c7f83e..807cf606e7a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -496,14 +496,13 @@ static int
>  gmbus_xfer_read(struct intel_display *display, struct i2c_msg *msg,
>                 u32 gmbus0_reg, u32 gmbus1_index)
>  {
> -       struct drm_i915_private *i915 = to_i915(display->drm);
>         u8 *buf = msg->buf;
>         unsigned int rx_size = msg->len;
>         unsigned int len;
>         int ret;
>  
>         do {
> -               if (HAS_GMBUS_BURST_READ(i915))
> +               if (HAS_GMBUS_BURST_READ(display))
>                         len = min(rx_size, INTEL_GMBUS_BURST_READ_MAX_LEN);
>                 else
>                         len = min(rx_size, gmbus_max_xfer_size(display));

Re: [PATCH 07/15] drm/i915/display: convert HAS_IPS() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_IPS() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/hsw_ips.c              | 4 +++-
>  drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  3 files changed, 6 insertions(+), 3 deletions(-)
> 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
> index 34c5d28fc866..ee815e0344e8 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -185,7 +185,9 @@ void hsw_ips_post_update(struct intel_atomic_state *state,
>  /* IPS only exists on ULT machines and is tied to pipe A. */
>  bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
>  {
> -       return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A;
> +       struct intel_display *display = to_intel_display(crtc);
> +
> +       return HAS_IPS(display) && crtc->pipe == PIPE_A;
>  }
>  
>  bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 57b42554d656..f53611e83502 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4545,6 +4545,7 @@ static int hsw_compute_linetime_wm(struct intel_atomic_state *state,
>  static int intel_crtc_atomic_check(struct intel_atomic_state *state,
>                                    struct intel_crtc *crtc)
>  {
> +       struct intel_display *display = to_intel_display(crtc);
>         struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>         struct intel_crtc_state *crtc_state =
>                 intel_atomic_get_new_crtc_state(state, crtc);
> @@ -4586,7 +4587,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
>                         return ret;
>         }
>  
> -       if (HAS_IPS(dev_priv)) {
> +       if (HAS_IPS(display)) {
>                 ret = hsw_ips_compute_config(state, crtc);
>                 if (ret)
>                         return ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 6279c6c6e831..b85b1d3ff708 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -164,7 +164,7 @@ struct intel_display_platforms {
>  #define HAS_GMCH(i915)                 (DISPLAY_INFO(i915)->has_gmch)
>  #define HAS_HW_SAGV_WM(i915)           (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
>  #define HAS_IPC(i915)                  (DISPLAY_INFO(i915)->has_ipc)
> -#define HAS_IPS(i915)                  (IS_HASWELL_ULT(i915) || IS_BROADWELL(i915))
> +#define HAS_IPS(__display)             ((__display)->platform.haswell_ult || (__display)-
> >platform.broadwell)
>  #define HAS_LRR(i915)                  (DISPLAY_VER(i915) >= 12)
>  #define HAS_LSPCON(i915)               (IS_DISPLAY_VER(i915, 9, 10))
>  #define HAS_MBUS_JOINING(i915)         (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)

Re: [PATCH 08/15] drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h    |  2 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c   | 18 ++++++++++--------
>  2 files changed, 11 insertions(+), 9 deletions(-)
> 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index b85b1d3ff708..a0fed40b7779 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -167,7 +167,7 @@ struct intel_display_platforms {
>  #define HAS_IPS(__display)             ((__display)->platform.haswell_ult || (__display)-
> >platform.broadwell)
>  #define HAS_LRR(i915)                  (DISPLAY_VER(i915) >= 12)
>  #define HAS_LSPCON(i915)               (IS_DISPLAY_VER(i915, 9, 10))
> -#define HAS_MBUS_JOINING(i915)         (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_MBUS_JOINING(__display)    ((__display)->platform.alderlake_p ||
> DISPLAY_VER(__display) >= 14)
>  #define HAS_MSO(i915)                  (DISPLAY_VER(i915) >= 12)
>  #define HAS_OVERLAY(i915)              (DISPLAY_INFO(i915)->has_overlay)
>  #define HAS_PSR(i915)                  (DISPLAY_INFO(i915)->has_psr)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 3b0e87edbacf..83e2cbbfcaf0 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2496,6 +2496,7 @@ static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state
> *dbuf_state)
>  static int
>  skl_compute_ddb(struct intel_atomic_state *state)
>  {
> +       struct intel_display *display = to_intel_display(state);
>         struct drm_i915_private *i915 = to_i915(state->base.dev);
>         const struct intel_dbuf_state *old_dbuf_state;
>         struct intel_dbuf_state *new_dbuf_state = NULL;
> @@ -2524,7 +2525,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
>                         return ret;
>         }
>  
> -       if (HAS_MBUS_JOINING(i915)) {
> +       if (HAS_MBUS_JOINING(display)) {
>                 new_dbuf_state->joined_mbus =
>                         adlp_check_mbus_joined(new_dbuf_state->active_pipes);
>  
> @@ -2984,7 +2985,7 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)
>                 to_intel_dbuf_state(i915->display.dbuf.obj.state);
>         struct intel_crtc *crtc;
>  
> -       if (HAS_MBUS_JOINING(i915))
> +       if (HAS_MBUS_JOINING(display))
>                 dbuf_state->joined_mbus = intel_de_read(i915, MBUS_CTL) & MBUS_JOIN;
>  
>         dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
> @@ -3562,23 +3563,24 @@ int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state
> *state,
>  void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
>                                          int ratio, bool joined_mbus)
>  {
> +       struct intel_display *display = &i915->display;
>         enum dbuf_slice slice;
>  
> -       if (!HAS_MBUS_JOINING(i915))
> +       if (!HAS_MBUS_JOINING(display))
>                 return;
>  
> -       if (DISPLAY_VER(i915) >= 20)
> -               intel_de_rmw(i915, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
> +       if (DISPLAY_VER(display) >= 20)
> +               intel_de_rmw(display, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
>                              MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));
>  
>         if (joined_mbus)
>                 ratio *= 2;
>  
> -       drm_dbg_kms(&i915->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
> +       drm_dbg_kms(display->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
>                     ratio, str_yes_no(joined_mbus));
>  
> -       for_each_dbuf_slice(i915, slice)
> -               intel_de_rmw(i915, DBUF_CTL_S(slice),
> +       for_each_dbuf_slice(display, slice)
> +               intel_de_rmw(display, DBUF_CTL_S(slice),
>                              DBUF_MIN_TRACKER_STATE_SERVICE_MASK,
>                              DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
>  }

Re: [PATCH 09/15] drm/i915/display: convert HAS_SAGV() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_SAGV() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h   |  3 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c  | 50 +++++++++++--------
>  2 files changed, 30 insertions(+), 23 deletions(-)
> 
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index a0fed40b7779..c23823769911 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -173,7 +173,8 @@ struct intel_display_platforms {
>  #define HAS_PSR(i915)                  (DISPLAY_INFO(i915)->has_psr)
>  #define HAS_PSR_HW_TRACKING(i915)      (DISPLAY_INFO(i915)->has_psr_hw_tracking)
>  #define HAS_PSR2_SEL_FETCH(i915)       (DISPLAY_VER(i915) >= 12)
> -#define HAS_SAGV(i915)                 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915) &&
> !IS_GEMINILAKE(i915))
> +#define HAS_SAGV(__display)            (DISPLAY_VER(__display) >= 9 && \
> +                                        !(__display)->platform.broxton && !(__display)-
> >platform.geminilake)
>  #define HAS_TRANSCODER(i915, trans)    ((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
>                                           BIT(trans)) != 0)
>  #define HAS_UNCOMPRESSED_JOINER(i915)  (DISPLAY_VER(i915) >= 13)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 83e2cbbfcaf0..09af693da586 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -77,20 +77,23 @@ static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915)
>  bool
>  intel_has_sagv(struct drm_i915_private *i915)
>  {
> -       return HAS_SAGV(i915) &&
> -               i915->display.sagv.status != I915_SAGV_NOT_CONTROLLED;
> +       struct intel_display *display = &i915->display;
> +
> +       return HAS_SAGV(display) && display->sagv.status != I915_SAGV_NOT_CONTROLLED;
>  }
>  
>  static u32
>  intel_sagv_block_time(struct drm_i915_private *i915)
>  {
> -       if (DISPLAY_VER(i915) >= 14) {
> +       struct intel_display *display = &i915->display;
> +
> +       if (DISPLAY_VER(display) >= 14) {
>                 u32 val;
>  
> -               val = intel_de_read(i915, MTL_LATENCY_SAGV);
> +               val = intel_de_read(display, MTL_LATENCY_SAGV);
>  
>                 return REG_FIELD_GET(MTL_LATENCY_QCLK_SAGV, val);
> -       } else if (DISPLAY_VER(i915) >= 12) {
> +       } else if (DISPLAY_VER(display) >= 12) {
>                 u32 val = 0;
>                 int ret;
>  
> @@ -98,14 +101,14 @@ intel_sagv_block_time(struct drm_i915_private *i915)
>                                      GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
>                                      &val, NULL);
>                 if (ret) {
> -                       drm_dbg_kms(&i915->drm, "Couldn't read SAGV block time!\n");
> +                       drm_dbg_kms(display->drm, "Couldn't read SAGV block time!\n");
>                         return 0;
>                 }
>  
>                 return val;
> -       } else if (DISPLAY_VER(i915) == 11) {
> +       } else if (DISPLAY_VER(display) == 11) {
>                 return 10;
> -       } else if (HAS_SAGV(i915)) {
> +       } else if (HAS_SAGV(display)) {
>                 return 30;
>         } else {
>                 return 0;
> @@ -114,31 +117,33 @@ intel_sagv_block_time(struct drm_i915_private *i915)
>  
>  static void intel_sagv_init(struct drm_i915_private *i915)
>  {
> -       if (!HAS_SAGV(i915))
> -               i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED;
> +       struct intel_display *display = &i915->display;
> +
> +       if (!HAS_SAGV(display))
> +               display->sagv.status = I915_SAGV_NOT_CONTROLLED;
>  
>         /*
>          * Probe to see if we have working SAGV control.
>          * For icl+ this was already determined by intel_bw_init_hw().
>          */
> -       if (DISPLAY_VER(i915) < 11)
> +       if (DISPLAY_VER(display) < 11)
>                 skl_sagv_disable(i915);
>  
> -       drm_WARN_ON(&i915->drm, i915->display.sagv.status == I915_SAGV_UNKNOWN);
> +       drm_WARN_ON(display->drm, display->sagv.status == I915_SAGV_UNKNOWN);
>  
> -       i915->display.sagv.block_time_us = intel_sagv_block_time(i915);
> +       display->sagv.block_time_us = intel_sagv_block_time(i915);
>  
> -       drm_dbg_kms(&i915->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
> -                   str_yes_no(intel_has_sagv(i915)), i915->display.sagv.block_time_us);
> +       drm_dbg_kms(display->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
> +                   str_yes_no(intel_has_sagv(i915)), display->sagv.block_time_us);
>  
>         /* avoid overflow when adding with wm0 latency/etc. */
> -       if (drm_WARN(&i915->drm, i915->display.sagv.block_time_us > U16_MAX,
> +       if (drm_WARN(display->drm, display->sagv.block_time_us > U16_MAX,
>                      "Excessive SAGV block time %u, ignoring\n",
> -                    i915->display.sagv.block_time_us))
> -               i915->display.sagv.block_time_us = 0;
> +                    display->sagv.block_time_us))
> +               display->sagv.block_time_us = 0;
>  
>         if (!intel_has_sagv(i915))
> -               i915->display.sagv.block_time_us = 0;
> +               display->sagv.block_time_us = 0;
>  }
>  
>  /*
> @@ -3832,13 +3837,14 @@ DEFINE_SHOW_ATTRIBUTE(intel_sagv_status);
>  
>  void skl_watermark_debugfs_register(struct drm_i915_private *i915)
>  {
> -       struct drm_minor *minor = i915->drm.primary;
> +       struct intel_display *display = &i915->display;
> +       struct drm_minor *minor = display->drm->primary;
>  
> -       if (HAS_IPC(i915))
> +       if (HAS_IPC(display))
>                 debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root, i915,
>                                     &skl_watermark_ipc_status_fops);
>  
> -       if (HAS_SAGV(i915))
> +       if (HAS_SAGV(display))
>                 debugfs_create_file("i915_sagv_status", 0444, minor->debugfs_root, i915,
>                                     &intel_sagv_status_fops);
>  }

Re: [PATCH 10/15] drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_HW_SAGV_WM() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cursor.c   |  5 ++-
>  .../drm/i915/display/intel_display_device.h   |  2 +-
>  .../drm/i915/display/skl_universal_plane.c    |  7 ++--
>  drivers/gpu/drm/i915/display/skl_watermark.c  | 33 +++++++++++--------
>  4 files changed, 25 insertions(+), 22 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
> b/drivers/gpu/drm/i915/display/intel_cursor.c
> index 9ba77970dab7..ed88a28a3afa 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -619,7 +619,6 @@ static void skl_write_cursor_wm(struct intel_dsb *dsb,
>                                 const struct intel_crtc_state *crtc_state)
>  {
>         struct intel_display *display = to_intel_display(plane->base.dev);
> -       struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum plane_id plane_id = plane->id;
>         enum pipe pipe = plane->pipe;
>         const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
> @@ -627,14 +626,14 @@ static void skl_write_cursor_wm(struct intel_dsb *dsb,
>                 &crtc_state->wm.skl.plane_ddb[plane_id];
>         int level;
>  
> -       for (level = 0; level < i915->display.wm.num_levels; level++)
> +       for (level = 0; level < display->wm.num_levels; level++)
>                 intel_de_write_dsb(display, dsb, CUR_WM(pipe, level),
>                                    skl_cursor_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id,
> level)));
>  
>         intel_de_write_dsb(display, dsb, CUR_WM_TRANS(pipe),
>                            skl_cursor_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id)));
>  
> -       if (HAS_HW_SAGV_WM(i915)) {
> +       if (HAS_HW_SAGV_WM(display)) {
>                 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id];
>  
>                 intel_de_write_dsb(display, dsb, CUR_WM_SAGV(pipe),
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index c23823769911..e1e718fced3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -162,7 +162,7 @@ struct intel_display_platforms {
>  #define HAS_GMBUS_IRQ(i915)            (DISPLAY_VER(i915) >= 4)
>  #define HAS_GMBUS_BURST_READ(__display)        (DISPLAY_VER(__display) >= 10 || (__display)-
> >platform.kabylake)
>  #define HAS_GMCH(i915)                 (DISPLAY_INFO(i915)->has_gmch)
> -#define HAS_HW_SAGV_WM(i915)           (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
> +#define HAS_HW_SAGV_WM(__display)      (DISPLAY_VER(__display) >= 13 && !(__display)-
> >platform.dgfx)
>  #define HAS_IPC(i915)                  (DISPLAY_INFO(i915)->has_ipc)
>  #define HAS_IPS(__display)             ((__display)->platform.haswell_ult || (__display)-
> >platform.broadwell)
>  #define HAS_LRR(i915)                  (DISPLAY_VER(i915) >= 12)
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 28f7f2405ef3..4c7bcf6806ff 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -736,7 +736,6 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
>                                const struct intel_crtc_state *crtc_state)
>  {
>         struct intel_display *display = to_intel_display(plane->base.dev);
> -       struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum plane_id plane_id = plane->id;
>         enum pipe pipe = plane->pipe;
>         const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
> @@ -746,14 +745,14 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
>                 &crtc_state->wm.skl.plane_ddb_y[plane_id];
>         int level;
>  
> -       for (level = 0; level < i915->display.wm.num_levels; level++)
> +       for (level = 0; level < display->wm.num_levels; level++)
>                 intel_de_write_dsb(display, dsb, PLANE_WM(pipe, plane_id, level),
>                                    skl_plane_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id,
> level)));
>  
>         intel_de_write_dsb(display, dsb, PLANE_WM_TRANS(pipe, plane_id),
>                            skl_plane_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id)));
>  
> -       if (HAS_HW_SAGV_WM(i915)) {
> +       if (HAS_HW_SAGV_WM(display)) {
>                 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id];
>  
>                 intel_de_write_dsb(display, dsb, PLANE_WM_SAGV(pipe, plane_id),
> @@ -765,7 +764,7 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
>         intel_de_write_dsb(display, dsb, PLANE_BUF_CFG(pipe, plane_id),
>                            skl_plane_ddb_reg_val(ddb));
>  
> -       if (DISPLAY_VER(i915) < 11)
> +       if (DISPLAY_VER(display) < 11)
>                 intel_de_write_dsb(display, dsb, PLANE_NV12_BUF_CFG(pipe, plane_id),
>                                    skl_plane_ddb_reg_val(ddb_y));
>  }
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 09af693da586..060e0cfcb47f 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -449,6 +449,7 @@ bool intel_can_enable_sagv(struct drm_i915_private *i915,
>  
>  static int intel_compute_sagv_mask(struct intel_atomic_state *state)
>  {
> +       struct intel_display *display = to_intel_display(state);
>         struct drm_i915_private *i915 = to_i915(state->base.dev);
>         int ret;
>         struct intel_crtc *crtc;
> @@ -484,7 +485,7 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state)
>                  * other crtcs can't be allowed to use the more optimal
>                  * normal (ie. non-SAGV) watermarks.
>                  */
> -               pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(i915) &&
> +               pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(display) &&
>                         DISPLAY_VER(i915) >= 12 &&
>                         intel_crtc_can_enable_sagv(new_crtc_state);
>  
> @@ -2748,10 +2749,10 @@ static bool skl_plane_selected_wm_equals(struct intel_plane *plane,
>                                          const struct skl_pipe_wm *old_pipe_wm,
>                                          const struct skl_pipe_wm *new_pipe_wm)
>  {
> -       struct drm_i915_private *i915 = to_i915(plane->base.dev);
> +       struct intel_display *display = to_intel_display(plane);
>         int level;
>  
> -       for (level = 0; level < i915->display.wm.num_levels; level++) {
> +       for (level = 0; level < display->wm.num_levels; level++) {
>                 /*
>                  * We don't check uv_wm as the hardware doesn't actually
>                  * use it. It only gets used for calculating the required
> @@ -2762,7 +2763,7 @@ static bool skl_plane_selected_wm_equals(struct intel_plane *plane,
>                         return false;
>         }
>  
> -       if (HAS_HW_SAGV_WM(i915)) {
> +       if (HAS_HW_SAGV_WM(display)) {
>                 const struct skl_plane_wm *old_wm = &old_pipe_wm->planes[plane->id];
>                 const struct skl_plane_wm *new_wm = &new_pipe_wm->planes[plane->id];
>  
> @@ -2937,6 +2938,7 @@ static void skl_wm_level_from_reg_val(u32 val, struct skl_wm_level *level)
>  static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
>                                      struct skl_pipe_wm *out)
>  {
> +       struct intel_display *display = to_intel_display(crtc);
>         struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>         enum pipe pipe = crtc->pipe;
>         enum plane_id plane_id;
> @@ -2962,7 +2964,7 @@ static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
>  
>                 skl_wm_level_from_reg_val(val, &wm->trans_wm);
>  
> -               if (HAS_HW_SAGV_WM(i915)) {
> +               if (HAS_HW_SAGV_WM(display)) {
>                         if (plane_id != PLANE_CURSOR)
>                                 val = intel_de_read(i915, PLANE_WM_SAGV(pipe, plane_id));
>                         else
> @@ -3131,6 +3133,7 @@ static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
>  void intel_wm_state_verify(struct intel_atomic_state *state,
>                            struct intel_crtc *crtc)
>  {
> +       struct intel_display *display = to_intel_display(state);
>         struct drm_i915_private *i915 = to_i915(state->base.dev);
>         const struct intel_crtc_state *new_crtc_state =
>                 intel_atomic_get_new_crtc_state(state, crtc);
> @@ -3205,7 +3208,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
>                 hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0;
>                 sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0;
>  
> -               if (HAS_HW_SAGV_WM(i915) &&
> +               if (HAS_HW_SAGV_WM(display) &&
>                     !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
>                         drm_err(&i915->drm,
>                                 "[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got
> e=%d b=%u l=%u)\n",
> @@ -3221,7 +3224,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
>                 hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm;
>                 sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm;
>  
> -               if (HAS_HW_SAGV_WM(i915) &&
> +               if (HAS_HW_SAGV_WM(display) &&
>                     !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
>                         drm_err(&i915->drm,
>                                 "[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u,
> got e=%d b=%u l=%u)\n",
> @@ -3392,17 +3395,19 @@ static void skl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
>  
>  static void skl_setup_wm_latency(struct drm_i915_private *i915)
>  {
> -       if (HAS_HW_SAGV_WM(i915))
> -               i915->display.wm.num_levels = 6;
> +       struct intel_display *display = &i915->display;
> +
> +       if (HAS_HW_SAGV_WM(display))
> +               display->wm.num_levels = 6;
>         else
> -               i915->display.wm.num_levels = 8;
> +               display->wm.num_levels = 8;
>  
> -       if (DISPLAY_VER(i915) >= 14)
> -               mtl_read_wm_latency(i915, i915->display.wm.skl_latency);
> +       if (DISPLAY_VER(display) >= 14)
> +               mtl_read_wm_latency(i915, display->wm.skl_latency);
>         else
> -               skl_read_wm_latency(i915, i915->display.wm.skl_latency);
> +               skl_read_wm_latency(i915, display->wm.skl_latency);
>  
> -       intel_print_wm_latency(i915, "Gen9 Plane", i915->display.wm.skl_latency);
> +       intel_print_wm_latency(i915, "Gen9 Plane", display->wm.skl_latency);
>  }
>  
>  static const struct intel_wm_funcs skl_wm_funcs = {

Re: [PATCH 11/15] drm/i915/display: convert HAS_ULTRAJOINER() to struct intel_display

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_ULTRAJOINER() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c         | 10 ++++++----
>  drivers/gpu/drm/i915/display/intel_display_debugfs.c |  4 ++--
>  drivers/gpu/drm/i915/display/intel_display_device.h  |  6 +++---
>  drivers/gpu/drm/i915/display/intel_dp.c              |  5 ++---
>  4 files changed, 13 insertions(+), 12 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f53611e83502..a3924bbb0d2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3746,12 +3746,13 @@ static u8 fixup_ultrajoiner_secondary_pipes(u8 ultrajoiner_primary_pipes,
>  static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915,
>                                       u8 *primary_pipes, u8 *secondary_pipes)
>  {
> +       struct intel_display *display = &i915->display;
>         struct intel_crtc *crtc;
>  
>         *primary_pipes = 0;
>         *secondary_pipes = 0;
>  
> -       if (!HAS_ULTRAJOINER(i915))
> +       if (!HAS_ULTRAJOINER(display))
>                 return;
>  
>         for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc,
> @@ -8310,11 +8311,12 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
>  
>  static int max_dotclock(struct drm_i915_private *i915)
>  {
> -       int max_dotclock = i915->display.cdclk.max_dotclk_freq;
> +       struct intel_display *display = &i915->display;
> +       int max_dotclock = display->cdclk.max_dotclk_freq;
>  
> -       if (HAS_ULTRAJOINER(i915))
> +       if (HAS_ULTRAJOINER(display))
>                 max_dotclock *= 4;
> -       else if (HAS_UNCOMPRESSED_JOINER(i915) || HAS_BIGJOINER(i915))
> +       else if (HAS_UNCOMPRESSED_JOINER(display) || HAS_BIGJOINER(display))
>                 max_dotclock *= 2;
>  
>         return max_dotclock;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 11aff485d8fa..2874867aae2b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1331,7 +1331,7 @@ static ssize_t i915_joiner_write(struct file *file,
>  {
>         struct seq_file *m = file->private_data;
>         struct intel_connector *connector = m->private;
> -       struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +       struct intel_display *display = to_intel_display(connector);
>         int force_joined_pipes = 0;
>         int ret;
>  
> @@ -1349,7 +1349,7 @@ static ssize_t i915_joiner_write(struct file *file,
>                 connector->force_joined_pipes = force_joined_pipes;
>                 break;
>         case 4:
> -               if (HAS_ULTRAJOINER(i915)) {
> +               if (HAS_ULTRAJOINER(display)) {
>                         connector->force_joined_pipes = force_joined_pipes;
>                         break;
>                 }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e1e718fced3c..548256401d0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -178,9 +178,9 @@ struct intel_display_platforms {
>  #define HAS_TRANSCODER(i915, trans)    ((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
>                                           BIT(trans)) != 0)
>  #define HAS_UNCOMPRESSED_JOINER(i915)  (DISPLAY_VER(i915) >= 13)
> -#define HAS_ULTRAJOINER(i915)          ((DISPLAY_VER(i915) >= 20 || \
> -                                         (IS_DGFX(i915) && DISPLAY_VER(i915) == 14)) && \
> -                                        HAS_DSC(i915))
> +#define HAS_ULTRAJOINER(__display)     ((DISPLAY_VER(__display) >= 20 || \
> +                                         ((__display)->platform.dgfx && DISPLAY_VER(__display) ==
> 14)) && \
> +                                        HAS_DSC(__display))
>  #define HAS_VRR(i915)                  (DISPLAY_VER(i915) >= 11)
>  #define HAS_AS_SDP(i915)               (DISPLAY_VER(i915) >= 13)
>  #define HAS_CMRR(i915)                 (DISPLAY_VER(i915) >= 20)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index a27da96d2c60..7d65945c9563 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1333,16 +1333,15 @@ int intel_dp_num_joined_pipes(struct intel_dp *intel_dp,
>                               int hdisplay, int clock)
>  {
>         struct intel_display *display = to_intel_display(intel_dp);
> -       struct drm_i915_private *i915 = to_i915(display->drm);
>  
>         if (connector->force_joined_pipes)
>                 return connector->force_joined_pipes;
>  
> -       if (HAS_ULTRAJOINER(i915) &&
> +       if (HAS_ULTRAJOINER(display) &&
>             intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 4))
>                 return 4;
>  
> -       if ((HAS_BIGJOINER(i915) || HAS_UNCOMPRESSED_JOINER(i915)) &&
> +       if ((HAS_BIGJOINER(display) || HAS_UNCOMPRESSED_JOINER(display)) &&
>             intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 2))
>                 return 2;
>  

Re: [PATCH 12/15] drm/i915/display: rename i915 parameter to __display in feature helpers

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> All the feature check helpers now support (and some require) passing
> struct intel_display. Rename the parameter to __display to reflect the
> fact.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h   | 112 +++++++++---------
>  1 file changed, 56 insertions(+), 56 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 548256401d0a..48f32280145f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -139,61 +139,61 @@ struct intel_display_platforms {
>         func(supports_tv);
>  
>  #define HAS_4TILE(__display)           ((__display)->platform.dg2 || DISPLAY_VER(__display) >=
> 14)
> -#define HAS_ASYNC_FLIPS(i915)          (DISPLAY_VER(i915) >= 5)
> -#define HAS_BIGJOINER(i915)            (DISPLAY_VER(i915) >= 11 && HAS_DSC(i915))
> -#define HAS_CDCLK_CRAWL(i915)          (DISPLAY_INFO(i915)->has_cdclk_crawl)
> -#define HAS_CDCLK_SQUASH(i915)         (DISPLAY_INFO(i915)->has_cdclk_squash)
> -#define HAS_CUR_FBC(i915)              (!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13))
> +#define HAS_ASYNC_FLIPS(__display)     (DISPLAY_VER(__display) >= 5)
> +#define HAS_BIGJOINER(__display)       (DISPLAY_VER(__display) >= 11 && HAS_DSC(__display))
> +#define HAS_CDCLK_CRAWL(__display)     (DISPLAY_INFO(__display)->has_cdclk_crawl)
> +#define HAS_CDCLK_SQUASH(__display)    (DISPLAY_INFO(__display)->has_cdclk_squash)
> +#define HAS_CUR_FBC(__display)         (!HAS_GMCH(__display) && IS_DISPLAY_VER(__display, 7, 13))
>  #define HAS_D12_PLANE_MINIMIZATION(__display)  ((__display)->platform.rocketlake || (__display)-
> >platform.alderlake_s)
> -#define HAS_DBUF_OVERLAP_DETECTION(__i915) (DISPLAY_RUNTIME_INFO(__i915)-
> >has_dbuf_overlap_detection)
> -#define HAS_DDI(i915)                  (DISPLAY_INFO(i915)->has_ddi)
> -#define HAS_DISPLAY(i915)              (DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
> -#define HAS_DMC(i915)                  (DISPLAY_RUNTIME_INFO(i915)->has_dmc)
> +#define HAS_DBUF_OVERLAP_DETECTION(__display)  (DISPLAY_RUNTIME_INFO(__display)-
> >has_dbuf_overlap_detection)
> +#define HAS_DDI(__display)             (DISPLAY_INFO(__display)->has_ddi)
> +#define HAS_DISPLAY(__display)         (DISPLAY_RUNTIME_INFO(__display)->pipe_mask != 0)
> +#define HAS_DMC(__display)             (DISPLAY_RUNTIME_INFO(__display)->has_dmc)
>  #define HAS_DOUBLE_BUFFERED_M_N(__display)     (DISPLAY_VER(__display) >= 9 || (__display)-
> >platform.broadwell)
> -#define HAS_DP_MST(i915)               (DISPLAY_INFO(i915)->has_dp_mst)
> +#define HAS_DP_MST(__display)          (DISPLAY_INFO(__display)->has_dp_mst)
>  #define HAS_DP20(__display)            ((__display)->platform.dg2 || DISPLAY_VER(__display) >=
> 14)
> -#define HAS_DPT(i915)                  (DISPLAY_VER(i915) >= 13)
> -#define HAS_DSB(i915)                  (DISPLAY_INFO(i915)->has_dsb)
> -#define HAS_DSC(__i915)                        (DISPLAY_RUNTIME_INFO(__i915)->has_dsc)
> -#define HAS_DSC_MST(__i915)            (DISPLAY_VER(__i915) >= 12 && HAS_DSC(__i915))
> -#define HAS_FBC(i915)                  (DISPLAY_RUNTIME_INFO(i915)->fbc_mask != 0)
> -#define HAS_FPGA_DBG_UNCLAIMED(i915)   (DISPLAY_INFO(i915)->has_fpga_dbg)
> -#define HAS_FW_BLC(i915)               (DISPLAY_VER(i915) >= 3)
> -#define HAS_GMBUS_IRQ(i915)            (DISPLAY_VER(i915) >= 4)
> +#define HAS_DPT(__display)             (DISPLAY_VER(__display) >= 13)
> +#define HAS_DSB(__display)             (DISPLAY_INFO(__display)->has_dsb)
> +#define HAS_DSC(__display)             (DISPLAY_RUNTIME_INFO(__display)->has_dsc)
> +#define HAS_DSC_MST(__display)         (DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
> +#define HAS_FBC(__display)             (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
> +#define HAS_FPGA_DBG_UNCLAIMED(__display)      (DISPLAY_INFO(__display)->has_fpga_dbg)
> +#define HAS_FW_BLC(__display)          (DISPLAY_VER(__display) >= 3)
> +#define HAS_GMBUS_IRQ(__display)       (DISPLAY_VER(__display) >= 4)
>  #define HAS_GMBUS_BURST_READ(__display)        (DISPLAY_VER(__display) >= 10 || (__display)-
> >platform.kabylake)
> -#define HAS_GMCH(i915)                 (DISPLAY_INFO(i915)->has_gmch)
> +#define HAS_GMCH(__display)            (DISPLAY_INFO(__display)->has_gmch)
>  #define HAS_HW_SAGV_WM(__display)      (DISPLAY_VER(__display) >= 13 && !(__display)-
> >platform.dgfx)
> -#define HAS_IPC(i915)                  (DISPLAY_INFO(i915)->has_ipc)
> +#define HAS_IPC(__display)             (DISPLAY_INFO(__display)->has_ipc)
>  #define HAS_IPS(__display)             ((__display)->platform.haswell_ult || (__display)-
> >platform.broadwell)
> -#define HAS_LRR(i915)                  (DISPLAY_VER(i915) >= 12)
> -#define HAS_LSPCON(i915)               (IS_DISPLAY_VER(i915, 9, 10))
> +#define HAS_LRR(__display)             (DISPLAY_VER(__display) >= 12)
> +#define HAS_LSPCON(__display)          (IS_DISPLAY_VER(__display, 9, 10))
>  #define HAS_MBUS_JOINING(__display)    ((__display)->platform.alderlake_p ||
> DISPLAY_VER(__display) >= 14)
> -#define HAS_MSO(i915)                  (DISPLAY_VER(i915) >= 12)
> -#define HAS_OVERLAY(i915)              (DISPLAY_INFO(i915)->has_overlay)
> -#define HAS_PSR(i915)                  (DISPLAY_INFO(i915)->has_psr)
> -#define HAS_PSR_HW_TRACKING(i915)      (DISPLAY_INFO(i915)->has_psr_hw_tracking)
> -#define HAS_PSR2_SEL_FETCH(i915)       (DISPLAY_VER(i915) >= 12)
> +#define HAS_MSO(__display)             (DISPLAY_VER(__display) >= 12)
> +#define HAS_OVERLAY(__display)         (DISPLAY_INFO(__display)->has_overlay)
> +#define HAS_PSR(__display)             (DISPLAY_INFO(__display)->has_psr)
> +#define HAS_PSR_HW_TRACKING(__display) (DISPLAY_INFO(__display)->has_psr_hw_tracking)
> +#define HAS_PSR2_SEL_FETCH(__display)  (DISPLAY_VER(__display) >= 12)
>  #define HAS_SAGV(__display)            (DISPLAY_VER(__display) >= 9 && \
>                                          !(__display)->platform.broxton && !(__display)-
> >platform.geminilake)
> -#define HAS_TRANSCODER(i915, trans)    ((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
> -                                         BIT(trans)) != 0)
> -#define HAS_UNCOMPRESSED_JOINER(i915)  (DISPLAY_VER(i915) >= 13)
> +#define HAS_TRANSCODER(__display, trans)       ((DISPLAY_RUNTIME_INFO(__display)-
> >cpu_transcoder_mask & \
> +                                                 BIT(trans)) != 0)
> +#define HAS_UNCOMPRESSED_JOINER(__display)     (DISPLAY_VER(__display) >= 13)
>  #define HAS_ULTRAJOINER(__display)     ((DISPLAY_VER(__display) >= 20 || \
>                                           ((__display)->platform.dgfx && DISPLAY_VER(__display) ==
> 14)) && \
>                                          HAS_DSC(__display))
> -#define HAS_VRR(i915)                  (DISPLAY_VER(i915) >= 11)
> -#define HAS_AS_SDP(i915)               (DISPLAY_VER(i915) >= 13)
> -#define HAS_CMRR(i915)                 (DISPLAY_VER(i915) >= 20)
> -#define INTEL_NUM_PIPES(i915)          (hweight8(DISPLAY_RUNTIME_INFO(i915)->pipe_mask))
> -#define I915_HAS_HOTPLUG(i915)         (DISPLAY_INFO(i915)->has_hotplug)
> -#define OVERLAY_NEEDS_PHYSICAL(i915)   (DISPLAY_INFO(i915)->overlay_needs_physical)
> -#define SUPPORTS_TV(i915)              (DISPLAY_INFO(i915)->supports_tv)
> +#define HAS_VRR(__display)             (DISPLAY_VER(__display) >= 11)
> +#define HAS_AS_SDP(__display)          (DISPLAY_VER(__display) >= 13)
> +#define HAS_CMRR(__display)            (DISPLAY_VER(__display) >= 20)
> +#define INTEL_NUM_PIPES(__display)     (hweight8(DISPLAY_RUNTIME_INFO(__display)->pipe_mask))
> +#define I915_HAS_HOTPLUG(__display)    (DISPLAY_INFO(__display)->has_hotplug)
> +#define OVERLAY_NEEDS_PHYSICAL(__display)      (DISPLAY_INFO(__display)->overlay_needs_physical)
> +#define SUPPORTS_TV(__display)         (DISPLAY_INFO(__display)->supports_tv)
>  
>  /* Check that device has a display IP version within the specific range. */
> -#define IS_DISPLAY_VERx100(__i915, from, until) ( \
> +#define IS_DISPLAY_VERx100(__display, from, until) ( \
>         BUILD_BUG_ON_ZERO((from) < 200) + \
> -       (DISPLAY_VERx100(__i915) >= (from) && \
> -        DISPLAY_VERx100(__i915) <= (until)))
> +       (DISPLAY_VERx100(__display) >= (from) && \
> +        DISPLAY_VERx100(__display) <= (until)))
>  
>  /*
>   * Check if a device has a specific IP version as well as a stepping within the
> @@ -204,30 +204,30 @@ struct intel_display_platforms {
>   * hardware fix is present and the software workaround is no longer necessary.
>   * E.g.,
>   *
> - *    IS_DISPLAY_VERx100_STEP(i915, 1400, STEP_A0, STEP_B2)
> - *    IS_DISPLAY_VERx100_STEP(i915, 1400, STEP_C0, STEP_FOREVER)
> + *    IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_B2)
> + *    IS_DISPLAY_VERx100_STEP(display, 1400, STEP_C0, STEP_FOREVER)
>   *
>   * "STEP_FOREVER" can be passed as "until" for workarounds that have no upper
>   * stepping bound for the specified IP version.
>   */
> -#define IS_DISPLAY_VERx100_STEP(__i915, ipver, from, until) \
> -       (IS_DISPLAY_VERx100((__i915), (ipver), (ipver)) && \
> -        IS_DISPLAY_STEP((__i915), (from), (until)))
> +#define IS_DISPLAY_VERx100_STEP(__display, ipver, from, until) \
> +       (IS_DISPLAY_VERx100((__display), (ipver), (ipver)) && \
> +        IS_DISPLAY_STEP((__display), (from), (until)))
>  
> -#define DISPLAY_INFO(i915)             (__to_intel_display(i915)->info.__device_info)
> -#define DISPLAY_RUNTIME_INFO(i915)     (&__to_intel_display(i915)->info.__runtime_info)
> +#define DISPLAY_INFO(__display)                (__to_intel_display(__display)-
> >info.__device_info)
> +#define DISPLAY_RUNTIME_INFO(__display)        (&__to_intel_display(__display)-
> >info.__runtime_info)
>  
> -#define DISPLAY_VER(i915)      (DISPLAY_RUNTIME_INFO(i915)->ip.ver)
> -#define DISPLAY_VERx100(i915)  (DISPLAY_RUNTIME_INFO(i915)->ip.ver * 100 + \
> -                                DISPLAY_RUNTIME_INFO(i915)->ip.rel)
> -#define IS_DISPLAY_VER(i915, from, until) \
> -       (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
> +#define DISPLAY_VER(__display)         (DISPLAY_RUNTIME_INFO(__display)->ip.ver)
> +#define DISPLAY_VERx100(__display)     (DISPLAY_RUNTIME_INFO(__display)->ip.ver * 100 + \
> +                                        DISPLAY_RUNTIME_INFO(__display)->ip.rel)
> +#define IS_DISPLAY_VER(__display, from, until) \
> +       (DISPLAY_VER(__display) >= (from) && DISPLAY_VER(__display) <= (until))
>  
> -#define INTEL_DISPLAY_STEP(__i915) (DISPLAY_RUNTIME_INFO(__i915)->step)
> +#define INTEL_DISPLAY_STEP(__display)  (DISPLAY_RUNTIME_INFO(__display)->step)
>  
> -#define IS_DISPLAY_STEP(__i915, since, until) \
> -       (drm_WARN_ON(__to_intel_display(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
> -        INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) < (until))
> +#define IS_DISPLAY_STEP(__display, since, until) \
> +       (drm_WARN_ON(__to_intel_display(__display)->drm, INTEL_DISPLAY_STEP(__display) ==
> STEP_NONE), \
> +        INTEL_DISPLAY_STEP(__display) >= (since) && INTEL_DISPLAY_STEP(__display) < (until))
>  
>  struct intel_display_runtime_info {
>         struct intel_display_ip_ver {

✗ Fi.CI.IGT: failure for drm/i915/display: convert display feature helpers to struct intel_display (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 91000 bytes --]

== Series Details ==

Series: drm/i915/display: convert display feature helpers to struct intel_display (rev3)
URL   : https://patchwork.freedesktop.org/series/140886/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15642_full -> Patchwork_140886v3_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_140886v3_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_140886v3_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 9)
------------------------------

  Missing    (1): shard-glk-0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_140886v3_full:

### CI changes ###

#### Possible regressions ####

  * boot:
    - shard-dg1:          ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [FAIL][47], [PASS][48], [PASS][49], [PASS][50])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-17/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-17/boot.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-17/boot.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-16/boot.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-12/boot.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-12/boot.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-12/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-12/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-13/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-13/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-14/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-14/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-14/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-14/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-15/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-15/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-15/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-15/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-19/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-19/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-16/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-16/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-16/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-19/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-19/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-12/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-12/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-13/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-13/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-13/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-14/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-14/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-14/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-14/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-15/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-15/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-15/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-17/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-18/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-18/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-18/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-19/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-19/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-19/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-12/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-12/boot.html
    - shard-snb:          ([PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75]) -> ([PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [FAIL][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb1/boot.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb2/boot.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb2/boot.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb2/boot.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb2/boot.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb1/boot.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb1/boot.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb1/boot.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb7/boot.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb7/boot.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb7/boot.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb7/boot.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb6/boot.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb6/boot.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb6/boot.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb6/boot.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb5/boot.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb5/boot.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb5/boot.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb5/boot.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb5/boot.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb4/boot.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb4/boot.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb4/boot.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb4/boot.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb7/boot.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb7/boot.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb7/boot.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb7/boot.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb7/boot.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb6/boot.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb6/boot.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb6/boot.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb6/boot.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb5/boot.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb5/boot.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb5/boot.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb5/boot.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb4/boot.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb4/boot.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb4/boot.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb4/boot.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb2/boot.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb2/boot.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb2/boot.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb2/boot.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb1/boot.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb1/boot.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb1/boot.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb1/boot.html

  

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-dg2:          [PASS][101] -> [SKIP][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-11/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-11/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][103] -> [FAIL][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-tglu-8/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-6/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html

  
#### Warnings ####

  * igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
    - shard-glk:          [SKIP][105] -> [INCOMPLETE][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk8/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk1/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html

  
Known issues
------------

  Here are the changes found in Patchwork_140886v3_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#8411])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#11078])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@device_reset@unbind-reset-rebind:
    - shard-dg1:          NOTRUN -> [ABORT][109] ([i915#11814] / [i915#11815])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/igt@device_reset@unbind-reset-rebind.html

  * igt@drm_fdinfo@virtual-busy-all:
    - shard-dg1:          NOTRUN -> [SKIP][110] ([i915#8414])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-13/igt@drm_fdinfo@virtual-busy-all.html
    - shard-mtlp:         NOTRUN -> [SKIP][111] ([i915#8414])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-6/igt@drm_fdinfo@virtual-busy-all.html

  * igt@gem_basic@multigpu-create-close:
    - shard-tglu:         NOTRUN -> [SKIP][112] ([i915#7697])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@gem_basic@multigpu-create-close.html
    - shard-dg2:          NOTRUN -> [SKIP][113] ([i915#7697])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@gem_basic@multigpu-create-close.html

  * igt@gem_busy@close-race:
    - shard-rkl:          NOTRUN -> [FAIL][114] ([i915#12296] / [i915#12577])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@gem_busy@close-race.html

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-tglu:         NOTRUN -> [SKIP][115] ([i915#3555] / [i915#9323])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-mtlp:         NOTRUN -> [SKIP][116] ([i915#7697])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-8/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_ctx_engines@invalid-engines:
    - shard-tglu:         [PASS][117] -> [FAIL][118] ([i915#12031])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-tglu-9/igt@gem_ctx_engines@invalid-engines.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-8/igt@gem_ctx_engines@invalid-engines.html

  * igt@gem_ctx_persistence@heartbeat-many:
    - shard-dg2:          NOTRUN -> [SKIP][119] ([i915#8555])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gem_ctx_persistence@heartbeat-many.html

  * igt@gem_ctx_sseu@engines:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#280])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gem_ctx_sseu@engines.html
    - shard-tglu:         NOTRUN -> [SKIP][121] ([i915#280])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@gem_ctx_sseu@engines.html

  * igt@gem_eio@hibernate:
    - shard-dg1:          [PASS][122] -> [ABORT][123] ([i915#7975] / [i915#8213])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-15/igt@gem_eio@hibernate.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-14/igt@gem_eio@hibernate.html

  * igt@gem_eio@reset-stress:
    - shard-dg1:          [PASS][124] -> [FAIL][125] ([i915#12543] / [i915#5784])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-15/igt@gem_eio@reset-stress.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-18/igt@gem_eio@reset-stress.html

  * igt@gem_exec_balancer@bonded-true-hang:
    - shard-dg2:          NOTRUN -> [SKIP][126] ([i915#4812]) +3 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gem_exec_balancer@bonded-true-hang.html

  * igt@gem_exec_balancer@invalid-bonds:
    - shard-dg2:          NOTRUN -> [SKIP][127] ([i915#4036])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@gem_exec_balancer@invalid-bonds.html

  * igt@gem_exec_balancer@nop:
    - shard-mtlp:         [PASS][128] -> [DMESG-WARN][129] ([i915#12412])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-mtlp-1/igt@gem_exec_balancer@nop.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-7/igt@gem_exec_balancer@nop.html

  * igt@gem_exec_balancer@parallel:
    - shard-rkl:          NOTRUN -> [SKIP][130] ([i915#4525])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@gem_exec_balancer@parallel.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-tglu:         NOTRUN -> [FAIL][131] ([i915#6117])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_fair@basic-none:
    - shard-tglu-1:       NOTRUN -> [FAIL][132] ([i915#2842]) +5 other tests fail
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@gem_exec_fair@basic-none.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-rkl:          NOTRUN -> [FAIL][133] ([i915#2842]) +3 other tests fail
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_flush@basic-wb-pro-default:
    - shard-dg2:          NOTRUN -> [SKIP][134] ([i915#3539] / [i915#4852]) +1 other test skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@gem_exec_flush@basic-wb-pro-default.html

  * igt@gem_exec_params@secure-non-master:
    - shard-dg2:          NOTRUN -> [SKIP][135] +8 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gem_exec_params@secure-non-master.html

  * igt@gem_exec_reloc@basic-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#3281])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-8/igt@gem_exec_reloc@basic-cpu.html

  * igt@gem_exec_reloc@basic-wc-active:
    - shard-dg1:          NOTRUN -> [SKIP][137] ([i915#3281]) +1 other test skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/igt@gem_exec_reloc@basic-wc-active.html

  * igt@gem_exec_reloc@basic-wc-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#3281]) +5 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@gem_exec_reloc@basic-wc-gtt.html

  * igt@gem_exec_reloc@basic-write-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([i915#3281]) +3 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@gem_exec_reloc@basic-write-cpu.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain:
    - shard-dg2:          NOTRUN -> [SKIP][140] ([i915#4537] / [i915#4812])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@gem_exec_schedule@preempt-queue-contexts-chain.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-rkl:          NOTRUN -> [ABORT][141] ([i915#7975] / [i915#8213]) +1 other test abort
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglu:         NOTRUN -> [SKIP][142] ([i915#2190])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][143] ([i915#4613]) +1 other test skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-rkl:          NOTRUN -> [SKIP][144] ([i915#4613]) +2 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_media_fill@media-fill:
    - shard-dg2:          NOTRUN -> [SKIP][145] ([i915#8289])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gem_media_fill@media-fill.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-dg2:          NOTRUN -> [SKIP][146] ([i915#4077]) +5 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@gem_mmap_gtt@medium-copy-odd:
    - shard-mtlp:         NOTRUN -> [SKIP][147] ([i915#4077]) +2 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@gem_mmap_gtt@medium-copy-odd.html

  * igt@gem_mmap_wc@bad-size:
    - shard-dg2:          NOTRUN -> [SKIP][148] ([i915#4083])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@gem_mmap_wc@bad-size.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-display:
    - shard-dg2:          NOTRUN -> [SKIP][149] ([i915#3282]) +2 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gem_partial_pwrite_pread@writes-after-reads-display.html

  * igt@gem_pread@snoop:
    - shard-rkl:          NOTRUN -> [SKIP][150] ([i915#3282]) +2 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@gem_pread@snoop.html

  * igt@gem_pxp@display-protected-crc:
    - shard-tglu-1:       NOTRUN -> [SKIP][151] ([i915#4270])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@gem_pxp@display-protected-crc.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
    - shard-tglu:         NOTRUN -> [SKIP][152] ([i915#4270]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-rkl:          NOTRUN -> [SKIP][153] ([i915#4270]) +1 other test skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
    - shard-dg2:          NOTRUN -> [SKIP][154] ([i915#4270])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-10/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][155] ([i915#8428])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-8/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled.html

  * igt@gem_render_copy@yf-tiled-to-vebox-y-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][156] ([i915#5190] / [i915#8428]) +3 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gem_render_copy@yf-tiled-to-vebox-y-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][157] ([i915#4079])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap:
    - shard-mtlp:         NOTRUN -> [SKIP][158] ([i915#3297])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#3297]) +1 other test skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@gem_userptr_blits@unsync-overlap.html
    - shard-tglu:         NOTRUN -> [SKIP][160] ([i915#3297]) +1 other test skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gen9_exec_parse@bb-large:
    - shard-mtlp:         NOTRUN -> [SKIP][161] ([i915#2856])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-7/igt@gen9_exec_parse@bb-large.html

  * igt@gen9_exec_parse@bb-start-cmd:
    - shard-tglu-1:       NOTRUN -> [SKIP][162] ([i915#2527] / [i915#2856]) +2 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@gen9_exec_parse@bb-start-cmd.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-rkl:          NOTRUN -> [SKIP][163] ([i915#2527]) +2 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@gen9_exec_parse@bb-start-far.html

  * igt@gen9_exec_parse@cmd-crossing-page:
    - shard-tglu:         NOTRUN -> [SKIP][164] ([i915#2527] / [i915#2856]) +1 other test skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@gen9_exec_parse@cmd-crossing-page.html
    - shard-dg2:          NOTRUN -> [SKIP][165] ([i915#2856])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@gen9_exec_parse@cmd-crossing-page.html

  * igt@i915_pm_freq_api@freq-basic-api:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#8399])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@i915_pm_freq_api@freq-basic-api.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][167] ([i915#8399])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_freq_mult@media-freq@gt0:
    - shard-tglu:         NOTRUN -> [SKIP][168] ([i915#6590]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@i915_pm_freq_mult@media-freq@gt0.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-dg1:          [PASS][169] -> [FAIL][170] ([i915#12548] / [i915#3591])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle.html
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0:
    - shard-dg1:          [PASS][171] -> [FAIL][172] ([i915#3591])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html

  * igt@i915_pm_rpm@gem-execbuf-stress:
    - shard-dg1:          [PASS][173] -> [DMESG-WARN][174] ([i915#4423]) +1 other test dmesg-warn
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-15/igt@i915_pm_rpm@gem-execbuf-stress.html
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-18/igt@i915_pm_rpm@gem-execbuf-stress.html

  * igt@i915_pm_rps@engine-order:
    - shard-glk:          ([PASS][175], [PASS][176]) -> [FAIL][177] ([i915#12308])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk1/igt@i915_pm_rps@engine-order.html
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk4/igt@i915_pm_rps@engine-order.html
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk5/igt@i915_pm_rps@engine-order.html

  * igt@i915_pm_rps@thresholds-park:
    - shard-dg2:          NOTRUN -> [SKIP][178] ([i915#11681])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@i915_pm_rps@thresholds-park.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-tglu-1:       NOTRUN -> [SKIP][179] ([i915#5723])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@i915_query@test-query-geometry-subslices.html

  * igt@i915_selftest@mock@memory_region:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][180] ([i915#9311]) +1 other test dmesg-warn
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@i915_selftest@mock@memory_region.html

  * igt@intel_hwmon@hwmon-read:
    - shard-tglu-1:       NOTRUN -> [SKIP][181] ([i915#7707])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@intel_hwmon@hwmon-read.html

  * igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#4212]) +1 other test skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][183] ([i915#8709]) +7 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-12/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-rkl:          NOTRUN -> [SKIP][184] ([i915#9531])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-0:
    - shard-tglu-1:       NOTRUN -> [SKIP][185] ([i915#5286]) +2 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-addfb-size-overflow:
    - shard-rkl:          NOTRUN -> [SKIP][186] ([i915#5286]) +1 other test skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@kms_big_fb@4-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-tglu:         NOTRUN -> [SKIP][187] ([i915#5286]) +3 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][188] ([i915#3638]) +2 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][189] ([i915#5190]) +1 other test skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][190] ([i915#4538] / [i915#5190]) +6 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][191] ([i915#6095]) +4 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-6/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][192] ([i915#12313])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][193] ([i915#10307] / [i915#10434] / [i915#6095]) +4 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-4/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([i915#6095]) +49 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][195] ([i915#6095]) +96 other tests skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-tglu-1:       NOTRUN -> [SKIP][196] ([i915#6095]) +49 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][197] ([i915#10307] / [i915#6095]) +119 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-11/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][198] ([i915#6095]) +131 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-13/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-dg2:          NOTRUN -> [SKIP][199] ([i915#11616] / [i915#7213])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_cdclk@mode-transition-all-outputs.html
    - shard-tglu:         NOTRUN -> [SKIP][200] ([i915#3742])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k:
    - shard-tglu:         NOTRUN -> [SKIP][201] ([i915#7828]) +7 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k.html

  * igt@kms_chamelium_frames@dp-crc-fast:
    - shard-dg2:          NOTRUN -> [SKIP][202] ([i915#7828]) +6 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-1/igt@kms_chamelium_frames@dp-crc-fast.html
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#7828]) +4 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_chamelium_frames@dp-crc-fast.html

  * igt@kms_chamelium_frames@dp-crc-single:
    - shard-tglu-1:       NOTRUN -> [SKIP][204] ([i915#7828]) +5 other tests skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_chamelium_frames@dp-crc-single.html

  * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][205] ([i915#7828])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][206] ([i915#3116])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@lic-type-0:
    - shard-tglu:         NOTRUN -> [SKIP][207] ([i915#6944] / [i915#9424])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_content_protection@lic-type-0.html
    - shard-dg2:          NOTRUN -> [SKIP][208] ([i915#9424])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@lic-type-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][209] ([i915#6944] / [i915#9424])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@type1:
    - shard-dg2:          NOTRUN -> [SKIP][210] ([i915#7118] / [i915#9424])
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_content_protection@type1.html
    - shard-tglu:         NOTRUN -> [SKIP][211] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][212] ([i915#11453] / [i915#3359])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-tglu-1:       NOTRUN -> [SKIP][213] ([i915#3555]) +3 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x32:
    - shard-dg2:          NOTRUN -> [SKIP][214] ([i915#3555])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-32x32:
    - shard-tglu:         NOTRUN -> [SKIP][215] ([i915#3555]) +1 other test skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_cursor_crc@cursor-sliding-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-rkl:          NOTRUN -> [SKIP][216] ([i915#3555]) +1 other test skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-dg2:          NOTRUN -> [SKIP][217] ([i915#4103] / [i915#4213])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
    - shard-tglu:         NOTRUN -> [SKIP][218] ([i915#4103])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-tglu:         NOTRUN -> [SKIP][219] ([i915#9723])
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][220] ([i915#3804])
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_draw_crc@draw-method-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][221] ([i915#8812])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_draw_crc@draw-method-mmap-gtt.html

  * igt@kms_dsc@dsc-basic:
    - shard-tglu-1:       NOTRUN -> [SKIP][222] ([i915#3555] / [i915#3840]) +1 other test skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-dg2:          NOTRUN -> [SKIP][223] ([i915#3555] / [i915#3840])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-tglu:         NOTRUN -> [SKIP][224] ([i915#3555] / [i915#3840])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-rkl:          NOTRUN -> [SKIP][225] ([i915#3555] / [i915#3840])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-tglu-1:       NOTRUN -> [SKIP][226] ([i915#3469])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@display-3x:
    - shard-dg2:          NOTRUN -> [SKIP][227] ([i915#1839])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@kms_feature_discovery@display-3x.html
    - shard-tglu:         NOTRUN -> [SKIP][228] ([i915#1839])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-tglu-1:       NOTRUN -> [SKIP][229] ([i915#1839])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][230] ([i915#3637]) +2 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          NOTRUN -> [SKIP][231] +16 other tests skip
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-1/igt@kms_flip@2x-plain-flip.html
    - shard-tglu-1:       NOTRUN -> [SKIP][232] ([i915#3637]) +4 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-panning-interruptible:
    - shard-mtlp:         NOTRUN -> [INCOMPLETE][233] ([i915#10056] / [i915#6113])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-8/igt@kms_flip@flip-vs-panning-interruptible.html

  * igt@kms_flip@flip-vs-panning-interruptible@a-edp1:
    - shard-mtlp:         NOTRUN -> [INCOMPLETE][234] ([i915#6113])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-8/igt@kms_flip@flip-vs-panning-interruptible@a-edp1.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a1:
    - shard-tglu-1:       NOTRUN -> [FAIL][235] ([i915#2122]) +2 other tests fail
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][236] ([i915#2672] / [i915#3555]) +1 other test skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][237] ([i915#2587] / [i915#2672]) +2 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-rkl:          NOTRUN -> [SKIP][238] ([i915#2672] / [i915#3555]) +1 other test skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][239] ([i915#2587] / [i915#2672] / [i915#3555])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][240] ([i915#2672] / [i915#3555] / [i915#8813])
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][241] ([i915#2672] / [i915#8813])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][242] ([i915#2672]) +1 other test skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][243] ([i915#2672] / [i915#3555]) +1 other test skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][244] ([i915#2587] / [i915#2672]) +1 other test skip
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-dg2:          NOTRUN -> [SKIP][245] ([i915#2672] / [i915#3555] / [i915#5190])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][246] ([i915#2672])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render:
    - shard-snb:          [PASS][247] -> [SKIP][248] +1 other test skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render.html
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][249] ([i915#1825]) +2 other tests skip
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-tglu-1:       NOTRUN -> [SKIP][250] ([i915#5439])
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][251] ([i915#3458]) +8 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][252] ([i915#8708]) +7 other tests skip
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
    - shard-rkl:          NOTRUN -> [SKIP][253] ([i915#1825]) +16 other tests skip
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-tglu-1:       NOTRUN -> [SKIP][254] +44 other tests skip
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-rte:
    - shard-rkl:          NOTRUN -> [SKIP][255] ([i915#3023]) +10 other tests skip
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-rte.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][256] ([i915#5354]) +18 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][257] ([i915#3555] / [i915#8228]) +1 other test skip
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-dg2:          [PASS][258] -> [SKIP][259] ([i915#3555] / [i915#8228])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-10/igt@kms_hdr@invalid-metadata-sizes.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][260] ([i915#3555] / [i915#8228]) +1 other test skip
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][261] ([i915#10656])
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_joiner@basic-big-joiner.html
    - shard-tglu:         NOTRUN -> [SKIP][262] ([i915#10656])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][263] ([i915#12388])
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][264] ([i915#12339])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-dg1:          NOTRUN -> [SKIP][265] ([i915#12388])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-18/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_panel_fitting@legacy:
    - shard-tglu-1:       NOTRUN -> [SKIP][266] ([i915#6301])
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a:
    - shard-rkl:          NOTRUN -> [SKIP][267] ([i915#12247]) +4 other tests skip
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][268] ([i915#12247]) +4 other tests skip
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d:
    - shard-tglu-1:       NOTRUN -> [SKIP][269] ([i915#12247]) +9 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
    - shard-dg1:          NOTRUN -> [SKIP][270] ([i915#12247] / [i915#6953])
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b:
    - shard-dg1:          NOTRUN -> [SKIP][271] ([i915#12247] / [i915#12504]) +2 other tests skip
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d:
    - shard-dg1:          NOTRUN -> [SKIP][272] ([i915#12247])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-16/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][273] ([i915#12247] / [i915#6953])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][274] ([i915#9812])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-dg2:          NOTRUN -> [SKIP][275] ([i915#9685])
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-tglu:         NOTRUN -> [SKIP][276] ([i915#3828])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          NOTRUN -> [SKIP][277] ([i915#9519])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
    - shard-tglu-1:       NOTRUN -> [SKIP][278] ([i915#9519])
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [PASS][279] -> [SKIP][280] ([i915#9519]) +1 other test skip
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp.html
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][281] ([i915#6524])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-rkl:          NOTRUN -> [SKIP][282] ([i915#11520]) +1 other test skip
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
    - shard-tglu-1:       NOTRUN -> [SKIP][283] ([i915#11520]) +4 other tests skip
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-tglu:         NOTRUN -> [SKIP][284] ([i915#11520]) +4 other tests skip
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
    - shard-dg2:          NOTRUN -> [SKIP][285] ([i915#11520]) +3 other tests skip
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2:          NOTRUN -> [SKIP][286] ([i915#9683]) +1 other test skip
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
    - shard-tglu:         NOTRUN -> [SKIP][287] ([i915#9683]) +1 other test skip
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-tglu-1:       NOTRUN -> [SKIP][288] ([i915#9683])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-cursor-blt:
    - shard-tglu:         NOTRUN -> [SKIP][289] ([i915#9732]) +13 other tests skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_psr@fbc-pr-cursor-blt.html

  * igt@kms_psr@fbc-psr-sprite-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][290] ([i915#1072] / [i915#9732])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-18/igt@kms_psr@fbc-psr-sprite-mmap-gtt.html

  * igt@kms_psr@pr-cursor-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][291] ([i915#9688])
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@kms_psr@pr-cursor-mmap-cpu.html

  * igt@kms_psr@psr-sprite-plane-move:
    - shard-rkl:          NOTRUN -> [SKIP][292] ([i915#1072] / [i915#9732]) +9 other tests skip
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@kms_psr@psr-sprite-plane-move.html

  * igt@kms_psr@psr-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][293] ([i915#1072] / [i915#9732]) +13 other tests skip
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@kms_psr@psr-suspend.html

  * igt@kms_psr@psr2-sprite-mmap-gtt:
    - shard-tglu-1:       NOTRUN -> [SKIP][294] ([i915#9732]) +11 other tests skip
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_psr@psr2-sprite-mmap-gtt.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-tglu:         NOTRUN -> [SKIP][295] ([i915#9685]) +2 other tests skip
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-dg2:          NOTRUN -> [SKIP][296] ([i915#11131] / [i915#4235])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-tglu-1:       NOTRUN -> [SKIP][297] ([i915#5289]) +1 other test skip
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-tglu-1:       NOTRUN -> [ABORT][298] ([i915#12231]) +1 other test abort
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_setmode@basic:
    - shard-tglu:         [PASS][299] -> [FAIL][300] ([i915#5465]) +1 other test fail
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-tglu-8/igt@kms_setmode@basic.html
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-6/igt@kms_setmode@basic.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1:
    - shard-glk:          ([PASS][301], [PASS][302]) -> [FAIL][303] ([i915#5465]) +2 other tests fail
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk3/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk9/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk9/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-2:
    - shard-glk:          ([PASS][304], [PASS][305]) -> [FAIL][306] ([i915#12527] / [i915#5465]) +1 other test fail
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk9/igt@kms_setmode@basic@pipe-a-hdmi-a-2.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk3/igt@kms_setmode@basic@pipe-a-hdmi-a-2.html
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk9/igt@kms_setmode@basic@pipe-a-hdmi-a-2.html

  * igt@kms_setmode@basic@pipe-b-dp-4:
    - shard-dg2:          NOTRUN -> [FAIL][307] ([i915#5465]) +1 other test fail
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-10/igt@kms_setmode@basic@pipe-b-dp-4.html

  * igt@kms_vrr@lobf:
    - shard-dg2:          NOTRUN -> [SKIP][308] ([i915#11920])
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-6/igt@kms_vrr@lobf.html
    - shard-tglu:         NOTRUN -> [SKIP][309] ([i915#11920])
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@kms_vrr@lobf.html

  * igt@kms_vrr@max-min:
    - shard-tglu-1:       NOTRUN -> [SKIP][310] ([i915#9906]) +1 other test skip
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@kms_vrr@max-min.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-dg2:          NOTRUN -> [SKIP][311] ([i915#2437] / [i915#9412])
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@kms_writeback@writeback-check-output-xrgb2101010.html
    - shard-tglu:         NOTRUN -> [SKIP][312] ([i915#2437] / [i915#9412])
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@perf@gen12-group-concurrent-oa-buffer-read:
    - shard-rkl:          [PASS][313] -> [FAIL][314] ([i915#10538])
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-rkl-5/igt@perf@gen12-group-concurrent-oa-buffer-read.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-4/igt@perf@gen12-group-concurrent-oa-buffer-read.html

  * igt@perf_pmu@busy-double-start:
    - shard-mtlp:         NOTRUN -> [FAIL][315] ([i915#4349]) +1 other test fail
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-2/igt@perf_pmu@busy-double-start.html

  * igt@perf_pmu@busy-idle@ccs0:
    - shard-mtlp:         [PASS][316] -> [FAIL][317] ([i915#4349])
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-mtlp-7/igt@perf_pmu@busy-idle@ccs0.html
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-3/igt@perf_pmu@busy-idle@ccs0.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-rkl:          NOTRUN -> [SKIP][318] ([i915#8516])
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-5/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@fence-write-hang:
    - shard-tglu:         NOTRUN -> [SKIP][319] +57 other tests skip
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-2/igt@prime_vgem@fence-write-hang.html
    - shard-dg2:          NOTRUN -> [SKIP][320] ([i915#3708])
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-5/igt@prime_vgem@fence-write-hang.html

  * igt@sriov_basic@enable-vfs-autoprobe-on:
    - shard-mtlp:         NOTRUN -> [SKIP][321] ([i915#9917])
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-8/igt@sriov_basic@enable-vfs-autoprobe-on.html

  * igt@syncobj_wait@invalid-wait-zero-handles:
    - shard-dg2:          NOTRUN -> [FAIL][322] ([i915#12564] / [i915#9781])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@syncobj_wait@invalid-wait-zero-handles.html
    - shard-rkl:          NOTRUN -> [FAIL][323] ([i915#12564] / [i915#9781])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-1/igt@syncobj_wait@invalid-wait-zero-handles.html
    - shard-tglu-1:       NOTRUN -> [FAIL][324] ([i915#12564] / [i915#9781])
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-1/igt@syncobj_wait@invalid-wait-zero-handles.html

  
#### Possible fixes ####

  * igt@gem_ctx_engines@invalid-engines:
    - shard-glk:          ([FAIL][325], [FAIL][326]) ([i915#12031]) -> [PASS][327]
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk6/igt@gem_ctx_engines@invalid-engines.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk9/igt@gem_ctx_engines@invalid-engines.html
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk3/igt@gem_ctx_engines@invalid-engines.html
    - shard-rkl:          [FAIL][328] ([i915#12031]) -> [PASS][329]
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-rkl-7/igt@gem_ctx_engines@invalid-engines.html
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-7/igt@gem_ctx_engines@invalid-engines.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          ([PASS][330], [FAIL][331]) ([i915#2842]) -> [PASS][332] +1 other test pass
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
    - shard-tglu:         [FAIL][333] ([i915#2842]) -> [PASS][334] +1 other test pass
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-tglu-8/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-6/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-rkl:          [FAIL][335] ([i915#2842]) -> [PASS][336]
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-rkl-1/igt@gem_exec_fair@basic-pace@vecs0.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-2/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-dg2:          [INCOMPLETE][337] ([i915#11441]) -> [PASS][338] +1 other test pass
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-7/igt@gem_exec_suspend@basic-s0.html
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-8/igt@gem_exec_suspend@basic-s0.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-glk:          ([ABORT][339], [PASS][340]) ([i915#5566]) -> [PASS][341]
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk4/igt@gen9_exec_parse@allowed-single.html
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk1/igt@gen9_exec_parse@allowed-single.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk3/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-tglu:         [ABORT][342] ([i915#10887] / [i915#9820]) -> [PASS][343]
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-tglu-4/igt@i915_module_load@reload-with-fault-injection.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-tglu-3/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_suspend@debugfs-reader:
    - shard-dg1:          [INCOMPLETE][344] ([i915#4817]) -> [PASS][345]
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-19/igt@i915_suspend@debugfs-reader.html
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-13/igt@i915_suspend@debugfs-reader.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-dg2:          [FAIL][346] ([i915#10991]) -> [PASS][347]
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-11/igt@kms_async_flips@alternate-sync-async-flip.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-4/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_cursor_crc@cursor-random-64x64:
    - shard-glk:          ([PASS][348], [DMESG-FAIL][349]) ([i915#118]) -> [PASS][350] +1 other test pass
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk8/igt@kms_cursor_crc@cursor-random-64x64.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk7/igt@kms_cursor_crc@cursor-random-64x64.html
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk1/igt@kms_cursor_crc@cursor-random-64x64.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          ([FAIL][351], [FAIL][352]) ([i915#2346]) -> [PASS][353]
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][354] ([i915#2122]) -> [PASS][355]
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk5/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@bc-hdmi-a1-hdmi-a2.html
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk7/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-snb:          [FAIL][356] ([i915#2122]) -> [PASS][357] +1 other test pass
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb7/igt@kms_flip@2x-plain-flip-ts-check.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb6/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1:
    - shard-mtlp:         [FAIL][358] ([i915#2122]) -> [PASS][359] +1 other test pass
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-mtlp-1/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-8/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-dg2:          [FAIL][360] ([i915#6880]) -> [PASS][361]
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling:
    - shard-dg1:          [DMESG-WARN][362] ([i915#4423]) -> [PASS][363]
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-13/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling.html
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-17/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [SKIP][364] ([i915#9519]) -> [PASS][365] +2 other tests pass
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-rkl-1/igt@kms_pm_rpm@dpms-lpsp.html
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-7/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@i2c:
    - shard-dg2:          [FAIL][366] ([i915#8717]) -> [PASS][367]
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-2/igt@kms_pm_rpm@i2c.html
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-11/igt@kms_pm_rpm@i2c.html

  * igt@kms_setmode@basic@pipe-b-edp-1:
    - shard-mtlp:         [FAIL][368] ([i915#5465]) -> [PASS][369] +2 other tests pass
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-mtlp-3/igt@kms_setmode@basic@pipe-b-edp-1.html
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-mtlp-5/igt@kms_setmode@basic@pipe-b-edp-1.html

  * igt@kms_vblank@ts-continuation-dpms-suspend:
    - shard-glk:          ([INCOMPLETE][370], [INCOMPLETE][371]) ([i915#12276]) -> [PASS][372]
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk3/igt@kms_vblank@ts-continuation-dpms-suspend.html
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk2/igt@kms_vblank@ts-continuation-dpms-suspend.html
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk8/igt@kms_vblank@ts-continuation-dpms-suspend.html

  * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-hdmi-a-1:
    - shard-glk:          ([INCOMPLETE][373], [PASS][374]) -> [PASS][375]
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk3/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-hdmi-a-1.html
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk2/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-hdmi-a-1.html
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk8/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-hdmi-a-1.html

  * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-hdmi-a-2:
    - shard-glk:          [INCOMPLETE][376] -> [PASS][377]
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk2/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-hdmi-a-2.html
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk8/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-hdmi-a-2.html

  
#### Warnings ####

  * igt@gem_exec_fair@basic-pace-solo:
    - shard-glk:          ([PASS][378], [FAIL][379]) ([i915#2842]) -> [FAIL][380] ([i915#2842]) +1 other test fail
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk2/igt@gem_exec_fair@basic-pace-solo.html
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk6/igt@gem_exec_fair@basic-pace-solo.html
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk4/igt@gem_exec_fair@basic-pace-solo.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-snb:          [ABORT][381] ([i915#11703] / [i915#9820]) -> [ABORT][382] ([i915#11703])
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-snb7/igt@i915_module_load@reload-with-fault-injection.html
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-snb2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@mock:
    - shard-glk:          ([DMESG-WARN][383], [DMESG-WARN][384]) ([i915#1982] / [i915#9311]) -> [DMESG-WARN][385] ([i915#9311])
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk9/igt@i915_selftest@mock.html
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-glk3/igt@i915_selftest@mock.html
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-glk9/igt@i915_selftest@mock.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-rkl:          [ABORT][386] ([i915#10354]) -> [SKIP][387] ([i915#3638])
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-rkl-3/igt@kms_big_fb@linear-8bpp-rotate-270.html
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-1/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-rte:
    - shard-dg1:          [SKIP][388] ([i915#4423]) -> [SKIP][389]
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg1-13/igt@kms_frontbuffer_tracking@fbcpsr-2p-rte.html
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-2p-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
    - shard-dg2:          [SKIP][390] ([i915#3458]) -> [SKIP][391] ([i915#10433] / [i915#3458]) +2 other tests skip
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-slowdraw:
    - shard-dg2:          [SKIP][392] ([i915#10433] / [i915#3458]) -> [SKIP][393] ([i915#3458])
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-slowdraw.html
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-slowdraw.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-rkl:          [SKIP][394] -> [SKIP][395] ([i915#1187])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-rkl-7/igt@kms_hdr@brightness-with-hdr.html
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-rkl-3/igt@kms_hdr@brightness-with-hdr.html

  * igt@perf@non-zero-reason@0-rcs0:
    - shard-dg2:          [FAIL][396] ([i915#9100]) -> [FAIL][397] ([i915#7484]) +1 other test fail
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15642/shard-dg2-11/igt@perf@non-zero-reason@0-rcs0.html
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/shard-dg2-10/igt@perf@non-zero-reason@0-rcs0.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10354
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10538
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
  [i915#10991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10991
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11131
  [i915#11441]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11441
  [i915#11453]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11453
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11616]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11616
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11703]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11703
  [i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
  [i915#11814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11814
  [i915#11815]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11815
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#12031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12031
  [i915#12231]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12231
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
  [i915#12296]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12296
  [i915#12308]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12308
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
  [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
  [i915#12412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12412
  [i915#12504]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12504
  [i915#12527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12527
  [i915#12543]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12543
  [i915#12548]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12548
  [i915#12564]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12564
  [i915#12577]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12577
  [i915#12701]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12701
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4036]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4036
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4879]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4879
  [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5465]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5465
  [i915#5566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5566
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
  [i915#6117]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6117
  [i915#6228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6228
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
  [i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
  [i915#7484]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7484
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8289
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8717
  [i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
  [i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
  [i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
  [i915#9100]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9100
  [i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
  [i915#9781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9781
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917


Build changes
-------------

  * Linux: CI_DRM_15642 -> Patchwork_140886v3

  CI-20190529: 20190529
  CI_DRM_15642: e6ccd1b8868ec5bc1569c0dbd0dbbd46148cc541 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8099: 27be46dee80b6b0de80f9fa3cd9bb5f55edccaf8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_140886v3: e6ccd1b8868ec5bc1569c0dbd0dbbd46148cc541 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140886v3/index.html

[-- Attachment #2: Type: text/html, Size: 107927 bytes --]

Re: [PATCH v2] drm/i915/display: convert display device identification to struct intel_display

[Govindapillai, Vinod]

On Tue, 2024-11-05 at 12:17 +0200, Jani Nikula wrote:
> Convert intel_display_device.[ch] to struct intel_display, including
> callers, but excluding intel_display_device_probe() which will be
> handled in follow-up.
> 
> v2: fix display->drm = display->drm goof-up
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_crt.c      |   2 +-
>  .../drm/i915/display/intel_display_device.c   | 156 +++++++++---------
>  .../drm/i915/display/intel_display_device.h   |   7 +-
>  drivers/gpu/drm/i915/display/intel_dp.c       |   3 +-
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +-
>  drivers/gpu/drm/i915/display/intel_dvo.c      |   3 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.c     |   2 +-
>  drivers/gpu/drm/i915/display/intel_hotplug.c  |   4 +-
>  drivers/gpu/drm/i915/display/intel_panel.c    |   3 +-
>  drivers/gpu/drm/i915/display/intel_sdvo.c     |   3 +-
>  drivers/gpu/drm/i915/display/intel_tv.c       |   2 +-
>  drivers/gpu/drm/i915/i915_driver.c            |   6 +-
>  drivers/gpu/drm/xe/display/xe_display.c       |   9 +-
>  13 files changed, 108 insertions(+), 95 deletions(-)
> 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 74c1983fe07e..06341baaef42 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -865,7 +865,7 @@ intel_crt_detect(struct drm_connector *connector,
>                     connector->base.id, connector->name,
>                     force);
>  
> -       if (!intel_display_device_enabled(dev_priv))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (!intel_display_driver_check_access(dev_priv))
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 1e561df02751..45a80b358aa0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1432,9 +1432,9 @@ static const struct {
>  };
>  
>  static const struct intel_display_device_info *
> -probe_gmdid_display(struct drm_i915_private *i915, struct intel_display_ip_ver *ip_ver)
> +probe_gmdid_display(struct intel_display *display, struct intel_display_ip_ver *ip_ver)
>  {
> -       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> +       struct pci_dev *pdev = to_pci_dev(display->drm->dev);
>         struct intel_display_ip_ver gmd_id;
>         void __iomem *addr;
>         u32 val;
> @@ -1442,7 +1442,8 @@ probe_gmdid_display(struct drm_i915_private *i915, struct
> intel_display_ip_ver *
>  
>         addr = pci_iomap_range(pdev, 0, i915_mmio_reg_offset(GMD_ID_DISPLAY), sizeof(u32));
>         if (!addr) {
> -               drm_err(&i915->drm, "Cannot map MMIO BAR to read display GMD_ID\n");
> +               drm_err(display->drm,
> +                       "Cannot map MMIO BAR to read display GMD_ID\n");
>                 return NULL;
>         }
>  
> @@ -1450,7 +1451,7 @@ probe_gmdid_display(struct drm_i915_private *i915, struct
> intel_display_ip_ver *
>         pci_iounmap(pdev, addr);
>  
>         if (val == 0) {
> -               drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
> +               drm_dbg_kms(display->drm, "Device doesn't have display\n");
>                 return NULL;
>         }
>  
> @@ -1466,7 +1467,8 @@ probe_gmdid_display(struct drm_i915_private *i915, struct
> intel_display_ip_ver *
>                 }
>         }
>  
> -       drm_err(&i915->drm, "Unrecognized display IP version %d.%02d; disabling display.\n",
> +       drm_err(display->drm,
> +               "Unrecognized display IP version %d.%02d; disabling display.\n",
>                 gmd_id.ver, gmd_id.rel);
>         return NULL;
>  }
> @@ -1578,55 +1580,56 @@ void intel_display_device_probe(struct drm_i915_private *i915)
>         enum intel_step step;
>  
>         /* Add drm device backpointer as early as possible. */
> -       i915->display.drm = &i915->drm;
> +       display->drm = pci_get_drvdata(pdev);
>  
> -       intel_display_params_copy(&i915->display.params);
> +       intel_display_params_copy(&display->params);
>  
>         if (has_no_display(pdev)) {
> -               drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
> +               drm_dbg_kms(display->drm, "Device doesn't have display\n");
>                 goto no_display;
>         }
>  
>         desc = find_platform_desc(pdev);
>         if (!desc) {
> -               drm_dbg_kms(&i915->drm, "Unknown device ID %04x; disabling display.\n",
> +               drm_dbg_kms(display->drm,
> +                           "Unknown device ID %04x; disabling display.\n",
>                             pdev->device);
>                 goto no_display;
>         }
>  
>         info = desc->info;
>         if (!info)
> -               info = probe_gmdid_display(i915, &ip_ver);
> +               info = probe_gmdid_display(display, &ip_ver);
>         if (!info)
>                 goto no_display;
>  
> -       DISPLAY_INFO(i915) = info;
> +       DISPLAY_INFO(display) = info;
>  
> -       memcpy(DISPLAY_RUNTIME_INFO(i915),
> -              &DISPLAY_INFO(i915)->__runtime_defaults,
> -              sizeof(*DISPLAY_RUNTIME_INFO(i915)));
> +       memcpy(DISPLAY_RUNTIME_INFO(display),
> +              &DISPLAY_INFO(display)->__runtime_defaults,
> +              sizeof(*DISPLAY_RUNTIME_INFO(display)));
>  
> -       drm_WARN_ON(&i915->drm, !desc->name ||
> +       drm_WARN_ON(display->drm, !desc->name ||
>                     !display_platforms_weight(&desc->platforms));
>  
>         display->platform = desc->platforms;
>  
>         subdesc = find_subplatform_desc(pdev, desc);
>         if (subdesc) {
> -               drm_WARN_ON(&i915->drm, !subdesc->name ||
> +               drm_WARN_ON(display->drm, !subdesc->name ||
>                             !display_platforms_weight(&subdesc->platforms));
>  
>                 display_platforms_or(&display->platform, &subdesc->platforms);
>  
>                 /* Ensure platform and subplatform are distinct */
> -               drm_WARN_ON(&i915->drm,
> +               drm_WARN_ON(display->drm,
>                             display_platforms_weight(&display->platform) !=
>                             display_platforms_weight(&desc->platforms) +
>                             display_platforms_weight(&subdesc->platforms));
>         }
>  
>         if (ip_ver.ver || ip_ver.rel || ip_ver.step) {
> -               DISPLAY_RUNTIME_INFO(i915)->ip = ip_ver;
> +               DISPLAY_RUNTIME_INFO(display)->ip = ip_ver;
>                 step = STEP_A0 + ip_ver.step;
>                 if (step > STEP_FUTURE) {
>                         drm_dbg_kms(display->drm, "Using future display stepping\n");
> @@ -1637,30 +1640,30 @@ void intel_display_device_probe(struct drm_i915_private *i915)
>                                           subdesc ? &subdesc->step_info : NULL);
>         }
>  
> -       DISPLAY_RUNTIME_INFO(i915)->step = step;
> +       DISPLAY_RUNTIME_INFO(display)->step = step;
>  
> -       drm_info(&i915->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping
> %s\n",
> +       drm_info(display->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping
> %s\n",
>                  desc->name, subdesc ? "/" : "", subdesc ? subdesc->name : "",
>                  pdev->device, display->platform.dgfx ? "discrete" : "integrated",
> -                DISPLAY_RUNTIME_INFO(i915)->ip.ver,
> -                DISPLAY_RUNTIME_INFO(i915)->ip.rel,
> +                DISPLAY_RUNTIME_INFO(display)->ip.ver,
> +                DISPLAY_RUNTIME_INFO(display)->ip.rel,
>                  step != STEP_NONE ? intel_step_name(step) : "N/A");
>  
>         return;
>  
>  no_display:
> -       DISPLAY_INFO(i915) = &no_display;
> +       DISPLAY_INFO(display) = &no_display;
>  }
>  
> -void intel_display_device_remove(struct drm_i915_private *i915)
> +void intel_display_device_remove(struct intel_display *display)
>  {
> -       intel_display_params_free(&i915->display.params);
> +       intel_display_params_free(&display->params);
>  }
>  
> -static void __intel_display_device_info_runtime_init(struct drm_i915_private *i915)
> +static void __intel_display_device_info_runtime_init(struct intel_display *display)
>  {
> -       struct intel_display *display = &i915->display;
> -       struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(i915);
> +       struct drm_i915_private *i915 = to_i915(display->drm);
> +       struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(display);
>         enum pipe pipe;
>  
>         BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->pipe_mask) < I915_MAX_PIPES);
> @@ -1668,35 +1671,35 @@ static void __intel_display_device_info_runtime_init(struct
> drm_i915_private *i9
>         BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->port_mask) < I915_MAX_PORTS);
>  
>         /* This covers both ULT and ULX */
> -       if (IS_HASWELL_ULT(i915) || IS_BROADWELL_ULT(i915))
> +       if (display->platform.haswell_ult || display->platform.broadwell_ult)
>                 display_runtime->port_mask &= ~BIT(PORT_D);
>  
> -       if (IS_ICL_WITH_PORT_F(i915))
> +       if (display->platform.icelake_port_f)
>                 display_runtime->port_mask |= BIT(PORT_F);
>  
>         /* Wa_14011765242: adl-s A0,A1 */
> -       if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
> -               for_each_pipe(i915, pipe)
> +       if (display->platform.alderlake_s && IS_DISPLAY_STEP(display, STEP_A0, STEP_A2))
> +               for_each_pipe(display, pipe)
>                         display_runtime->num_scalers[pipe] = 0;
> -       else if (DISPLAY_VER(i915) >= 11) {
> -               for_each_pipe(i915, pipe)
> +       else if (DISPLAY_VER(display) >= 11) {
> +               for_each_pipe(display, pipe)
>                         display_runtime->num_scalers[pipe] = 2;
> -       } else if (DISPLAY_VER(i915) >= 9) {
> +       } else if (DISPLAY_VER(display) >= 9) {
>                 display_runtime->num_scalers[PIPE_A] = 2;
>                 display_runtime->num_scalers[PIPE_B] = 2;
>                 display_runtime->num_scalers[PIPE_C] = 1;
>         }
>  
> -       if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
> -               for_each_pipe(i915, pipe)
> +       if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
> +               for_each_pipe(display, pipe)
>                         display_runtime->num_sprites[pipe] = 4;
> -       else if (DISPLAY_VER(i915) >= 11)
> -               for_each_pipe(i915, pipe)
> +       else if (DISPLAY_VER(display) >= 11)
> +               for_each_pipe(display, pipe)
>                         display_runtime->num_sprites[pipe] = 6;
> -       else if (DISPLAY_VER(i915) == 10)
> -               for_each_pipe(i915, pipe)
> +       else if (DISPLAY_VER(display) == 10)
> +               for_each_pipe(display, pipe)
>                         display_runtime->num_sprites[pipe] = 3;
> -       else if (IS_BROXTON(i915)) {
> +       else if (display->platform.broxton) {
>                 /*
>                  * Skylake and Broxton currently don't expose the topmost plane as its
>                  * use is exclusive with the legacy cursor and we only want to expose
> @@ -1709,23 +1712,23 @@ static void __intel_display_device_info_runtime_init(struct
> drm_i915_private *i9
>                 display_runtime->num_sprites[PIPE_A] = 2;
>                 display_runtime->num_sprites[PIPE_B] = 2;
>                 display_runtime->num_sprites[PIPE_C] = 1;
> -       } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
> -               for_each_pipe(i915, pipe)
> +       } else if (display->platform.valleyview || display->platform.cherryview) {
> +               for_each_pipe(display, pipe)
>                         display_runtime->num_sprites[pipe] = 2;
> -       } else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915)) {
> -               for_each_pipe(i915, pipe)
> +       } else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) {
> +               for_each_pipe(display, pipe)
>                         display_runtime->num_sprites[pipe] = 1;
>         }
>  
> -       if ((IS_DGFX(i915) || DISPLAY_VER(i915) >= 14) &&
> -           !(intel_de_read(i915, GU_CNTL_PROTECTED) & DEPRESENT)) {
> -               drm_info(&i915->drm, "Display not present, disabling\n");
> +       if ((display->platform.dgfx || DISPLAY_VER(display) >= 14) &&
> +           !(intel_de_read(display, GU_CNTL_PROTECTED) & DEPRESENT)) {
> +               drm_info(display->drm, "Display not present, disabling\n");
>                 goto display_fused_off;
>         }
>  
> -       if (IS_DISPLAY_VER(i915, 7, 8) && HAS_PCH_SPLIT(i915)) {
> -               u32 fuse_strap = intel_de_read(i915, FUSE_STRAP);
> -               u32 sfuse_strap = intel_de_read(i915, SFUSE_STRAP);
> +       if (IS_DISPLAY_VER(display, 7, 8) && HAS_PCH_SPLIT(i915)) {
> +               u32 fuse_strap = intel_de_read(display, FUSE_STRAP);
> +               u32 sfuse_strap = intel_de_read(display, SFUSE_STRAP);
>  
>                 /*
>                  * SFUSE_STRAP is supposed to have a bit signalling the display
> @@ -1740,16 +1743,16 @@ static void __intel_display_device_info_runtime_init(struct
> drm_i915_private *i9
>                     sfuse_strap & SFUSE_STRAP_DISPLAY_DISABLED ||
>                     (HAS_PCH_CPT(i915) &&
>                      !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
> -                       drm_info(&i915->drm,
> +                       drm_info(display->drm,
>                                  "Display fused off, disabling\n");
>                         goto display_fused_off;
>                 } else if (fuse_strap & IVB_PIPE_C_DISABLE) {
> -                       drm_info(&i915->drm, "PipeC fused off\n");
> +                       drm_info(display->drm, "PipeC fused off\n");
>                         display_runtime->pipe_mask &= ~BIT(PIPE_C);
>                         display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
>                 }
> -       } else if (DISPLAY_VER(i915) >= 9) {
> -               u32 dfsm = intel_de_read(i915, SKL_DFSM);
> +       } else if (DISPLAY_VER(display) >= 9) {
> +               u32 dfsm = intel_de_read(display, SKL_DFSM);
>  
>                 if (dfsm & SKL_DFSM_PIPE_A_DISABLE) {
>                         display_runtime->pipe_mask &= ~BIT(PIPE_A);
> @@ -1767,7 +1770,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private
> *i9
>                         display_runtime->fbc_mask &= ~BIT(INTEL_FBC_C);
>                 }
>  
> -               if (DISPLAY_VER(i915) >= 12 &&
> +               if (DISPLAY_VER(display) >= 12 &&
>                     (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
>                         display_runtime->pipe_mask &= ~BIT(PIPE_D);
>                         display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
> @@ -1780,15 +1783,15 @@ static void __intel_display_device_info_runtime_init(struct
> drm_i915_private *i9
>                 if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
>                         display_runtime->has_hdcp = 0;
>  
> -               if (IS_DG2(i915) || DISPLAY_VER(i915) < 13) {
> +               if (display->platform.dg2 || DISPLAY_VER(display) < 13) {
>                         if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
>                                 display_runtime->fbc_mask = 0;
>                 }
>  
> -               if (DISPLAY_VER(i915) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
> +               if (DISPLAY_VER(display) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
>                         display_runtime->has_dmc = 0;
>  
> -               if (IS_DISPLAY_VER(i915, 10, 12) &&
> +               if (IS_DISPLAY_VER(display, 10, 12) &&
>                     (dfsm & GLK_DFSM_DISPLAY_DSC_DISABLE))
>                         display_runtime->has_dsc = 0;
>  
> @@ -1797,8 +1800,8 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private
> *i9
>                         display_runtime->has_dbuf_overlap_detection = false;
>         }
>  
> -       if (DISPLAY_VER(i915) >= 20) {
> -               u32 cap = intel_de_read(i915, XE2LPD_DE_CAP);
> +       if (DISPLAY_VER(display) >= 20) {
> +               u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
>  
>                 if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
>                     XE2LPD_DE_CAP_DSC_REMOVED)
> @@ -1806,18 +1809,19 @@ static void __intel_display_device_info_runtime_init(struct
> drm_i915_private *i9
>  
>                 if (REG_FIELD_GET(XE2LPD_DE_CAP_SCALER_MASK, cap) ==
>                     XE2LPD_DE_CAP_SCALER_SINGLE) {
> -                       for_each_pipe(i915, pipe)
> +                       for_each_pipe(display, pipe)
>                                 if (display_runtime->num_scalers[pipe])
>                                         display_runtime->num_scalers[pipe] = 1;
>                 }
>         }
>  
> -       if (DISPLAY_VER(i915) >= 30)
> +       if (DISPLAY_VER(display) >= 30)
>                 display_runtime->edp_typec_support =
>                         intel_de_read(display, PICA_PHY_CONFIG_CONTROL) & EDP_ON_TYPEC;
>  
>         display_runtime->rawclk_freq = intel_read_rawclk(display);
> -       drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", display_runtime->rawclk_freq);
> +       drm_dbg_kms(display->drm, "rawclk rate: %d kHz\n",
> +                   display_runtime->rawclk_freq);
>  
>         return;
>  
> @@ -1825,21 +1829,21 @@ static void __intel_display_device_info_runtime_init(struct
> drm_i915_private *i9
>         memset(display_runtime, 0, sizeof(*display_runtime));
>  }
>  
> -void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
> +void intel_display_device_info_runtime_init(struct intel_display *display)
>  {
> -       if (HAS_DISPLAY(i915))
> -               __intel_display_device_info_runtime_init(i915);
> +       if (HAS_DISPLAY(display))
> +               __intel_display_device_info_runtime_init(display);
>  
>         /* Display may have been disabled by runtime init */
> -       if (!HAS_DISPLAY(i915)) {
> -               i915->drm.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
> -               i915->display.info.__device_info = &no_display;
> +       if (!HAS_DISPLAY(display)) {
> +               display->drm->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
> +               display->info.__device_info = &no_display;
>         }
>  
>         /* Disable nuclear pageflip by default on pre-g4x */
> -       if (!i915->display.params.nuclear_pageflip &&
> -           DISPLAY_VER(i915) < 5 && !IS_G4X(i915))
> -               i915->drm.driver_features &= ~DRIVER_ATOMIC;
> +       if (!display->params.nuclear_pageflip &&
> +           DISPLAY_VER(display) < 5 && !display->platform.g4x)
> +               display->drm->driver_features &= ~DRIVER_ATOMIC;
>  }
>  
>  void intel_display_device_info_print(const struct intel_display_device_info *info,
> @@ -1876,10 +1880,8 @@ void intel_display_device_info_print(const struct intel_display_device_info
> *inf
>   * Disabling display means taking over the display hardware, putting it to
>   * sleep, and preventing connectors from being connected via any means.
>   */
> -bool intel_display_device_enabled(struct drm_i915_private *i915)
> +bool intel_display_device_enabled(struct intel_display *display)
>  {
> -       struct intel_display *display = &i915->display;
> -
>         /* Only valid when HAS_DISPLAY() is true */
>         drm_WARN_ON(display->drm, !HAS_DISPLAY(display));
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 48f32280145f..01e3cc0fde4b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -14,6 +14,7 @@
>  
>  struct drm_i915_private;
>  struct drm_printer;
> +struct intel_display;
>  
>  /*
>   * Display platforms and subplatforms. Keep platforms in display version based
> @@ -286,10 +287,10 @@ struct intel_display_device_info {
>         } color;
>  };
>  
> -bool intel_display_device_enabled(struct drm_i915_private *i915);
> +bool intel_display_device_enabled(struct intel_display *display);
>  void intel_display_device_probe(struct drm_i915_private *i915);
> -void intel_display_device_remove(struct drm_i915_private *i915);
> -void intel_display_device_info_runtime_init(struct drm_i915_private *i915);
> +void intel_display_device_remove(struct intel_display *display);
> +void intel_display_device_info_runtime_init(struct intel_display *display);
>  
>  void intel_display_device_info_print(const struct intel_display_device_info *info,
>                                      const struct intel_display_runtime_info *runtime,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7d65945c9563..8debc0792d24 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5607,6 +5607,7 @@ intel_dp_detect(struct drm_connector *connector,
>                 struct drm_modeset_acquire_ctx *ctx,
>                 bool force)
>  {
> +       struct intel_display *display = to_intel_display(connector->dev);
>         struct drm_i915_private *dev_priv = to_i915(connector->dev);
>         struct intel_connector *intel_connector =
>                 to_intel_connector(connector);
> @@ -5621,7 +5622,7 @@ intel_dp_detect(struct drm_connector *connector,
>         drm_WARN_ON(&dev_priv->drm,
>                     !drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
>  
> -       if (!intel_display_device_enabled(dev_priv))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (!intel_display_driver_check_access(dev_priv))
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 5bba078c00d8..ebe1ac100aab 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1560,11 +1560,12 @@ static int
>  intel_dp_mst_detect(struct drm_connector *connector,
>                     struct drm_modeset_acquire_ctx *ctx, bool force)
>  {
> +       struct intel_display *display = to_intel_display(connector->dev);
>         struct drm_i915_private *i915 = to_i915(connector->dev);
>         struct intel_connector *intel_connector = to_intel_connector(connector);
>         struct intel_dp *intel_dp = intel_connector->mst_port;
>  
> -       if (!intel_display_device_enabled(i915))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (drm_connector_is_unregistered(connector))
> diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
> index 2d5ffb37eac9..93a9af67ca47 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_dvo.c
> @@ -318,6 +318,7 @@ static void intel_dvo_pre_enable(struct intel_atomic_state *state,
>  static enum drm_connector_status
>  intel_dvo_detect(struct drm_connector *_connector, bool force)
>  {
> +       struct intel_display *display = to_intel_display(_connector->dev);
>         struct intel_connector *connector = to_intel_connector(_connector);
>         struct drm_i915_private *i915 = to_i915(connector->base.dev);
>         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
> @@ -325,7 +326,7 @@ intel_dvo_detect(struct drm_connector *_connector, bool force)
>         drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
>                     connector->base.base.id, connector->base.name);
>  
> -       if (!intel_display_device_enabled(i915))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (!intel_display_driver_check_access(i915))
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index c6ce6bb88d7c..23c270a8c4aa 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2556,7 +2556,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
>         drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
>                     connector->base.id, connector->name);
>  
> -       if (!intel_display_device_enabled(dev_priv))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (!intel_display_driver_check_access(dev_priv))
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c
> b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index a013b0e0ef54..3adc791d3776 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -813,8 +813,10 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
>   */
>  void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
>  {
> +       struct intel_display *display = &dev_priv->display;
> +
>         if (!HAS_DISPLAY(dev_priv) ||
> -           !intel_display_device_enabled(dev_priv))
> +           !intel_display_device_enabled(display))
>                 return;
>  
>         WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, true);
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> b/drivers/gpu/drm/i915/display/intel_panel.c
> index 313bd3f35ace..fdf9ef88a775 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -383,9 +383,10 @@ void intel_panel_add_encoder_fixed_mode(struct intel_connector *connector,
>  enum drm_connector_status
>  intel_panel_detect(struct drm_connector *connector, bool force)
>  {
> +       struct intel_display *display = to_intel_display(connector->dev);
>         struct drm_i915_private *i915 = to_i915(connector->dev);
>  
> -       if (!intel_display_device_enabled(i915))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (!intel_display_driver_check_access(i915))
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 7a28104f68ad..df855bf3ecec 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -2136,6 +2136,7 @@ intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
>  static enum drm_connector_status
>  intel_sdvo_detect(struct drm_connector *connector, bool force)
>  {
> +       struct intel_display *display = to_intel_display(connector->dev);
>         struct drm_i915_private *i915 = to_i915(connector->dev);
>         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
>         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
> @@ -2145,7 +2146,7 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
>         drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
>                     connector->base.id, connector->name);
>  
> -       if (!intel_display_device_enabled(i915))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (!intel_display_driver_check_access(i915))
> diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
> index bfd16054ca05..ece16fc50429 100644
> --- a/drivers/gpu/drm/i915/display/intel_tv.c
> +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> @@ -1722,7 +1722,7 @@ intel_tv_detect(struct drm_connector *connector,
>         drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",
>                     connector->base.id, connector->name, force);
>  
> -       if (!intel_display_device_enabled(i915))
> +       if (!intel_display_device_enabled(display))
>                 return connector_status_disconnected;
>  
>         if (!intel_display_driver_check_access(i915))
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 365329ff8a07..596aaf940d0c 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -307,6 +307,7 @@ static void i915_driver_late_release(struct drm_i915_private *dev_priv)
>   */
>  static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
>  {
> +       struct intel_display *display = &dev_priv->display;
>         struct intel_gt *gt;
>         int ret, i;
>  
> @@ -332,7 +333,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
>         /* Try to make sure MCHBAR is enabled before poking at it */
>         intel_gmch_bar_setup(dev_priv);
>         intel_device_info_runtime_init(dev_priv);
> -       intel_display_device_info_runtime_init(dev_priv);
> +       intel_display_device_info_runtime_init(display);
>  
>         for_each_gt(gt, dev_priv, i) {
>                 ret = intel_gt_init_mmio(gt);
> @@ -883,6 +884,7 @@ void i915_driver_remove(struct drm_i915_private *i915)
>  static void i915_driver_release(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = to_i915(dev);
> +       struct intel_display *display = &dev_priv->display;
>         struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
>         intel_wakeref_t wakeref;
>  
> @@ -906,7 +908,7 @@ static void i915_driver_release(struct drm_device *dev)
>  
>         i915_driver_late_release(dev_priv);
>  
> -       intel_display_device_remove(dev_priv);
> +       intel_display_device_remove(display);
>  }
>  
>  static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index b5502f335f53..9b8acf2074e0 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -157,7 +157,7 @@ int xe_display_init_noirq(struct xe_device *xe)
>  
>         intel_bw_init_hw(xe);
>  
> -       intel_display_device_info_runtime_init(xe);
> +       intel_display_device_info_runtime_init(display);
>  
>         err = intel_display_driver_probe_noirq(xe);
>         if (err) {
> @@ -495,13 +495,14 @@ void xe_display_pm_runtime_resume(struct xe_device *xe)
>  
>  static void display_device_remove(struct drm_device *dev, void *arg)
>  {
> -       struct xe_device *xe = arg;
> +       struct intel_display *display = arg;
>  
> -       intel_display_device_remove(xe);
> +       intel_display_device_remove(display);
>  }
>  
>  int xe_display_probe(struct xe_device *xe)
>  {
> +       struct intel_display *display = &xe->display;
>         int err;
>  
>         if (!xe->info.probe_display)
> @@ -509,7 +510,7 @@ int xe_display_probe(struct xe_device *xe)
>  
>         intel_display_device_probe(xe);
>  
> -       err = drmm_add_action_or_reset(&xe->drm, display_device_remove, xe);
> +       err = drmm_add_action_or_reset(&xe->drm, display_device_remove, display);
>         if (err)
>                 return err;
>  

Re: [PATCH 14/15] drm/i915/display: pass struct pci_dev * to intel_display_device_probe()

[Govindapillai, Vinod]

On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert intel_display_device_probe() to accept struct pci_dev * instead
> of struct drm_i915_private *. Return struct intel_display * in
> preparation of allocating the memory of it later.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c | 10 ++++++----
>  drivers/gpu/drm/i915/display/intel_display_device.h |  4 ++--
>  drivers/gpu/drm/i915/i915_driver.c                  |  2 +-
>  drivers/gpu/drm/i915/selftests/mock_gem_device.c    |  2 +-
>  drivers/gpu/drm/xe/display/xe_display.c             |  5 +++--
>  5 files changed, 13 insertions(+), 10 deletions(-)
> 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> b/drivers/gpu/drm/i915/display/intel_display_device.c
> index aabf6ece40c4..8ba1b4652ca9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -16,6 +16,7 @@
>  #include "intel_display_params.h"
>  #include "intel_display_power.h"
>  #include "intel_display_reg_defs.h"
> +#include "intel_display_types.h"
>  #include "intel_fbc.h"
>  #include "intel_step.h"
>  
> @@ -1569,10 +1570,9 @@ static void display_platforms_or(struct intel_display_platforms *dst,
>         bitmap_or(dst->bitmap, dst->bitmap, src->bitmap, display_platforms_num_bits());
>  }
>  
> -void intel_display_device_probe(struct drm_i915_private *i915)
> +struct intel_display *intel_display_device_probe(struct pci_dev *pdev)
>  {
> -       struct intel_display *display = &i915->display;
> -       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> +       struct intel_display *display = to_intel_display(pdev);
>         const struct intel_display_device_info *info;
>         struct intel_display_ip_ver ip_ver = {};
>         const struct platform_desc *desc;
> @@ -1649,10 +1649,12 @@ void intel_display_device_probe(struct drm_i915_private *i915)
>                  DISPLAY_RUNTIME_INFO(display)->ip.rel,
>                  step != STEP_NONE ? intel_step_name(step) : "N/A");
>  
> -       return;
> +       return display;
>  
>  no_display:
>         DISPLAY_INFO(display) = &no_display;
> +
> +       return display;
>  }
>  
>  void intel_display_device_remove(struct intel_display *display)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 01e3cc0fde4b..e1398689cda5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -12,9 +12,9 @@
>  #include "intel_display_conversion.h"
>  #include "intel_display_limits.h"
>  
> -struct drm_i915_private;
>  struct drm_printer;
>  struct intel_display;
> +struct pci_dev;
>  
>  /*
>   * Display platforms and subplatforms. Keep platforms in display version based
> @@ -288,7 +288,7 @@ struct intel_display_device_info {
>  };
>  
>  bool intel_display_device_enabled(struct intel_display *display);
> -void intel_display_device_probe(struct drm_i915_private *i915);
> +struct intel_display *intel_display_device_probe(struct pci_dev *pdev);
>  void intel_display_device_remove(struct intel_display *display);
>  void intel_display_device_info_runtime_init(struct intel_display *display);
>  
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 596aaf940d0c..310c0a2e9e26 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -732,7 +732,7 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
>         /* Set up device info and initial runtime info. */
>         intel_device_info_driver_create(i915, pdev->device, match_info);
>  
> -       intel_display_device_probe(i915);
> +       intel_display_device_probe(pdev);
>  
>         return i915;
>  }
> diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> index ae57eb03dfca..a77e5b26542c 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> @@ -180,7 +180,7 @@ struct drm_i915_private *mock_gem_device(void)
>         /* Set up device info and initial runtime info. */
>         intel_device_info_driver_create(i915, pdev->device, &mock_info);
>  
> -       intel_display_device_probe(i915);
> +       intel_display_device_probe(pdev);
>  
>         dev_pm_domain_set(&pdev->dev, &pm_domain);
>         pm_runtime_enable(&pdev->dev);
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index 9b8acf2074e0..60ff48604e3b 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -502,13 +502,14 @@ static void display_device_remove(struct drm_device *dev, void *arg)
>  
>  int xe_display_probe(struct xe_device *xe)
>  {
> -       struct intel_display *display = &xe->display;
> +       struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +       struct intel_display *display;
>         int err;
>  
>         if (!xe->info.probe_display)
>                 goto no_display;
>  
> -       intel_display_device_probe(xe);
> +       display = intel_display_device_probe(pdev);
>  
>         err = drmm_add_action_or_reset(&xe->drm, display_device_remove, display);
>         if (err)

Re: [PATCH v2] drm/i915/display: add mobile platform group

[Govindapillai, Vinod]

On Wed, 2024-11-06 at 11:27 +0200, Jani Nikula wrote:
> Identify mobile platforms separately in display, using the platform
> group mechanism. This enables dropping the dependency on i915_drv.h
> IS_MOBILE() from display code.
> 
> v2: Make snb_display static (kernel test robot)
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.c   | 104 ++++++++++++------
>  .../drm/i915/display/intel_display_device.h   |   1 +
>  2 files changed, 70 insertions(+), 35 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 41df7a8fd32e..68cb7f9b9ef3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -253,6 +253,7 @@ static const struct intel_display_device_info no_display = {};
>  
>  static const struct platform_desc i830_desc = {
>         PLATFORM(i830),
> +       PLATFORM_GROUP(mobile),
>         .info = &(const struct intel_display_device_info) {
>                 I830_DISPLAY,
>  
> @@ -271,6 +272,7 @@ static const struct platform_desc i845_desc = {
>  
>  static const struct platform_desc i85x_desc = {
>         PLATFORM(i85x),
> +       PLATFORM_GROUP(mobile),
>         .info = &(const struct intel_display_device_info) {
>                 I830_DISPLAY,
>  
> @@ -313,6 +315,7 @@ static const struct platform_desc i915g_desc = {
>  
>  static const struct platform_desc i915gm_desc = {
>         PLATFORM(i915gm),
> +       PLATFORM_GROUP(mobile),
>         .info = &(const struct intel_display_device_info) {
>                 GEN3_DISPLAY,
>                 I9XX_COLORS,
> @@ -337,6 +340,7 @@ static const struct platform_desc i945g_desc = {
>  
>  static const struct platform_desc i945gm_desc = {
>         PLATFORM(i915gm),
> +       PLATFORM_GROUP(mobile),
>         .info = &(const struct intel_display_device_info) {
>                 GEN3_DISPLAY,
>                 I9XX_COLORS,
> @@ -358,13 +362,21 @@ static const struct platform_desc g33_desc = {
>         },
>  };
>  
> -static const struct platform_desc pnv_desc = {
> +static const struct intel_display_device_info pnv_display = {
> +       GEN3_DISPLAY,
> +       I9XX_COLORS,
> +       .has_hotplug = 1,
> +};
> +
> +static const struct platform_desc pnv_g_desc = {
>         PLATFORM(pineview),
> -       .info = &(const struct intel_display_device_info) {
> -               GEN3_DISPLAY,
> -               I9XX_COLORS,
> -               .has_hotplug = 1,
> -       },
> +       .info = &pnv_display,
> +};
> +
> +static const struct platform_desc pnv_m_desc = {
> +       PLATFORM(pineview),
> +       PLATFORM_GROUP(mobile),
> +       .info = &pnv_display,
>  };
>  
>  #define GEN4_DISPLAY \
> @@ -391,6 +403,7 @@ static const struct platform_desc i965g_desc = {
>  
>  static const struct platform_desc i965gm_desc = {
>         PLATFORM(i965gm),
> +       PLATFORM_GROUP(mobile),
>         .info = &(const struct intel_display_device_info) {
>                 GEN4_DISPLAY,
>                 .has_overlay = 1,
> @@ -414,6 +427,7 @@ static const struct platform_desc g45_desc = {
>  static const struct platform_desc gm45_desc = {
>         PLATFORM(gm45),
>         PLATFORM_GROUP(g4x),
> +       PLATFORM_GROUP(mobile),
>         .info = &(const struct intel_display_device_info) {
>                 GEN4_DISPLAY,
>                 .supports_tv = 1,
> @@ -444,6 +458,7 @@ static const struct platform_desc ilk_d_desc = {
>  
>  static const struct platform_desc ilk_m_desc = {
>         PLATFORM(ironlake),
> +       PLATFORM_GROUP(mobile),
>         .info = &(const struct intel_display_device_info) {
>                 ILK_DISPLAY,
>  
> @@ -451,38 +466,54 @@ static const struct platform_desc ilk_m_desc = {
>         },
>  };
>  
> -static const struct platform_desc snb_desc = {
> +static const struct intel_display_device_info snb_display = {
> +       .has_hotplug = 1,
> +       I9XX_PIPE_OFFSETS,
> +       I9XX_CURSOR_OFFSETS,
> +       ILK_COLORS,
> +
> +       .__runtime_defaults.ip.ver = 6,
> +       .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> +       .__runtime_defaults.cpu_transcoder_mask =
> +       BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
> +       .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /*
> DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> +       .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> +};
> +
> +static const struct platform_desc snb_d_desc = {
>         PLATFORM(sandybridge),
> -       .info = &(const struct intel_display_device_info) {
> -               .has_hotplug = 1,
> -               I9XX_PIPE_OFFSETS,
> -               I9XX_CURSOR_OFFSETS,
> -               ILK_COLORS,
> +       .info = &snb_display,
> +};
>  
> -               .__runtime_defaults.ip.ver = 6,
> -               .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> -               .__runtime_defaults.cpu_transcoder_mask =
> -               BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
> -               .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
> BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> -               .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> -       },
> +static const struct platform_desc snb_m_desc = {
> +       PLATFORM(sandybridge),
> +       PLATFORM_GROUP(mobile),
> +       .info = &snb_display,
> +};
> +
> +static const struct intel_display_device_info ivb_display = {
> +       .has_hotplug = 1,
> +       IVB_PIPE_OFFSETS,
> +       IVB_CURSOR_OFFSETS,
> +       IVB_COLORS,
> +
> +       .__runtime_defaults.ip.ver = 7,
> +       .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> +       .__runtime_defaults.cpu_transcoder_mask =
> +       BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
> +       .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /*
> DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> +       .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
>  };
>  
> -static const struct platform_desc ivb_desc = {
> +static const struct platform_desc ivb_d_desc = {
>         PLATFORM(ivybridge),
> -       .info = &(const struct intel_display_device_info) {
> -               .has_hotplug = 1,
> -               IVB_PIPE_OFFSETS,
> -               IVB_CURSOR_OFFSETS,
> -               IVB_COLORS,
> +       .info = &ivb_display,
> +};
>  
> -               .__runtime_defaults.ip.ver = 7,
> -               .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> -               .__runtime_defaults.cpu_transcoder_mask =
> -               BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
> -               .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
> BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> -               .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> -       },
> +static const struct platform_desc ivb_m_desc = {
> +       PLATFORM(ivybridge),
> +       PLATFORM_GROUP(mobile),
> +       .info = &ivb_display,
>  };
>  
>  static const struct platform_desc vlv_desc = {
> @@ -1385,11 +1416,14 @@ static const struct {
>         INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_desc),
>         INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_desc),
>         INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_desc),
> -       INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_desc),
> +       INTEL_PNV_G_IDS(INTEL_DISPLAY_DEVICE, &pnv_g_desc),
> +       INTEL_PNV_M_IDS(INTEL_DISPLAY_DEVICE, &pnv_m_desc),
>         INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_desc),
>         INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_desc),
> -       INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_desc),
> -       INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_desc),
> +       INTEL_SNB_D_IDS(INTEL_DISPLAY_DEVICE, &snb_d_desc),
> +       INTEL_SNB_M_IDS(INTEL_DISPLAY_DEVICE, &snb_m_desc),
> +       INTEL_IVB_D_IDS(INTEL_DISPLAY_DEVICE, &ivb_d_desc),
> +       INTEL_IVB_M_IDS(INTEL_DISPLAY_DEVICE, &ivb_m_desc),
>         INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_desc),
>         INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_desc),
>         INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_desc),
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e1398689cda5..84378c787923 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -24,6 +24,7 @@ struct pci_dev;
>  #define INTEL_DISPLAY_PLATFORMS(func) \
>         /* Platform group aliases */ \
>         func(g4x) /* g45 and gm45 */ \
> +       func(mobile) /* mobile platforms */ \
>         func(dgfx) /* discrete graphics */ \
>         /* Display ver 2 */ \
>         func(i830) \

Re: [PATCH 15/15] drm/i915/display: add mobile platform group

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:29PM +0200, Jani Nikula wrote:
> Identify mobile platforms separately in display, using the platform
> group mechanism. This enables dropping the dependency on i915_drv.h
> IS_MOBILE() from display code.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.c   | 104 ++++++++++++------
>  .../drm/i915/display/intel_display_device.h   |   1 +
>  2 files changed, 70 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 8ba1b4652ca9..5689c5e5db0e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -253,6 +253,7 @@ static const struct intel_display_device_info no_display = {};
>  
>  static const struct platform_desc i830_desc = {
>  	PLATFORM(i830),
> +	PLATFORM_GROUP(mobile),
>  	.info = &(const struct intel_display_device_info) {
>  		I830_DISPLAY,
>  
> @@ -271,6 +272,7 @@ static const struct platform_desc i845_desc = {
>  
>  static const struct platform_desc i85x_desc = {
>  	PLATFORM(i85x),
> +	PLATFORM_GROUP(mobile),
>  	.info = &(const struct intel_display_device_info) {
>  		I830_DISPLAY,
>  
> @@ -313,6 +315,7 @@ static const struct platform_desc i915g_desc = {
>  
>  static const struct platform_desc i915gm_desc = {
>  	PLATFORM(i915gm),
> +	PLATFORM_GROUP(mobile),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I9XX_COLORS,
> @@ -337,6 +340,7 @@ static const struct platform_desc i945g_desc = {
>  
>  static const struct platform_desc i945gm_desc = {
>  	PLATFORM(i915gm),
> +	PLATFORM_GROUP(mobile),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I9XX_COLORS,
> @@ -358,13 +362,21 @@ static const struct platform_desc g33_desc = {
>  	},
>  };
>  
> -static const struct platform_desc pnv_desc = {
> +static const struct intel_display_device_info pnv_display = {
> +	GEN3_DISPLAY,
> +	I9XX_COLORS,
> +	.has_hotplug = 1,
> +};
> +
> +static const struct platform_desc pnv_g_desc = {
>  	PLATFORM(pineview),
> -	.info = &(const struct intel_display_device_info) {
> -		GEN3_DISPLAY,
> -		I9XX_COLORS,
> -		.has_hotplug = 1,
> -	},
> +	.info = &pnv_display,
> +};
> +
> +static const struct platform_desc pnv_m_desc = {
> +	PLATFORM(pineview),
> +	PLATFORM_GROUP(mobile),
> +	.info = &pnv_display,
>  };
>  
>  #define GEN4_DISPLAY \
> @@ -391,6 +403,7 @@ static const struct platform_desc i965g_desc = {
>  
>  static const struct platform_desc i965gm_desc = {
>  	PLATFORM(i965gm),
> +	PLATFORM_GROUP(mobile),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN4_DISPLAY,
>  		.has_overlay = 1,
> @@ -414,6 +427,7 @@ static const struct platform_desc g45_desc = {
>  static const struct platform_desc gm45_desc = {
>  	PLATFORM(gm45),
>  	PLATFORM_GROUP(g4x),
> +	PLATFORM_GROUP(mobile),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN4_DISPLAY,
>  		.supports_tv = 1,
> @@ -444,6 +458,7 @@ static const struct platform_desc ilk_d_desc = {
>  
>  static const struct platform_desc ilk_m_desc = {
>  	PLATFORM(ironlake),
> +	PLATFORM_GROUP(mobile),
>  	.info = &(const struct intel_display_device_info) {
>  		ILK_DISPLAY,
>  
> @@ -451,38 +466,54 @@ static const struct platform_desc ilk_m_desc = {
>  	},
>  };
>  
> -static const struct platform_desc snb_desc = {
> +const struct intel_display_device_info snb_display = {

get static back here as test robot already pointed out...

> +	.has_hotplug = 1,
> +	I9XX_PIPE_OFFSETS,
> +	I9XX_CURSOR_OFFSETS,
> +	ILK_COLORS,
> +
> +	.__runtime_defaults.ip.ver = 6,
> +	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> +	.__runtime_defaults.cpu_transcoder_mask =
> +	BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
> +	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> +	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> +};
> +
> +static const struct platform_desc snb_d_desc = {
>  	PLATFORM(sandybridge),
> -	.info = &(const struct intel_display_device_info) {
> -		.has_hotplug = 1,
> -		I9XX_PIPE_OFFSETS,
> -		I9XX_CURSOR_OFFSETS,
> -		ILK_COLORS,
> +	.info = &snb_display,
> +};
>  
> -		.__runtime_defaults.ip.ver = 6,
> -		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> -		.__runtime_defaults.cpu_transcoder_mask =
> -		BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
> -		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> -		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> -	},
> +static const struct platform_desc snb_m_desc = {
> +	PLATFORM(sandybridge),
> +	PLATFORM_GROUP(mobile),
> +	.info = &snb_display,
> +};
> +
> +static const struct intel_display_device_info ivb_display = {
> +	.has_hotplug = 1,
> +	IVB_PIPE_OFFSETS,
> +	IVB_CURSOR_OFFSETS,
> +	IVB_COLORS,
> +
> +	.__runtime_defaults.ip.ver = 7,
> +	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> +	.__runtime_defaults.cpu_transcoder_mask =
> +	BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
> +	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> +	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
>  };
>  
> -static const struct platform_desc ivb_desc = {
> +static const struct platform_desc ivb_d_desc = {
>  	PLATFORM(ivybridge),
> -	.info = &(const struct intel_display_device_info) {
> -		.has_hotplug = 1,
> -		IVB_PIPE_OFFSETS,
> -		IVB_CURSOR_OFFSETS,
> -		IVB_COLORS,
> +	.info = &ivb_display,

now I'm wondering 2 things:

1. is info really the good name now?
2. does it deserves a separate patch refactor other then this one focused
on the mobile group?

> +};
>  
> -		.__runtime_defaults.ip.ver = 7,
> -		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> -		.__runtime_defaults.cpu_transcoder_mask =
> -		BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
> -		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> -		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> -	},
> +static const struct platform_desc ivb_m_desc = {
> +	PLATFORM(ivybridge),
> +	PLATFORM_GROUP(mobile),
> +	.info = &ivb_display,
>  };
>  
>  static const struct platform_desc vlv_desc = {
> @@ -1385,11 +1416,14 @@ static const struct {
>  	INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_desc),
>  	INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_desc),
>  	INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_desc),
> -	INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_desc),
> +	INTEL_PNV_G_IDS(INTEL_DISPLAY_DEVICE, &pnv_g_desc),
> +	INTEL_PNV_M_IDS(INTEL_DISPLAY_DEVICE, &pnv_m_desc),
>  	INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_desc),
>  	INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_desc),
> -	INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_desc),
> -	INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_desc),
> +	INTEL_SNB_D_IDS(INTEL_DISPLAY_DEVICE, &snb_d_desc),
> +	INTEL_SNB_M_IDS(INTEL_DISPLAY_DEVICE, &snb_m_desc),
> +	INTEL_IVB_D_IDS(INTEL_DISPLAY_DEVICE, &ivb_d_desc),
> +	INTEL_IVB_M_IDS(INTEL_DISPLAY_DEVICE, &ivb_m_desc),
>  	INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_desc),
>  	INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_desc),
>  	INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_desc),
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e1398689cda5..84378c787923 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -24,6 +24,7 @@ struct pci_dev;
>  #define INTEL_DISPLAY_PLATFORMS(func) \
>  	/* Platform group aliases */ \
>  	func(g4x) /* g45 and gm45 */ \
> +	func(mobile) /* mobile platforms */ \
>  	func(dgfx) /* discrete graphics */ \
>  	/* Display ver 2 */ \
>  	func(i830) \
> -- 
> 2.39.5
> 

Re: [PATCH 01/15] drm/i915/display: identify discrete graphics

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:15PM +0200, Jani Nikula wrote:
> Identify discrete graphics separately in display, using the platform
> group mechanism. This enables dropping the dependency on i915_drv.h
> IS_DGFX() from display code.
> 
> Start grouping platform groups separately in INTEL_DISPLAY_PLATFORMS()
> in anticipation of more groups to come.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c | 8 ++++++--
>  drivers/gpu/drm/i915/display/intel_display_device.h | 4 +++-
>  2 files changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 5f98e1b2a401..47957384d56d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1011,6 +1011,7 @@ static const enum intel_step dg1_steppings[] = {
>  
>  static const struct platform_desc dg1_desc = {
>  	PLATFORM(dg1),
> +	PLATFORM_GROUP(dgfx),
>  	.info = &(const struct intel_display_device_info) {
>  		XE_D_DISPLAY,
>  
> @@ -1238,6 +1239,7 @@ static const enum intel_step dg2_g12_steppings[] = {
>  
>  static const struct platform_desc dg2_desc = {
>  	PLATFORM(dg2),
> +	PLATFORM_GROUP(dgfx),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
>  			SUBPLATFORM(dg2, g10),
> @@ -1338,6 +1340,7 @@ static const struct platform_desc lnl_desc = {
>  
>  static const struct platform_desc bmg_desc = {
>  	PLATFORM(battlemage),
> +	PLATFORM_GROUP(dgfx),
>  };
>  
>  static const struct platform_desc ptl_desc = {
> @@ -1636,9 +1639,10 @@ void intel_display_device_probe(struct drm_i915_private *i915)
>  
>  	DISPLAY_RUNTIME_INFO(i915)->step = step;
>  
> -	drm_info(&i915->drm, "Found %s%s%s (device ID %04x) display version %u.%02u stepping %s\n",
> +	drm_info(&i915->drm, "Found %s%s%s (device ID %04x) %s display version %u.%02u stepping %s\n",
>  		 desc->name, subdesc ? "/" : "", subdesc ? subdesc->name : "",
> -		 pdev->device, DISPLAY_RUNTIME_INFO(i915)->ip.ver,
> +		 pdev->device, display->platform.dgfx ? "discrete" : "integrated",
> +		 DISPLAY_RUNTIME_INFO(i915)->ip.ver,
>  		 DISPLAY_RUNTIME_INFO(i915)->ip.rel,
>  		 step != STEP_NONE ? intel_step_name(step) : "N/A");
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 43144a037f9f..392fbe29e974 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -21,6 +21,9 @@ struct drm_printer;
>   * platform.
>   */
>  #define INTEL_DISPLAY_PLATFORMS(func) \

INTEL_DISPLAY_PLATFORMS sudently doesn't sound a good name anymore...
but no better suggestion or other thoughts and I like this group thing

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> +	/* Platform group aliases */ \
> +	func(g4x) /* g45 and gm45 */ \
> +	func(dgfx) /* discrete graphics */ \
>  	/* Display ver 2 */ \
>  	func(i830) \
>  	func(i845g) \
> @@ -38,7 +41,6 @@ struct drm_printer;
>  	func(i965gm) \
>  	func(g45) \
>  	func(gm45) \
> -	func(g4x) /* group alias for g45 and gm45 */ \
>  	/* Display ver 5 */ \
>  	func(ironlake) \
>  	/* Display ver 6 */ \
> -- 
> 2.39.5
> 

Re: [PATCH 02/15] drm/i915/display: convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:16PM +0200, Jani Nikula wrote:
> Convert HAS_D12_PLANE_MINIMIZATION() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_display_device.h |  2 +-
>  drivers/gpu/drm/i915/display/intel_display_irq.c    | 12 +++++++-----
>  drivers/gpu/drm/i915/display/skl_universal_plane.c  |  4 +++-
>  4 files changed, 12 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 47957384d56d..1e561df02751 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1687,7 +1687,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
>  		display_runtime->num_scalers[PIPE_C] = 1;
>  	}
>  
> -	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
> +	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>  		for_each_pipe(i915, pipe)
>  			display_runtime->num_sprites[pipe] = 4;
>  	else if (DISPLAY_VER(i915) >= 11)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 392fbe29e974..e45ba21166d3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -144,7 +144,7 @@ struct intel_display_platforms {
>  #define HAS_CDCLK_CRAWL(i915)		(DISPLAY_INFO(i915)->has_cdclk_crawl)
>  #define HAS_CDCLK_SQUASH(i915)		(DISPLAY_INFO(i915)->has_cdclk_squash)
>  #define HAS_CUR_FBC(i915)		(!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13))
> -#define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
> +#define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)
>  #define HAS_DBUF_OVERLAP_DETECTION(__i915) (DISPLAY_RUNTIME_INFO(__i915)->has_dbuf_overlap_detection)
>  #define HAS_DDI(i915)			(DISPLAY_INFO(i915)->has_ddi)
>  #define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index e1547ebce60e..f0d3bdb5fc60 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -843,7 +843,9 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
>  
>  static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  {
> -	if (DISPLAY_VER(dev_priv) >= 14)
> +	struct intel_display *display = &dev_priv->display;
> +
> +	if (DISPLAY_VER(display) >= 14)
>  		return MTL_PIPEDMC_ATS_FAULT |
>  			MTL_PLANE_ATS_FAULT |
>  			GEN12_PIPEDMC_FAULT |
> @@ -853,7 +855,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  			GEN9_PIPE_PLANE3_FAULT |
>  			GEN9_PIPE_PLANE2_FAULT |
>  			GEN9_PIPE_PLANE1_FAULT;
> -	if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv))
> +	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>  		return GEN12_PIPEDMC_FAULT |
>  			GEN9_PIPE_CURSOR_FAULT |
>  			GEN11_PIPE_PLANE5_FAULT |
> @@ -861,7 +863,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  			GEN9_PIPE_PLANE3_FAULT |
>  			GEN9_PIPE_PLANE2_FAULT |
>  			GEN9_PIPE_PLANE1_FAULT;
> -	else if (DISPLAY_VER(dev_priv) == 12)
> +	else if (DISPLAY_VER(display) == 12)
>  		return GEN12_PIPEDMC_FAULT |
>  			GEN9_PIPE_CURSOR_FAULT |
>  			GEN11_PIPE_PLANE7_FAULT |
> @@ -871,7 +873,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  			GEN9_PIPE_PLANE3_FAULT |
>  			GEN9_PIPE_PLANE2_FAULT |
>  			GEN9_PIPE_PLANE1_FAULT;
> -	else if (DISPLAY_VER(dev_priv) == 11)
> +	else if (DISPLAY_VER(display) == 11)
>  		return GEN9_PIPE_CURSOR_FAULT |
>  			GEN11_PIPE_PLANE7_FAULT |
>  			GEN11_PIPE_PLANE6_FAULT |
> @@ -880,7 +882,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  			GEN9_PIPE_PLANE3_FAULT |
>  			GEN9_PIPE_PLANE2_FAULT |
>  			GEN9_PIPE_PLANE1_FAULT;
> -	else if (DISPLAY_VER(dev_priv) >= 9)
> +	else if (DISPLAY_VER(display) >= 9)
>  		return GEN9_PIPE_CURSOR_FAULT |
>  			GEN9_PIPE_PLANE4_FAULT |
>  			GEN9_PIPE_PLANE3_FAULT |
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 038ca2ec5d7a..c6e464d70cc7 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -239,7 +239,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>  
>  static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915)
>  {
> -	if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
> +	struct intel_display *display = &i915->display;
> +
> +	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>  		return BIT(PLANE_4) | BIT(PLANE_5);
>  	else
>  		return BIT(PLANE_6) | BIT(PLANE_7);
> -- 
> 2.39.5
> 

Re: [PATCH 03/15] drm/i915/display: convert HAS_4TILE() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:17PM +0200, Jani Nikula wrote:
> Convert HAS_4TILE() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_device.h    |  2 +-
>  drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 ++++++++------
>  2 files changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e45ba21166d3..70d1beebbf8f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -138,7 +138,7 @@ struct intel_display_platforms {
>  	func(overlay_needs_physical); \
>  	func(supports_tv);
>  
> -#define HAS_4TILE(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
>  #define HAS_ASYNC_FLIPS(i915)		(DISPLAY_VER(i915) >= 5)
>  #define HAS_BIGJOINER(i915)		(DISPLAY_VER(i915) >= 11 && HAS_DSC(i915))
>  #define HAS_CDCLK_CRAWL(i915)		(DISPLAY_INFO(i915)->has_cdclk_crawl)
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index c6e464d70cc7..28f7f2405ef3 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2550,13 +2550,14 @@ static bool tgl_plane_has_mc_ccs(struct drm_i915_private *i915,
>  static u8 skl_get_plane_caps(struct drm_i915_private *i915,
>  			     enum pipe pipe, enum plane_id plane_id)
>  {
> +	struct intel_display *display = &i915->display;
>  	u8 caps = INTEL_PLANE_CAP_TILING_X;
>  
> -	if (DISPLAY_VER(i915) < 13 || IS_ALDERLAKE_P(i915))
> +	if (DISPLAY_VER(display) < 13 || display->platform.alderlake_p)
>  		caps |= INTEL_PLANE_CAP_TILING_Y;
> -	if (DISPLAY_VER(i915) < 12)
> +	if (DISPLAY_VER(display) < 12)
>  		caps |= INTEL_PLANE_CAP_TILING_Yf;
> -	if (HAS_4TILE(i915))
> +	if (HAS_4TILE(display))
>  		caps |= INTEL_PLANE_CAP_TILING_4;
>  
>  	if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(i915))
> @@ -2564,14 +2565,14 @@ static u8 skl_get_plane_caps(struct drm_i915_private *i915,
>  
>  	if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) {
>  		caps |= INTEL_PLANE_CAP_CCS_RC;
> -		if (DISPLAY_VER(i915) >= 12)
> +		if (DISPLAY_VER(display) >= 12)
>  			caps |= INTEL_PLANE_CAP_CCS_RC_CC;
>  	}
>  
>  	if (tgl_plane_has_mc_ccs(i915, plane_id))
>  		caps |= INTEL_PLANE_CAP_CCS_MC;
>  
> -	if (DISPLAY_VER(i915) >= 14 && IS_DGFX(i915))
> +	if (DISPLAY_VER(display) >= 14 && display->platform.dgfx)
>  		caps |= INTEL_PLANE_CAP_NEED64K_PHYS;
>  
>  	return caps;
> @@ -2745,6 +2746,7 @@ void
>  skl_get_initial_plane_config(struct intel_crtc *crtc,
>  			     struct intel_initial_plane_config *plane_config)
>  {
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);
>  	struct drm_device *dev = crtc->base.dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -2826,7 +2828,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
>  			fb->modifier = I915_FORMAT_MOD_Y_TILED;
>  		break;
>  	case PLANE_CTL_TILED_YF: /* aka PLANE_CTL_TILED_4 on XE_LPD+ */
> -		if (HAS_4TILE(dev_priv)) {
> +		if (HAS_4TILE(display)) {
>  			u32 rc_mask = PLANE_CTL_RENDER_DECOMPRESSION_ENABLE |
>  				      PLANE_CTL_CLEAR_COLOR_DISABLE;
>  
> -- 
> 2.39.5
> 

Re: [PATCH 04/15] drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:18PM +0200, Jani Nikula wrote:
> Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c             | 4 ++--
>  drivers/gpu/drm/i915/display/intel_drrs.c           | 4 +++-
>  4 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 863927f429aa..57b42554d656 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5322,6 +5322,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  			  const struct intel_crtc_state *pipe_config,
>  			  bool fastset)
>  {
> +	struct intel_display *display = to_intel_display(current_config);
>  	struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev);
>  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>  	struct drm_printer p;
> @@ -5562,7 +5563,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  	PIPE_CONF_CHECK_I(lane_count);
>  	PIPE_CONF_CHECK_X(lane_lat_optim_mask);
>  
> -	if (HAS_DOUBLE_BUFFERED_M_N(dev_priv)) {
> +	if (HAS_DOUBLE_BUFFERED_M_N(display)) {
>  		if (!fastset || !pipe_config->update_m_n)
>  			PIPE_CONF_CHECK_M_N(dp_m_n);
>  	} else {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 70d1beebbf8f..e11993a6f042 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -149,7 +149,7 @@ struct intel_display_platforms {
>  #define HAS_DDI(i915)			(DISPLAY_INFO(i915)->has_ddi)
>  #define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
>  #define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
> -#define HAS_DOUBLE_BUFFERED_M_N(i915)	(DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
> +#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
>  #define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
>  #define HAS_DP20(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
>  #define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ff5ba7b3035f..a27da96d2c60 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1700,13 +1700,13 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>  
>  static bool has_seamless_m_n(struct intel_connector *connector)
>  {
> -	struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +	struct intel_display *display = to_intel_display(connector);
>  
>  	/*
>  	 * Seamless M/N reprogramming only implemented
>  	 * for BDW+ double buffered M/N registers so far.
>  	 */
> -	return HAS_DOUBLE_BUFFERED_M_N(i915) &&
> +	return HAS_DOUBLE_BUFFERED_M_N(display) &&
>  		intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index bb39eb96e812..0fec01b79b23 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -68,7 +68,9 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
>  bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
>  				   enum transcoder cpu_transcoder)
>  {
> -	if (HAS_DOUBLE_BUFFERED_M_N(i915))
> +	struct intel_display *display = &i915->display;
> +
> +	if (HAS_DOUBLE_BUFFERED_M_N(display))
>  		return true;
>  
>  	return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
> -- 
> 2.39.5
> 

Re: [PATCH 05/15] drm/i915/display: convert HAS_DP20() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:19PM +0200, Jani Nikula wrote:
> Convert HAS_DP20() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_audio.c    |  7 +++--
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 26 ++++++++++---------
>  .../drm/i915/display/intel_display_device.h   |  2 +-
>  drivers/gpu/drm/i915/display/intel_psr.c      |  8 +++---
>  4 files changed, 21 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 32aa9ec1a204..4cc70da8f467 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -681,12 +681,11 @@ static void ibx_audio_codec_enable(struct intel_encoder *encoder,
>  
>  void intel_audio_sdp_split_update(const struct intel_crtc_state *crtc_state)
>  {
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +	struct intel_display *display = to_intel_display(crtc_state);
>  	enum transcoder trans = crtc_state->cpu_transcoder;
>  
> -	if (HAS_DP20(i915))
> -		intel_de_rmw(i915, AUD_DP_2DOT0_CTRL(trans), AUD_ENABLE_SDP_SPLIT,
> +	if (HAS_DP20(display))
> +		intel_de_rmw(display, AUD_DP_2DOT0_CTRL(trans), AUD_ENABLE_SDP_SPLIT,
>  			     crtc_state->sdp_split_enable ? AUD_ENABLE_SDP_SPLIT : 0);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 49b5cc01ce40..46b7b90d3d98 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -700,8 +700,8 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
>  
>  bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
>  {
> -	struct drm_device *dev = intel_connector->base.dev;
> -	struct drm_i915_private *dev_priv = to_i915(dev);
> +	struct intel_display *display = to_intel_display(intel_connector);
> +	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_encoder *encoder = intel_attached_encoder(intel_connector);
>  	int type = intel_connector->base.connector_type;
>  	enum port port = encoder->port;
> @@ -747,7 +747,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
>  		break;
>  
>  	case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
> -		if (HAS_DP20(dev_priv))
> +		if (HAS_DP20(display))
>  			/* 128b/132b */
>  			ret = false;
>  		else
> @@ -769,8 +769,8 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
>  static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
>  					u8 *pipe_mask, bool *is_dp_mst)
>  {
> -	struct drm_device *dev = encoder->base.dev;
> -	struct drm_i915_private *dev_priv = to_i915(dev);
> +	struct intel_display *display = to_intel_display(encoder);
> +	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	enum port port = encoder->port;
>  	intel_wakeref_t wakeref;
>  	enum pipe p;
> @@ -840,7 +840,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
>  			continue;
>  
>  		if ((tmp & TRANS_DDI_MODE_SELECT_MASK) == TRANS_DDI_MODE_SELECT_DP_MST ||
> -		    (HAS_DP20(dev_priv) &&
> +		    (HAS_DP20(display) &&
>  		     (tmp & TRANS_DDI_MODE_SELECT_MASK) == TRANS_DDI_MODE_SELECT_FDI_OR_128B132B))
>  			mst_pipe_mask |= BIT(p);
>  
> @@ -2653,6 +2653,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  				  const struct intel_crtc_state *crtc_state,
>  				  const struct drm_connector_state *conn_state)
>  {
> +	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> @@ -2721,7 +2722,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	 */
>  	intel_ddi_enable_transcoder_clock(encoder, crtc_state);
>  
> -	if (HAS_DP20(dev_priv))
> +	if (HAS_DP20(display))
>  		intel_ddi_config_transcoder_dp2(encoder, crtc_state);
>  
>  	/*
> @@ -2862,9 +2863,9 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  				    const struct intel_crtc_state *crtc_state,
>  				    const struct drm_connector_state *conn_state)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_display *display = to_intel_display(encoder);
>  
> -	if (HAS_DP20(dev_priv))
> +	if (HAS_DP20(display))
>  		intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
>  					    crtc_state);
>  
> @@ -2872,9 +2873,9 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	if (crtc_state->has_panel_replay)
>  		intel_psr_enable_sink(enc_to_intel_dp(encoder), crtc_state);
>  
> -	if (DISPLAY_VER(dev_priv) >= 14)
> +	if (DISPLAY_VER(display) >= 14)
>  		mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
> -	else if (DISPLAY_VER(dev_priv) >= 12)
> +	else if (DISPLAY_VER(display) >= 12)
>  		tgl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
>  	else
>  		hsw_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
> @@ -3871,6 +3872,7 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
>  static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
>  				    struct intel_crtc_state *pipe_config)
>  {
> +	struct intel_display *display = to_intel_display(encoder);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>  	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
> @@ -3960,7 +3962,7 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
>  				intel_hdmi_infoframes_enabled(encoder, pipe_config);
>  		break;
>  	case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
> -		if (!HAS_DP20(dev_priv)) {
> +		if (!HAS_DP20(display)) {
>  			/* FDI */
>  			pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG);
>  			pipe_config->enhanced_framing =
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e11993a6f042..c861a61839b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -151,7 +151,7 @@ struct intel_display_platforms {
>  #define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
>  #define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
>  #define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
> -#define HAS_DP20(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_DP20(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
>  #define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)
>  #define HAS_DSB(i915)			(DISPLAY_INFO(i915)->has_dsb)
>  #define HAS_DSC(__i915)			(DISPLAY_RUNTIME_INFO(__i915)->has_dsc)
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index a784c0b81556..74c2e3635d9e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -3335,11 +3335,10 @@ void intel_psr_flush(struct intel_display *display,
>  void intel_psr_init(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_connector *connector = intel_dp->attached_connector;
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  
> -	if (!(HAS_PSR(display) || HAS_DP20(dev_priv)))
> +	if (!(HAS_PSR(display) || HAS_DP20(display)))
>  		return;
>  
>  	/*
> @@ -3357,7 +3356,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  		return;
>  	}
>  
> -	if ((HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp)) ||
> +	if ((HAS_DP20(display) && !intel_dp_is_edp(intel_dp)) ||
>  	    DISPLAY_VER(display) >= 20)
>  		intel_dp->psr.source_panel_replay_support = true;
>  
> @@ -3974,7 +3973,6 @@ DEFINE_SHOW_ATTRIBUTE(i915_psr_status);
>  void intel_psr_connector_debugfs_add(struct intel_connector *connector)
>  {
>  	struct intel_display *display = to_intel_display(connector);
> -	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct dentry *root = connector->base.debugfs_entry;
>  
>  	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> @@ -3984,7 +3982,7 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
>  	debugfs_create_file("i915_psr_sink_status", 0444, root,
>  			    connector, &i915_psr_sink_status_fops);
>  
> -	if (HAS_PSR(display) || HAS_DP20(i915))
> +	if (HAS_PSR(display) || HAS_DP20(display))
>  		debugfs_create_file("i915_psr_status", 0444, root,
>  				    connector, &i915_psr_status_fops);
>  }
> -- 
> 2.39.5
> 

Re: [PATCH 06/15] drm/i915/display: convert HAS_GMBUS_BURST_READ() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:20PM +0200, Jani Nikula wrote:
> Convert HAS_GMBUS_BURST_READ() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  drivers/gpu/drm/i915/display/intel_gmbus.c          | 3 +--
>  2 files changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index c861a61839b8..6279c6c6e831 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -160,7 +160,7 @@ struct intel_display_platforms {
>  #define HAS_FPGA_DBG_UNCLAIMED(i915)	(DISPLAY_INFO(i915)->has_fpga_dbg)
>  #define HAS_FW_BLC(i915)		(DISPLAY_VER(i915) >= 3)
>  #define HAS_GMBUS_IRQ(i915)		(DISPLAY_VER(i915) >= 4)
> -#define HAS_GMBUS_BURST_READ(i915)	(DISPLAY_VER(i915) >= 10 || IS_KABYLAKE(i915))
> +#define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
>  #define HAS_GMCH(i915)			(DISPLAY_INFO(i915)->has_gmch)
>  #define HAS_HW_SAGV_WM(i915)		(DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
>  #define HAS_IPC(i915)			(DISPLAY_INFO(i915)->has_ipc)
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index e3d938c7f83e..807cf606e7a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -496,14 +496,13 @@ static int
>  gmbus_xfer_read(struct intel_display *display, struct i2c_msg *msg,
>  		u32 gmbus0_reg, u32 gmbus1_index)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
>  	u8 *buf = msg->buf;
>  	unsigned int rx_size = msg->len;
>  	unsigned int len;
>  	int ret;
>  
>  	do {
> -		if (HAS_GMBUS_BURST_READ(i915))
> +		if (HAS_GMBUS_BURST_READ(display))
>  			len = min(rx_size, INTEL_GMBUS_BURST_READ_MAX_LEN);
>  		else
>  			len = min(rx_size, gmbus_max_xfer_size(display));
> -- 
> 2.39.5
> 

Re: [PATCH 07/15] drm/i915/display: convert HAS_IPS() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:21PM +0200, Jani Nikula wrote:
> Convert HAS_IPS() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/hsw_ips.c              | 4 +++-
>  drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  3 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
> index 34c5d28fc866..ee815e0344e8 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -185,7 +185,9 @@ void hsw_ips_post_update(struct intel_atomic_state *state,
>  /* IPS only exists on ULT machines and is tied to pipe A. */
>  bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
>  {
> -	return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A;
> +	struct intel_display *display = to_intel_display(crtc);
> +
> +	return HAS_IPS(display) && crtc->pipe == PIPE_A;
>  }
>  
>  bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 57b42554d656..f53611e83502 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4545,6 +4545,7 @@ static int hsw_compute_linetime_wm(struct intel_atomic_state *state,
>  static int intel_crtc_atomic_check(struct intel_atomic_state *state,
>  				   struct intel_crtc *crtc)
>  {
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	struct intel_crtc_state *crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
> @@ -4586,7 +4587,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
>  			return ret;
>  	}
>  
> -	if (HAS_IPS(dev_priv)) {
> +	if (HAS_IPS(display)) {
>  		ret = hsw_ips_compute_config(state, crtc);
>  		if (ret)
>  			return ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 6279c6c6e831..b85b1d3ff708 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -164,7 +164,7 @@ struct intel_display_platforms {
>  #define HAS_GMCH(i915)			(DISPLAY_INFO(i915)->has_gmch)
>  #define HAS_HW_SAGV_WM(i915)		(DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
>  #define HAS_IPC(i915)			(DISPLAY_INFO(i915)->has_ipc)
> -#define HAS_IPS(i915)			(IS_HASWELL_ULT(i915) || IS_BROADWELL(i915))
> +#define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
>  #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
>  #define HAS_LSPCON(i915)		(IS_DISPLAY_VER(i915, 9, 10))
>  #define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
> -- 
> 2.39.5
> 

Re: [PATCH 08/15] drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:22PM +0200, Jani Nikula wrote:
> Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h    |  2 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c   | 18 ++++++++++--------
>  2 files changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index b85b1d3ff708..a0fed40b7779 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -167,7 +167,7 @@ struct intel_display_platforms {
>  #define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
>  #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
>  #define HAS_LSPCON(i915)		(IS_DISPLAY_VER(i915, 9, 10))
> -#define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)
>  #define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
>  #define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
>  #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 3b0e87edbacf..83e2cbbfcaf0 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2496,6 +2496,7 @@ static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state *dbuf_state)
>  static int
>  skl_compute_ddb(struct intel_atomic_state *state)
>  {
> +	struct intel_display *display = to_intel_display(state);
>  	struct drm_i915_private *i915 = to_i915(state->base.dev);
>  	const struct intel_dbuf_state *old_dbuf_state;
>  	struct intel_dbuf_state *new_dbuf_state = NULL;
> @@ -2524,7 +2525,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
>  			return ret;
>  	}
>  
> -	if (HAS_MBUS_JOINING(i915)) {
> +	if (HAS_MBUS_JOINING(display)) {
>  		new_dbuf_state->joined_mbus =
>  			adlp_check_mbus_joined(new_dbuf_state->active_pipes);
>  
> @@ -2984,7 +2985,7 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)
>  		to_intel_dbuf_state(i915->display.dbuf.obj.state);
>  	struct intel_crtc *crtc;
>  
> -	if (HAS_MBUS_JOINING(i915))
> +	if (HAS_MBUS_JOINING(display))
>  		dbuf_state->joined_mbus = intel_de_read(i915, MBUS_CTL) & MBUS_JOIN;
>  
>  	dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
> @@ -3562,23 +3563,24 @@ int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
>  void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
>  					 int ratio, bool joined_mbus)
>  {
> +	struct intel_display *display = &i915->display;
>  	enum dbuf_slice slice;
>  
> -	if (!HAS_MBUS_JOINING(i915))
> +	if (!HAS_MBUS_JOINING(display))
>  		return;
>  
> -	if (DISPLAY_VER(i915) >= 20)
> -		intel_de_rmw(i915, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
> +	if (DISPLAY_VER(display) >= 20)
> +		intel_de_rmw(display, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
>  			     MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));
>  
>  	if (joined_mbus)
>  		ratio *= 2;
>  
> -	drm_dbg_kms(&i915->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
> +	drm_dbg_kms(display->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
>  		    ratio, str_yes_no(joined_mbus));
>  
> -	for_each_dbuf_slice(i915, slice)
> -		intel_de_rmw(i915, DBUF_CTL_S(slice),
> +	for_each_dbuf_slice(display, slice)
> +		intel_de_rmw(display, DBUF_CTL_S(slice),
>  			     DBUF_MIN_TRACKER_STATE_SERVICE_MASK,
>  			     DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
>  }
> -- 
> 2.39.5
> 

Re: [PATCH 09/15] drm/i915/display: convert HAS_SAGV() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:23PM +0200, Jani Nikula wrote:
> Convert HAS_SAGV() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h   |  3 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c  | 50 +++++++++++--------
>  2 files changed, 30 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index a0fed40b7779..c23823769911 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -173,7 +173,8 @@ struct intel_display_platforms {
>  #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
>  #define HAS_PSR_HW_TRACKING(i915)	(DISPLAY_INFO(i915)->has_psr_hw_tracking)
>  #define HAS_PSR2_SEL_FETCH(i915)	(DISPLAY_VER(i915) >= 12)
> -#define HAS_SAGV(i915)			(DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915) && !IS_GEMINILAKE(i915))
> +#define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
> +					 !(__display)->platform.broxton && !(__display)->platform.geminilake)
>  #define HAS_TRANSCODER(i915, trans)	((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
>  					  BIT(trans)) != 0)
>  #define HAS_UNCOMPRESSED_JOINER(i915)	(DISPLAY_VER(i915) >= 13)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 83e2cbbfcaf0..09af693da586 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -77,20 +77,23 @@ static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915)
>  bool
>  intel_has_sagv(struct drm_i915_private *i915)
>  {
> -	return HAS_SAGV(i915) &&
> -		i915->display.sagv.status != I915_SAGV_NOT_CONTROLLED;
> +	struct intel_display *display = &i915->display;
> +
> +	return HAS_SAGV(display) && display->sagv.status != I915_SAGV_NOT_CONTROLLED;
>  }
>  
>  static u32
>  intel_sagv_block_time(struct drm_i915_private *i915)
>  {
> -	if (DISPLAY_VER(i915) >= 14) {
> +	struct intel_display *display = &i915->display;
> +
> +	if (DISPLAY_VER(display) >= 14) {
>  		u32 val;
>  
> -		val = intel_de_read(i915, MTL_LATENCY_SAGV);
> +		val = intel_de_read(display, MTL_LATENCY_SAGV);
>  
>  		return REG_FIELD_GET(MTL_LATENCY_QCLK_SAGV, val);
> -	} else if (DISPLAY_VER(i915) >= 12) {
> +	} else if (DISPLAY_VER(display) >= 12) {
>  		u32 val = 0;
>  		int ret;
>  
> @@ -98,14 +101,14 @@ intel_sagv_block_time(struct drm_i915_private *i915)
>  				     GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
>  				     &val, NULL);
>  		if (ret) {
> -			drm_dbg_kms(&i915->drm, "Couldn't read SAGV block time!\n");
> +			drm_dbg_kms(display->drm, "Couldn't read SAGV block time!\n");
>  			return 0;
>  		}
>  
>  		return val;
> -	} else if (DISPLAY_VER(i915) == 11) {
> +	} else if (DISPLAY_VER(display) == 11) {
>  		return 10;
> -	} else if (HAS_SAGV(i915)) {
> +	} else if (HAS_SAGV(display)) {
>  		return 30;
>  	} else {
>  		return 0;
> @@ -114,31 +117,33 @@ intel_sagv_block_time(struct drm_i915_private *i915)
>  
>  static void intel_sagv_init(struct drm_i915_private *i915)
>  {
> -	if (!HAS_SAGV(i915))
> -		i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED;
> +	struct intel_display *display = &i915->display;
> +
> +	if (!HAS_SAGV(display))
> +		display->sagv.status = I915_SAGV_NOT_CONTROLLED;
>  
>  	/*
>  	 * Probe to see if we have working SAGV control.
>  	 * For icl+ this was already determined by intel_bw_init_hw().
>  	 */
> -	if (DISPLAY_VER(i915) < 11)
> +	if (DISPLAY_VER(display) < 11)
>  		skl_sagv_disable(i915);
>  
> -	drm_WARN_ON(&i915->drm, i915->display.sagv.status == I915_SAGV_UNKNOWN);
> +	drm_WARN_ON(display->drm, display->sagv.status == I915_SAGV_UNKNOWN);
>  
> -	i915->display.sagv.block_time_us = intel_sagv_block_time(i915);
> +	display->sagv.block_time_us = intel_sagv_block_time(i915);
>  
> -	drm_dbg_kms(&i915->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
> -		    str_yes_no(intel_has_sagv(i915)), i915->display.sagv.block_time_us);
> +	drm_dbg_kms(display->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
> +		    str_yes_no(intel_has_sagv(i915)), display->sagv.block_time_us);
>  
>  	/* avoid overflow when adding with wm0 latency/etc. */
> -	if (drm_WARN(&i915->drm, i915->display.sagv.block_time_us > U16_MAX,
> +	if (drm_WARN(display->drm, display->sagv.block_time_us > U16_MAX,
>  		     "Excessive SAGV block time %u, ignoring\n",
> -		     i915->display.sagv.block_time_us))
> -		i915->display.sagv.block_time_us = 0;
> +		     display->sagv.block_time_us))
> +		display->sagv.block_time_us = 0;
>  
>  	if (!intel_has_sagv(i915))
> -		i915->display.sagv.block_time_us = 0;
> +		display->sagv.block_time_us = 0;
>  }
>  
>  /*
> @@ -3832,13 +3837,14 @@ DEFINE_SHOW_ATTRIBUTE(intel_sagv_status);
>  
>  void skl_watermark_debugfs_register(struct drm_i915_private *i915)
>  {
> -	struct drm_minor *minor = i915->drm.primary;
> +	struct intel_display *display = &i915->display;
> +	struct drm_minor *minor = display->drm->primary;
>  
> -	if (HAS_IPC(i915))
> +	if (HAS_IPC(display))
>  		debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root, i915,
>  				    &skl_watermark_ipc_status_fops);
>  
> -	if (HAS_SAGV(i915))
> +	if (HAS_SAGV(display))
>  		debugfs_create_file("i915_sagv_status", 0444, minor->debugfs_root, i915,
>  				    &intel_sagv_status_fops);
>  }
> -- 
> 2.39.5
> 

Re: [PATCH 10/15] drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:24PM +0200, Jani Nikula wrote:
> Convert HAS_HW_SAGV_WM() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cursor.c   |  5 ++-
>  .../drm/i915/display/intel_display_device.h   |  2 +-
>  .../drm/i915/display/skl_universal_plane.c    |  7 ++--
>  drivers/gpu/drm/i915/display/skl_watermark.c  | 33 +++++++++++--------
>  4 files changed, 25 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> index 9ba77970dab7..ed88a28a3afa 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -619,7 +619,6 @@ static void skl_write_cursor_wm(struct intel_dsb *dsb,
>  				const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display = to_intel_display(plane->base.dev);
> -	struct drm_i915_private *i915 = to_i915(plane->base.dev);
>  	enum plane_id plane_id = plane->id;
>  	enum pipe pipe = plane->pipe;
>  	const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
> @@ -627,14 +626,14 @@ static void skl_write_cursor_wm(struct intel_dsb *dsb,
>  		&crtc_state->wm.skl.plane_ddb[plane_id];
>  	int level;
>  
> -	for (level = 0; level < i915->display.wm.num_levels; level++)
> +	for (level = 0; level < display->wm.num_levels; level++)
>  		intel_de_write_dsb(display, dsb, CUR_WM(pipe, level),
>  				   skl_cursor_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level)));
>  
>  	intel_de_write_dsb(display, dsb, CUR_WM_TRANS(pipe),
>  			   skl_cursor_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id)));
>  
> -	if (HAS_HW_SAGV_WM(i915)) {
> +	if (HAS_HW_SAGV_WM(display)) {
>  		const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id];
>  
>  		intel_de_write_dsb(display, dsb, CUR_WM_SAGV(pipe),
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index c23823769911..e1e718fced3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -162,7 +162,7 @@ struct intel_display_platforms {
>  #define HAS_GMBUS_IRQ(i915)		(DISPLAY_VER(i915) >= 4)
>  #define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
>  #define HAS_GMCH(i915)			(DISPLAY_INFO(i915)->has_gmch)
> -#define HAS_HW_SAGV_WM(i915)		(DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
> +#define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)
>  #define HAS_IPC(i915)			(DISPLAY_INFO(i915)->has_ipc)
>  #define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
>  #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 28f7f2405ef3..4c7bcf6806ff 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -736,7 +736,6 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
>  			       const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display = to_intel_display(plane->base.dev);
> -	struct drm_i915_private *i915 = to_i915(plane->base.dev);
>  	enum plane_id plane_id = plane->id;
>  	enum pipe pipe = plane->pipe;
>  	const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
> @@ -746,14 +745,14 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
>  		&crtc_state->wm.skl.plane_ddb_y[plane_id];
>  	int level;
>  
> -	for (level = 0; level < i915->display.wm.num_levels; level++)
> +	for (level = 0; level < display->wm.num_levels; level++)
>  		intel_de_write_dsb(display, dsb, PLANE_WM(pipe, plane_id, level),
>  				   skl_plane_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level)));
>  
>  	intel_de_write_dsb(display, dsb, PLANE_WM_TRANS(pipe, plane_id),
>  			   skl_plane_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id)));
>  
> -	if (HAS_HW_SAGV_WM(i915)) {
> +	if (HAS_HW_SAGV_WM(display)) {
>  		const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id];
>  
>  		intel_de_write_dsb(display, dsb, PLANE_WM_SAGV(pipe, plane_id),
> @@ -765,7 +764,7 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
>  	intel_de_write_dsb(display, dsb, PLANE_BUF_CFG(pipe, plane_id),
>  			   skl_plane_ddb_reg_val(ddb));
>  
> -	if (DISPLAY_VER(i915) < 11)
> +	if (DISPLAY_VER(display) < 11)
>  		intel_de_write_dsb(display, dsb, PLANE_NV12_BUF_CFG(pipe, plane_id),
>  				   skl_plane_ddb_reg_val(ddb_y));
>  }
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 09af693da586..060e0cfcb47f 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -449,6 +449,7 @@ bool intel_can_enable_sagv(struct drm_i915_private *i915,
>  
>  static int intel_compute_sagv_mask(struct intel_atomic_state *state)
>  {
> +	struct intel_display *display = to_intel_display(state);
>  	struct drm_i915_private *i915 = to_i915(state->base.dev);
>  	int ret;
>  	struct intel_crtc *crtc;
> @@ -484,7 +485,7 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state)
>  		 * other crtcs can't be allowed to use the more optimal
>  		 * normal (ie. non-SAGV) watermarks.
>  		 */
> -		pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(i915) &&
> +		pipe_wm->use_sagv_wm = !HAS_HW_SAGV_WM(display) &&
>  			DISPLAY_VER(i915) >= 12 &&
>  			intel_crtc_can_enable_sagv(new_crtc_state);
>  
> @@ -2748,10 +2749,10 @@ static bool skl_plane_selected_wm_equals(struct intel_plane *plane,
>  					 const struct skl_pipe_wm *old_pipe_wm,
>  					 const struct skl_pipe_wm *new_pipe_wm)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane->base.dev);
> +	struct intel_display *display = to_intel_display(plane);
>  	int level;
>  
> -	for (level = 0; level < i915->display.wm.num_levels; level++) {
> +	for (level = 0; level < display->wm.num_levels; level++) {
>  		/*
>  		 * We don't check uv_wm as the hardware doesn't actually
>  		 * use it. It only gets used for calculating the required
> @@ -2762,7 +2763,7 @@ static bool skl_plane_selected_wm_equals(struct intel_plane *plane,
>  			return false;
>  	}
>  
> -	if (HAS_HW_SAGV_WM(i915)) {
> +	if (HAS_HW_SAGV_WM(display)) {
>  		const struct skl_plane_wm *old_wm = &old_pipe_wm->planes[plane->id];
>  		const struct skl_plane_wm *new_wm = &new_pipe_wm->planes[plane->id];
>  
> @@ -2937,6 +2938,7 @@ static void skl_wm_level_from_reg_val(u32 val, struct skl_wm_level *level)
>  static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
>  				     struct skl_pipe_wm *out)
>  {
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	enum plane_id plane_id;
> @@ -2962,7 +2964,7 @@ static void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
>  
>  		skl_wm_level_from_reg_val(val, &wm->trans_wm);
>  
> -		if (HAS_HW_SAGV_WM(i915)) {
> +		if (HAS_HW_SAGV_WM(display)) {
>  			if (plane_id != PLANE_CURSOR)
>  				val = intel_de_read(i915, PLANE_WM_SAGV(pipe, plane_id));
>  			else
> @@ -3131,6 +3133,7 @@ static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
>  void intel_wm_state_verify(struct intel_atomic_state *state,
>  			   struct intel_crtc *crtc)
>  {
> +	struct intel_display *display = to_intel_display(state);
>  	struct drm_i915_private *i915 = to_i915(state->base.dev);
>  	const struct intel_crtc_state *new_crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
> @@ -3205,7 +3208,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
>  		hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0;
>  		sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0;
>  
> -		if (HAS_HW_SAGV_WM(i915) &&
> +		if (HAS_HW_SAGV_WM(display) &&
>  		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
>  			drm_err(&i915->drm,
>  				"[PLANE:%d:%s] mismatch in SAGV WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> @@ -3221,7 +3224,7 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
>  		hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm;
>  		sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm;
>  
> -		if (HAS_HW_SAGV_WM(i915) &&
> +		if (HAS_HW_SAGV_WM(display) &&
>  		    !skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
>  			drm_err(&i915->drm,
>  				"[PLANE:%d:%s] mismatch in SAGV trans WM (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> @@ -3392,17 +3395,19 @@ static void skl_read_wm_latency(struct drm_i915_private *i915, u16 wm[])
>  
>  static void skl_setup_wm_latency(struct drm_i915_private *i915)
>  {
> -	if (HAS_HW_SAGV_WM(i915))
> -		i915->display.wm.num_levels = 6;
> +	struct intel_display *display = &i915->display;
> +
> +	if (HAS_HW_SAGV_WM(display))
> +		display->wm.num_levels = 6;
>  	else
> -		i915->display.wm.num_levels = 8;
> +		display->wm.num_levels = 8;
>  
> -	if (DISPLAY_VER(i915) >= 14)
> -		mtl_read_wm_latency(i915, i915->display.wm.skl_latency);
> +	if (DISPLAY_VER(display) >= 14)
> +		mtl_read_wm_latency(i915, display->wm.skl_latency);
>  	else
> -		skl_read_wm_latency(i915, i915->display.wm.skl_latency);
> +		skl_read_wm_latency(i915, display->wm.skl_latency);
>  
> -	intel_print_wm_latency(i915, "Gen9 Plane", i915->display.wm.skl_latency);
> +	intel_print_wm_latency(i915, "Gen9 Plane", display->wm.skl_latency);
>  }
>  
>  static const struct intel_wm_funcs skl_wm_funcs = {
> -- 
> 2.39.5
> 

Re: [PATCH 11/15] drm/i915/display: convert HAS_ULTRAJOINER() to struct intel_display

[Rodrigo Vivi]

On Mon, Nov 04, 2024 at 07:19:25PM +0200, Jani Nikula wrote:
> Convert HAS_ULTRAJOINER() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c         | 10 ++++++----
>  drivers/gpu/drm/i915/display/intel_display_debugfs.c |  4 ++--
>  drivers/gpu/drm/i915/display/intel_display_device.h  |  6 +++---
>  drivers/gpu/drm/i915/display/intel_dp.c              |  5 ++---
>  4 files changed, 13 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index f53611e83502..a3924bbb0d2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3746,12 +3746,13 @@ static u8 fixup_ultrajoiner_secondary_pipes(u8 ultrajoiner_primary_pipes,
>  static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915,
>  				      u8 *primary_pipes, u8 *secondary_pipes)
>  {
> +	struct intel_display *display = &i915->display;
>  	struct intel_crtc *crtc;
>  
>  	*primary_pipes = 0;
>  	*secondary_pipes = 0;
>  
> -	if (!HAS_ULTRAJOINER(i915))
> +	if (!HAS_ULTRAJOINER(display))
>  		return;
>  
>  	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc,
> @@ -8310,11 +8311,12 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
>  
>  static int max_dotclock(struct drm_i915_private *i915)
>  {
> -	int max_dotclock = i915->display.cdclk.max_dotclk_freq;
> +	struct intel_display *display = &i915->display;
> +	int max_dotclock = display->cdclk.max_dotclk_freq;
>  
> -	if (HAS_ULTRAJOINER(i915))
> +	if (HAS_ULTRAJOINER(display))
>  		max_dotclock *= 4;
> -	else if (HAS_UNCOMPRESSED_JOINER(i915) || HAS_BIGJOINER(i915))
> +	else if (HAS_UNCOMPRESSED_JOINER(display) || HAS_BIGJOINER(display))
>  		max_dotclock *= 2;
>  
>  	return max_dotclock;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 11aff485d8fa..2874867aae2b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1331,7 +1331,7 @@ static ssize_t i915_joiner_write(struct file *file,
>  {
>  	struct seq_file *m = file->private_data;
>  	struct intel_connector *connector = m->private;
> -	struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +	struct intel_display *display = to_intel_display(connector);
>  	int force_joined_pipes = 0;
>  	int ret;
>  
> @@ -1349,7 +1349,7 @@ static ssize_t i915_joiner_write(struct file *file,
>  		connector->force_joined_pipes = force_joined_pipes;
>  		break;
>  	case 4:
> -		if (HAS_ULTRAJOINER(i915)) {
> +		if (HAS_ULTRAJOINER(display)) {
>  			connector->force_joined_pipes = force_joined_pipes;
>  			break;
>  		}
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index e1e718fced3c..548256401d0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -178,9 +178,9 @@ struct intel_display_platforms {
>  #define HAS_TRANSCODER(i915, trans)	((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
>  					  BIT(trans)) != 0)
>  #define HAS_UNCOMPRESSED_JOINER(i915)	(DISPLAY_VER(i915) >= 13)
> -#define HAS_ULTRAJOINER(i915)		((DISPLAY_VER(i915) >= 20 || \
> -					  (IS_DGFX(i915) && DISPLAY_VER(i915) == 14)) && \
> -					 HAS_DSC(i915))
> +#define HAS_ULTRAJOINER(__display)	((DISPLAY_VER(__display) >= 20 || \
> +					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
> +					 HAS_DSC(__display))
>  #define HAS_VRR(i915)			(DISPLAY_VER(i915) >= 11)
>  #define HAS_AS_SDP(i915)		(DISPLAY_VER(i915) >= 13)
>  #define HAS_CMRR(i915)			(DISPLAY_VER(i915) >= 20)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index a27da96d2c60..7d65945c9563 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1333,16 +1333,15 @@ int intel_dp_num_joined_pipes(struct intel_dp *intel_dp,
>  			      int hdisplay, int clock)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> -	struct drm_i915_private *i915 = to_i915(display->drm);
>  
>  	if (connector->force_joined_pipes)
>  		return connector->force_joined_pipes;
>  
> -	if (HAS_ULTRAJOINER(i915) &&
> +	if (HAS_ULTRAJOINER(display) &&
>  	    intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 4))
>  		return 4;
>  
> -	if ((HAS_BIGJOINER(i915) || HAS_UNCOMPRESSED_JOINER(i915)) &&
> +	if ((HAS_BIGJOINER(display) || HAS_UNCOMPRESSED_JOINER(display)) &&
>  	    intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 2))
>  		return 2;
>  
> -- 
> 2.39.5
> 

Re: [PATCH 15/15] drm/i915/display: add mobile platform group

[Jani Nikula]

On Wed, 06 Nov 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Mon, Nov 04, 2024 at 07:19:29PM +0200, Jani Nikula wrote:
>> Identify mobile platforms separately in display, using the platform
>> group mechanism. This enables dropping the dependency on i915_drv.h
>> IS_MOBILE() from display code.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  .../drm/i915/display/intel_display_device.c   | 104 ++++++++++++------
>>  .../drm/i915/display/intel_display_device.h   |   1 +
>>  2 files changed, 70 insertions(+), 35 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
>> index 8ba1b4652ca9..5689c5e5db0e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
>> @@ -253,6 +253,7 @@ static const struct intel_display_device_info no_display = {};
>>  
>>  static const struct platform_desc i830_desc = {
>>  	PLATFORM(i830),
>> +	PLATFORM_GROUP(mobile),
>>  	.info = &(const struct intel_display_device_info) {
>>  		I830_DISPLAY,
>>  
>> @@ -271,6 +272,7 @@ static const struct platform_desc i845_desc = {
>>  
>>  static const struct platform_desc i85x_desc = {
>>  	PLATFORM(i85x),
>> +	PLATFORM_GROUP(mobile),
>>  	.info = &(const struct intel_display_device_info) {
>>  		I830_DISPLAY,
>>  
>> @@ -313,6 +315,7 @@ static const struct platform_desc i915g_desc = {
>>  
>>  static const struct platform_desc i915gm_desc = {
>>  	PLATFORM(i915gm),
>> +	PLATFORM_GROUP(mobile),
>>  	.info = &(const struct intel_display_device_info) {
>>  		GEN3_DISPLAY,
>>  		I9XX_COLORS,
>> @@ -337,6 +340,7 @@ static const struct platform_desc i945g_desc = {
>>  
>>  static const struct platform_desc i945gm_desc = {
>>  	PLATFORM(i915gm),
>> +	PLATFORM_GROUP(mobile),
>>  	.info = &(const struct intel_display_device_info) {
>>  		GEN3_DISPLAY,
>>  		I9XX_COLORS,
>> @@ -358,13 +362,21 @@ static const struct platform_desc g33_desc = {
>>  	},
>>  };
>>  
>> -static const struct platform_desc pnv_desc = {
>> +static const struct intel_display_device_info pnv_display = {
>> +	GEN3_DISPLAY,
>> +	I9XX_COLORS,
>> +	.has_hotplug = 1,
>> +};
>> +
>> +static const struct platform_desc pnv_g_desc = {
>>  	PLATFORM(pineview),
>> -	.info = &(const struct intel_display_device_info) {
>> -		GEN3_DISPLAY,
>> -		I9XX_COLORS,
>> -		.has_hotplug = 1,
>> -	},
>> +	.info = &pnv_display,
>> +};
>> +
>> +static const struct platform_desc pnv_m_desc = {
>> +	PLATFORM(pineview),
>> +	PLATFORM_GROUP(mobile),
>> +	.info = &pnv_display,
>>  };
>>  
>>  #define GEN4_DISPLAY \
>> @@ -391,6 +403,7 @@ static const struct platform_desc i965g_desc = {
>>  
>>  static const struct platform_desc i965gm_desc = {
>>  	PLATFORM(i965gm),
>> +	PLATFORM_GROUP(mobile),
>>  	.info = &(const struct intel_display_device_info) {
>>  		GEN4_DISPLAY,
>>  		.has_overlay = 1,
>> @@ -414,6 +427,7 @@ static const struct platform_desc g45_desc = {
>>  static const struct platform_desc gm45_desc = {
>>  	PLATFORM(gm45),
>>  	PLATFORM_GROUP(g4x),
>> +	PLATFORM_GROUP(mobile),
>>  	.info = &(const struct intel_display_device_info) {
>>  		GEN4_DISPLAY,
>>  		.supports_tv = 1,
>> @@ -444,6 +458,7 @@ static const struct platform_desc ilk_d_desc = {
>>  
>>  static const struct platform_desc ilk_m_desc = {
>>  	PLATFORM(ironlake),
>> +	PLATFORM_GROUP(mobile),
>>  	.info = &(const struct intel_display_device_info) {
>>  		ILK_DISPLAY,
>>  
>> @@ -451,38 +466,54 @@ static const struct platform_desc ilk_m_desc = {
>>  	},
>>  };
>>  
>> -static const struct platform_desc snb_desc = {
>> +const struct intel_display_device_info snb_display = {
>
> get static back here as test robot already pointed out...
>
>> +	.has_hotplug = 1,
>> +	I9XX_PIPE_OFFSETS,
>> +	I9XX_CURSOR_OFFSETS,
>> +	ILK_COLORS,
>> +
>> +	.__runtime_defaults.ip.ver = 6,
>> +	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
>> +	.__runtime_defaults.cpu_transcoder_mask =
>> +	BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
>> +	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
>> +	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
>> +};
>> +
>> +static const struct platform_desc snb_d_desc = {
>>  	PLATFORM(sandybridge),
>> -	.info = &(const struct intel_display_device_info) {
>> -		.has_hotplug = 1,
>> -		I9XX_PIPE_OFFSETS,
>> -		I9XX_CURSOR_OFFSETS,
>> -		ILK_COLORS,
>> +	.info = &snb_display,
>> +};
>>  
>> -		.__runtime_defaults.ip.ver = 6,
>> -		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
>> -		.__runtime_defaults.cpu_transcoder_mask =
>> -		BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
>> -		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
>> -		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
>> -	},
>> +static const struct platform_desc snb_m_desc = {
>> +	PLATFORM(sandybridge),
>> +	PLATFORM_GROUP(mobile),
>> +	.info = &snb_display,
>> +};
>> +
>> +static const struct intel_display_device_info ivb_display = {
>> +	.has_hotplug = 1,
>> +	IVB_PIPE_OFFSETS,
>> +	IVB_CURSOR_OFFSETS,
>> +	IVB_COLORS,
>> +
>> +	.__runtime_defaults.ip.ver = 7,
>> +	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
>> +	.__runtime_defaults.cpu_transcoder_mask =
>> +	BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
>> +	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
>> +	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
>>  };
>>  
>> -static const struct platform_desc ivb_desc = {
>> +static const struct platform_desc ivb_d_desc = {
>>  	PLATFORM(ivybridge),
>> -	.info = &(const struct intel_display_device_info) {
>> -		.has_hotplug = 1,
>> -		IVB_PIPE_OFFSETS,
>> -		IVB_CURSOR_OFFSETS,
>> -		IVB_COLORS,
>> +	.info = &ivb_display,
>
> now I'm wondering 2 things:
>
> 1. is info really the good name now?

Why not?

Desc is the platform description, unrelated to display, and info is the
display info. In some cases display info was (and still is) inline, but
when it's shared between multiple platforms it needs to be separate.

> 2. does it deserves a separate patch refactor other then this one focused
> on the mobile group?

Un-inlining the dispay info init could reasonably be a separate
patch. Question is, do we then want to do it for all platforms, or just
the ones that need the split here?


BR,
Jani.


>
>> +};
>>  
>> -		.__runtime_defaults.ip.ver = 7,
>> -		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
>> -		.__runtime_defaults.cpu_transcoder_mask =
>> -		BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
>> -		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
>> -		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
>> -	},
>> +static const struct platform_desc ivb_m_desc = {
>> +	PLATFORM(ivybridge),
>> +	PLATFORM_GROUP(mobile),
>> +	.info = &ivb_display,
>>  };
>>  
>>  static const struct platform_desc vlv_desc = {
>> @@ -1385,11 +1416,14 @@ static const struct {
>>  	INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_desc),
>>  	INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_desc),
>>  	INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_desc),
>> -	INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_desc),
>> +	INTEL_PNV_G_IDS(INTEL_DISPLAY_DEVICE, &pnv_g_desc),
>> +	INTEL_PNV_M_IDS(INTEL_DISPLAY_DEVICE, &pnv_m_desc),
>>  	INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_desc),
>>  	INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_desc),
>> -	INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_desc),
>> -	INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_desc),
>> +	INTEL_SNB_D_IDS(INTEL_DISPLAY_DEVICE, &snb_d_desc),
>> +	INTEL_SNB_M_IDS(INTEL_DISPLAY_DEVICE, &snb_m_desc),
>> +	INTEL_IVB_D_IDS(INTEL_DISPLAY_DEVICE, &ivb_d_desc),
>> +	INTEL_IVB_M_IDS(INTEL_DISPLAY_DEVICE, &ivb_m_desc),
>>  	INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_desc),
>>  	INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_desc),
>>  	INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_desc),
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index e1398689cda5..84378c787923 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -24,6 +24,7 @@ struct pci_dev;
>>  #define INTEL_DISPLAY_PLATFORMS(func) \
>>  	/* Platform group aliases */ \
>>  	func(g4x) /* g45 and gm45 */ \
>> +	func(mobile) /* mobile platforms */ \
>>  	func(dgfx) /* discrete graphics */ \
>>  	/* Display ver 2 */ \
>>  	func(i830) \
>> -- 
>> 2.39.5
>> 

-- 
Jani Nikula, Intel

Re: [PATCH 15/15] drm/i915/display: add mobile platform group

[Rodrigo Vivi]

On Thu, Nov 07, 2024 at 12:32:56PM +0200, Jani Nikula wrote:
> On Wed, 06 Nov 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > On Mon, Nov 04, 2024 at 07:19:29PM +0200, Jani Nikula wrote:
> >> Identify mobile platforms separately in display, using the platform
> >> group mechanism. This enables dropping the dependency on i915_drv.h
> >> IS_MOBILE() from display code.
> >> 
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >>  .../drm/i915/display/intel_display_device.c   | 104 ++++++++++++------
> >>  .../drm/i915/display/intel_display_device.h   |   1 +
> >>  2 files changed, 70 insertions(+), 35 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> >> index 8ba1b4652ca9..5689c5e5db0e 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> >> @@ -253,6 +253,7 @@ static const struct intel_display_device_info no_display = {};
> >>  
> >>  static const struct platform_desc i830_desc = {
> >>  	PLATFORM(i830),
> >> +	PLATFORM_GROUP(mobile),
> >>  	.info = &(const struct intel_display_device_info) {
> >>  		I830_DISPLAY,
> >>  
> >> @@ -271,6 +272,7 @@ static const struct platform_desc i845_desc = {
> >>  
> >>  static const struct platform_desc i85x_desc = {
> >>  	PLATFORM(i85x),
> >> +	PLATFORM_GROUP(mobile),
> >>  	.info = &(const struct intel_display_device_info) {
> >>  		I830_DISPLAY,
> >>  
> >> @@ -313,6 +315,7 @@ static const struct platform_desc i915g_desc = {
> >>  
> >>  static const struct platform_desc i915gm_desc = {
> >>  	PLATFORM(i915gm),
> >> +	PLATFORM_GROUP(mobile),
> >>  	.info = &(const struct intel_display_device_info) {
> >>  		GEN3_DISPLAY,
> >>  		I9XX_COLORS,
> >> @@ -337,6 +340,7 @@ static const struct platform_desc i945g_desc = {
> >>  
> >>  static const struct platform_desc i945gm_desc = {
> >>  	PLATFORM(i915gm),
> >> +	PLATFORM_GROUP(mobile),
> >>  	.info = &(const struct intel_display_device_info) {
> >>  		GEN3_DISPLAY,
> >>  		I9XX_COLORS,
> >> @@ -358,13 +362,21 @@ static const struct platform_desc g33_desc = {
> >>  	},
> >>  };
> >>  
> >> -static const struct platform_desc pnv_desc = {
> >> +static const struct intel_display_device_info pnv_display = {
> >> +	GEN3_DISPLAY,
> >> +	I9XX_COLORS,
> >> +	.has_hotplug = 1,
> >> +};
> >> +
> >> +static const struct platform_desc pnv_g_desc = {
> >>  	PLATFORM(pineview),
> >> -	.info = &(const struct intel_display_device_info) {
> >> -		GEN3_DISPLAY,
> >> -		I9XX_COLORS,
> >> -		.has_hotplug = 1,
> >> -	},
> >> +	.info = &pnv_display,
> >> +};
> >> +
> >> +static const struct platform_desc pnv_m_desc = {
> >> +	PLATFORM(pineview),
> >> +	PLATFORM_GROUP(mobile),
> >> +	.info = &pnv_display,
> >>  };
> >>  
> >>  #define GEN4_DISPLAY \
> >> @@ -391,6 +403,7 @@ static const struct platform_desc i965g_desc = {
> >>  
> >>  static const struct platform_desc i965gm_desc = {
> >>  	PLATFORM(i965gm),
> >> +	PLATFORM_GROUP(mobile),
> >>  	.info = &(const struct intel_display_device_info) {
> >>  		GEN4_DISPLAY,
> >>  		.has_overlay = 1,
> >> @@ -414,6 +427,7 @@ static const struct platform_desc g45_desc = {
> >>  static const struct platform_desc gm45_desc = {
> >>  	PLATFORM(gm45),
> >>  	PLATFORM_GROUP(g4x),
> >> +	PLATFORM_GROUP(mobile),
> >>  	.info = &(const struct intel_display_device_info) {
> >>  		GEN4_DISPLAY,
> >>  		.supports_tv = 1,
> >> @@ -444,6 +458,7 @@ static const struct platform_desc ilk_d_desc = {
> >>  
> >>  static const struct platform_desc ilk_m_desc = {
> >>  	PLATFORM(ironlake),
> >> +	PLATFORM_GROUP(mobile),
> >>  	.info = &(const struct intel_display_device_info) {
> >>  		ILK_DISPLAY,
> >>  
> >> @@ -451,38 +466,54 @@ static const struct platform_desc ilk_m_desc = {
> >>  	},
> >>  };
> >>  
> >> -static const struct platform_desc snb_desc = {
> >> +const struct intel_display_device_info snb_display = {
> >
> > get static back here as test robot already pointed out...
> >
> >> +	.has_hotplug = 1,
> >> +	I9XX_PIPE_OFFSETS,
> >> +	I9XX_CURSOR_OFFSETS,
> >> +	ILK_COLORS,
> >> +
> >> +	.__runtime_defaults.ip.ver = 6,
> >> +	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> >> +	.__runtime_defaults.cpu_transcoder_mask =
> >> +	BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
> >> +	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> >> +	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> >> +};
> >> +
> >> +static const struct platform_desc snb_d_desc = {
> >>  	PLATFORM(sandybridge),
> >> -	.info = &(const struct intel_display_device_info) {
> >> -		.has_hotplug = 1,
> >> -		I9XX_PIPE_OFFSETS,
> >> -		I9XX_CURSOR_OFFSETS,
> >> -		ILK_COLORS,
> >> +	.info = &snb_display,
> >> +};
> >>  
> >> -		.__runtime_defaults.ip.ver = 6,
> >> -		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> >> -		.__runtime_defaults.cpu_transcoder_mask =
> >> -		BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
> >> -		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> >> -		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> >> -	},
> >> +static const struct platform_desc snb_m_desc = {
> >> +	PLATFORM(sandybridge),
> >> +	PLATFORM_GROUP(mobile),
> >> +	.info = &snb_display,
> >> +};
> >> +
> >> +static const struct intel_display_device_info ivb_display = {
> >> +	.has_hotplug = 1,
> >> +	IVB_PIPE_OFFSETS,
> >> +	IVB_CURSOR_OFFSETS,
> >> +	IVB_COLORS,
> >> +
> >> +	.__runtime_defaults.ip.ver = 7,
> >> +	.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> >> +	.__runtime_defaults.cpu_transcoder_mask =
> >> +	BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
> >> +	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> >> +	.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> >>  };
> >>  
> >> -static const struct platform_desc ivb_desc = {
> >> +static const struct platform_desc ivb_d_desc = {
> >>  	PLATFORM(ivybridge),
> >> -	.info = &(const struct intel_display_device_info) {
> >> -		.has_hotplug = 1,
> >> -		IVB_PIPE_OFFSETS,
> >> -		IVB_CURSOR_OFFSETS,
> >> -		IVB_COLORS,
> >> +	.info = &ivb_display,
> >
> > now I'm wondering 2 things:
> >
> > 1. is info really the good name now?
> 
> Why not?
> 
> Desc is the platform description, unrelated to display, and info is the
> display info. In some cases display info was (and still is) inline, but
> when it's shared between multiple platforms it needs to be separate.
> 
> > 2. does it deserves a separate patch refactor other then this one focused
> > on the mobile group?
> 
> Un-inlining the dispay info init could reasonably be a separate
> patch. Question is, do we then want to do it for all platforms, or just
> the ones that need the split here?

okay, let's just go as is

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> 
> BR,
> Jani.
> 
> 
> >
> >> +};
> >>  
> >> -		.__runtime_defaults.ip.ver = 7,
> >> -		.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> >> -		.__runtime_defaults.cpu_transcoder_mask =
> >> -		BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
> >> -		.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
> >> -		.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> >> -	},
> >> +static const struct platform_desc ivb_m_desc = {
> >> +	PLATFORM(ivybridge),
> >> +	PLATFORM_GROUP(mobile),
> >> +	.info = &ivb_display,
> >>  };
> >>  
> >>  static const struct platform_desc vlv_desc = {
> >> @@ -1385,11 +1416,14 @@ static const struct {
> >>  	INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_desc),
> >>  	INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_desc),
> >>  	INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_desc),
> >> -	INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_desc),
> >> +	INTEL_PNV_G_IDS(INTEL_DISPLAY_DEVICE, &pnv_g_desc),
> >> +	INTEL_PNV_M_IDS(INTEL_DISPLAY_DEVICE, &pnv_m_desc),
> >>  	INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_desc),
> >>  	INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_desc),
> >> -	INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_desc),
> >> -	INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_desc),
> >> +	INTEL_SNB_D_IDS(INTEL_DISPLAY_DEVICE, &snb_d_desc),
> >> +	INTEL_SNB_M_IDS(INTEL_DISPLAY_DEVICE, &snb_m_desc),
> >> +	INTEL_IVB_D_IDS(INTEL_DISPLAY_DEVICE, &ivb_d_desc),
> >> +	INTEL_IVB_M_IDS(INTEL_DISPLAY_DEVICE, &ivb_m_desc),
> >>  	INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_desc),
> >>  	INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_desc),
> >>  	INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_desc),
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> >> index e1398689cda5..84378c787923 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> >> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> >> @@ -24,6 +24,7 @@ struct pci_dev;
> >>  #define INTEL_DISPLAY_PLATFORMS(func) \
> >>  	/* Platform group aliases */ \
> >>  	func(g4x) /* g45 and gm45 */ \
> >> +	func(mobile) /* mobile platforms */ \
> >>  	func(dgfx) /* discrete graphics */ \
> >>  	/* Display ver 2 */ \
> >>  	func(i830) \
> >> -- 
> >> 2.39.5
> >> 
> 
> -- 
> Jani Nikula, Intel