* [Intel-gfx] [PATCH 0/2] drm/i915/display/dsc: Set BPP in the kernel
@ 2021-06-25 10:08 venkata.sai.patnana
2021-06-25 10:08 ` [Intel-gfx] [PATCH 1/2] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable venkata.sai.patnana
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: venkata.sai.patnana @ 2021-06-25 10:08 UTC (permalink / raw)
To: intel-gfx
From: Patnana Venkata Sai <venkata.sai.patnana@intel.com>
Test-with: 20210622102454.8922-1-venkata.sai.patnana@intel.com
Anusha Srivatsa (2):
drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP
enable
drm/i915/display/dsc: Set BPP in the kernel
.../drm/i915/display/intel_display_debugfs.c | 103 +++++++++++++++++-
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 23 +++-
3 files changed, 121 insertions(+), 6 deletions(-)
--
2.25.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable 2021-06-25 10:08 [Intel-gfx] [PATCH 0/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana @ 2021-06-25 10:08 ` venkata.sai.patnana 2021-06-25 10:08 ` [Intel-gfx] [PATCH 2/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana 2021-06-25 11:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork 2 siblings, 0 replies; 5+ messages in thread From: venkata.sai.patnana @ 2021-06-25 10:08 UTC (permalink / raw) To: intel-gfx From: Anusha Srivatsa <anusha.srivatsa@intel.com> DSC can be supported per DP connector. This patch creates a per connector debugfs node to expose the Input and Compressed BPP. The same node can be used from userspace to force DSC to a certain BPP. force_dsc_bpp is written through this debugfs node to force DSC BPP to all accepted values Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Navare Manasi D <manasi.d.navare@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Patnana Venkata Sai <venkata.sai.patnana@intel.com> --- .../drm/i915/display/intel_display_debugfs.c | 103 +++++++++++++++++- .../drm/i915/display/intel_display_types.h | 1 + 2 files changed, 103 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index af9e58619667d..6dc223227eeaa 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -2389,6 +2389,100 @@ static const struct file_operations i915_dsc_fec_support_fops = { .write = i915_dsc_fec_support_write }; +static int i915_dsc_bpp_support_show(struct seq_file *m, void *data) +{ + struct drm_connector *connector = m->private; + struct drm_device *dev = connector->dev; + struct drm_crtc *crtc; + struct intel_dp *intel_dp; + struct drm_modeset_acquire_ctx ctx; + struct intel_crtc_state *crtc_state = NULL; + int ret = 0; + bool try_again = false; + + drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); + + do { + try_again = false; + ret = drm_modeset_lock(&dev->mode_config.connection_mutex, + &ctx); + if (ret) { + ret = -EINTR; + break; + } + crtc = connector->state->crtc; + if (connector->status != connector_status_connected || !crtc) { + ret = -ENODEV; + break; + } + ret = drm_modeset_lock(&crtc->mutex, &ctx); + if (ret == -EDEADLK) { + ret = drm_modeset_backoff(&ctx); + if (!ret) { + try_again = true; + continue; + } + break; + } else if (ret) { + break; + } + intel_dp = intel_attached_dp(to_intel_connector(connector)); + crtc_state = to_intel_crtc_state(crtc->state); + seq_printf(m, "Input_BPP: %d\n", crtc_state->pipe_bpp); + seq_printf(m, "Compressed_BPP: %d\n", + crtc_state->dsc.compressed_bpp); + } while (try_again); + + drm_modeset_drop_locks(&ctx); + drm_modeset_acquire_fini(&ctx); + + return ret; +} + +static ssize_t i915_dsc_bpp_support_write(struct file *file, + const char __user *ubuf, + size_t len, loff_t *offp) +{ + int dsc_bpp = 0; + int ret; + struct drm_connector *connector = + ((struct seq_file *)file->private_data)->private; + struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); + struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + + if (len == 0) + return 0; + + drm_dbg(&i915->drm, + "Copied %zu bytes from user to force BPP\n", len); + + ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpp); + + intel_dp->force_dsc_bpp = dsc_bpp; + if (ret < 0) + return ret; + + *offp += len; + return len; +} + +static int i915_dsc_bpp_support_open(struct inode *inode, + struct file *file) +{ + return single_open(file, i915_dsc_bpp_support_show, + inode->i_private); +} + +static const struct file_operations i915_dsc_bpp_support_fops = { + .owner = THIS_MODULE, + .open = i915_dsc_bpp_support_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, + .write = i915_dsc_bpp_support_write +}; + /** * intel_connector_debugfs_add - add i915 specific connector debugfs files * @connector: pointer to a registered drm_connector @@ -2427,9 +2521,16 @@ int intel_connector_debugfs_add(struct drm_connector *connector) connector, &i915_hdcp_sink_capability_fops); } - if ((DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) && ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && !to_intel_connector(connector)->mst_port) || connector->connector_type == DRM_MODE_CONNECTOR_eDP)) + if ((DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) && + ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && + !to_intel_connector(connector)->mst_port) || + connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root, connector, &i915_dsc_fec_support_fops); + debugfs_create_file("i915_dsc_bpp_support", S_IRUGO, + root, connector, + &i915_dsc_bpp_support_fops); + } /* Legacy panels doesn't lpsp on any platform */ if ((DISPLAY_VER(dev_priv) >= 9 || IS_HASWELL(dev_priv) || diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index d94f361b548b7..19d8d3eefbc27 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1612,6 +1612,7 @@ struct intel_dp { /* Display stream compression testing */ bool force_dsc_en; + int force_dsc_bpp; bool hobl_failed; bool hobl_active; -- 2.25.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/display/dsc: Set BPP in the kernel 2021-06-25 10:08 [Intel-gfx] [PATCH 0/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana 2021-06-25 10:08 ` [Intel-gfx] [PATCH 1/2] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable venkata.sai.patnana @ 2021-06-25 10:08 ` venkata.sai.patnana 2021-06-29 5:32 ` Kulkarni, Vandita 2021-06-25 11:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork 2 siblings, 1 reply; 5+ messages in thread From: venkata.sai.patnana @ 2021-06-25 10:08 UTC (permalink / raw) To: intel-gfx From: Anusha Srivatsa <anusha.srivatsa@intel.com> Set compress BPP in kernel while connector DP or eDP Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Navare Manasi D <manasi.d.navare@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Patnana Venkata Sai <venkata.sai.patnana@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f74f70691247b..a454ee4210866 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1241,9 +1241,15 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, pipe_config->lane_count = limits->max_lane_count; if (intel_dp_is_edp(intel_dp)) { - pipe_config->dsc.compressed_bpp = - min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, - pipe_config->pipe_bpp); + if (intel_dp->force_dsc_bpp) { + drm_dbg_kms(&dev_priv->drm, + "DSC BPC forced to %d", intel_dp->force_dsc_bpp); + pipe_config->dsc.compressed_bpp = intel_dp->force_dsc_bpp; + } else { + pipe_config->dsc.compressed_bpp = + min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, + pipe_config->pipe_bpp); + } pipe_config->dsc.slice_count = drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, true); @@ -1269,9 +1275,15 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, "Compressed BPP/Slice Count not supported\n"); return -EINVAL; } - pipe_config->dsc.compressed_bpp = min_t(u16, + if (intel_dp->force_dsc_bpp) { + drm_dbg_kms(&dev_priv->drm, + "DSC BPC forced to %d\n", intel_dp->force_dsc_bpp); + pipe_config->dsc.compressed_bpp = intel_dp->force_dsc_bpp; + } else { + pipe_config->dsc.compressed_bpp = min_t(u16, dsc_max_output_bpp >> 4, pipe_config->pipe_bpp); + } pipe_config->dsc.slice_count = dsc_dp_slice_count; } /* @@ -1374,7 +1386,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, * Pipe joiner needs compression upto display12 due to BW limitation. DG2 * onwards pipe joiner can be enabled without compression. */ - drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en); + drm_dbg_kms(&i915->drm, "Force DSC en = %d\n Force DSC BPP = %d\n", + intel_dp->force_dsc_en, intel_dp->force_dsc_bpp); if (ret || intel_dp->force_dsc_en || (DISPLAY_VER(i915) < 13 && pipe_config->bigjoiner)) { ret = intel_dp_dsc_compute_config(intel_dp, pipe_config, -- 2.25.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/display/dsc: Set BPP in the kernel 2021-06-25 10:08 ` [Intel-gfx] [PATCH 2/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana @ 2021-06-29 5:32 ` Kulkarni, Vandita 0 siblings, 0 replies; 5+ messages in thread From: Kulkarni, Vandita @ 2021-06-29 5:32 UTC (permalink / raw) To: Patnana, Venkata Sai, intel-gfx@lists.freedesktop.org > -----Original Message----- > From: Patnana, Venkata Sai <venkata.sai.patnana@intel.com> > Sent: Friday, June 25, 2021 3:39 PM > To: intel-gfx@lists.freedesktop.org > Cc: Patnana, Venkata Sai <venkata.sai.patnana@intel.com>; Srivatsa, Anusha > <anusha.srivatsa@intel.com>; Kulkarni, Vandita > <vandita.kulkarni@intel.com>; Navare, Manasi D > <manasi.d.navare@intel.com> > Subject: [PATCH 2/2] drm/i915/display/dsc: Set BPP in the kernel > > From: Anusha Srivatsa <anusha.srivatsa@intel.com> > > Set compress BPP in kernel while connector DP or eDP > > Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> > Cc: Navare Manasi D <manasi.d.navare@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > Signed-off-by: Patnana Venkata Sai <venkata.sai.patnana@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++++++++++----- > 1 file changed, 18 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index f74f70691247b..a454ee4210866 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1241,9 +1241,15 @@ static int intel_dp_dsc_compute_config(struct > intel_dp *intel_dp, > pipe_config->lane_count = limits->max_lane_count; > > if (intel_dp_is_edp(intel_dp)) { > - pipe_config->dsc.compressed_bpp = > - min_t(u16, > drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, > - pipe_config->pipe_bpp); > + if (intel_dp->force_dsc_bpp) { > + drm_dbg_kms(&dev_priv->drm, > + "DSC BPC forced to %d", intel_dp- > >force_dsc_bpp); Should be DSC BPP. > + pipe_config->dsc.compressed_bpp = intel_dp- > >force_dsc_bpp; > + } else { > + pipe_config->dsc.compressed_bpp = > + min_t(u16, > drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, > + pipe_config->pipe_bpp); > + } > pipe_config->dsc.slice_count = > drm_dp_dsc_sink_max_slice_count(intel_dp- > >dsc_dpcd, > true); > @@ -1269,9 +1275,15 @@ static int intel_dp_dsc_compute_config(struct > intel_dp *intel_dp, > "Compressed BPP/Slice Count not > supported\n"); > return -EINVAL; > } > - pipe_config->dsc.compressed_bpp = min_t(u16, > + if (intel_dp->force_dsc_bpp) { > + drm_dbg_kms(&dev_priv->drm, > + "DSC BPC forced to %d\n", intel_dp- > >force_dsc_bpp); Same as above. > + pipe_config->dsc.compressed_bpp = intel_dp- > >force_dsc_bpp; > + } else { > + pipe_config->dsc.compressed_bpp = min_t(u16, > > dsc_max_output_bpp >> 4, > pipe_config- > >pipe_bpp); > + } > pipe_config->dsc.slice_count = dsc_dp_slice_count; > } > /* > @@ -1374,7 +1386,8 @@ intel_dp_compute_link_config(struct > intel_encoder *encoder, > * Pipe joiner needs compression upto display12 due to BW > limitation. DG2 > * onwards pipe joiner can be enabled without compression. > */ > - drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp- > >force_dsc_en); > + drm_dbg_kms(&i915->drm, "Force DSC en = %d\n Force DSC BPP = > %d\n", > + intel_dp->force_dsc_en, intel_dp->force_dsc_bpp); > if (ret || intel_dp->force_dsc_en || (DISPLAY_VER(i915) < 13 && > pipe_config->bigjoiner)) { > ret = intel_dp_dsc_compute_config(intel_dp, pipe_config, > -- > 2.25.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display/dsc: Set BPP in the kernel 2021-06-25 10:08 [Intel-gfx] [PATCH 0/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana 2021-06-25 10:08 ` [Intel-gfx] [PATCH 1/2] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable venkata.sai.patnana 2021-06-25 10:08 ` [Intel-gfx] [PATCH 2/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana @ 2021-06-25 11:03 ` Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2021-06-25 11:03 UTC (permalink / raw) To: venkata.sai.patnana; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 353 bytes --] == Series Details == Series: drm/i915/display/dsc: Set BPP in the kernel URL : https://patchwork.freedesktop.org/series/91917/ State : failure == Summary == Couldn't find any build artifact matching "Test-with: Test-with: 20210622102454.8922-1-venkata.sai.patnana@intel.com" Check that the msg-id is correct and make sure that it had been built. [-- Attachment #1.2: Type: text/html, Size: 827 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-06-29 5:32 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-06-25 10:08 [Intel-gfx] [PATCH 0/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana 2021-06-25 10:08 ` [Intel-gfx] [PATCH 1/2] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable venkata.sai.patnana 2021-06-25 10:08 ` [Intel-gfx] [PATCH 2/2] drm/i915/display/dsc: Set BPP in the kernel venkata.sai.patnana 2021-06-29 5:32 ` Kulkarni, Vandita 2021-06-25 11:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
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