From: "Kamble, Sagar A" <sagar.a.kamble@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/1] drm/i915: Do RPM Wake during GuC/HuC status read
Date: Fri, 3 Feb 2017 13:52:35 +0530 [thread overview]
Message-ID: <a8988334-6dae-70ca-aa17-998cd1cda625@intel.com> (raw)
In-Reply-To: <20170203073716.GB10177@nuc-i3427.alporthouse.com>
On 2/3/2017 1:07 PM, Chris Wilson wrote:
> On Fri, Feb 03, 2017 at 01:00:18PM +0530, Sagar Arun Kamble wrote:
>> HUC_STATUS, GUC_STATUS, SOFT_SCRATCH registers are read in debugfs.
>> This patch covers those accesses by RPM get/put.
> See also I915_PARAM_HUC_STATUS.
Yes. Will update this. Daniel had commented that this was broken. Will
float rev2
>
>> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
>> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> Testcase? There's definitely at least one that should be covering this.
Did you mean testcase to verify GuC/HuC load status and param value?
> -Chris
>
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next prev parent reply other threads:[~2017-02-03 8:22 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-03 7:30 [PATCH 1/1] drm/i915: Do RPM Wake during GuC/HuC status read Sagar Arun Kamble
2017-02-03 7:37 ` Chris Wilson
2017-02-03 8:22 ` Kamble, Sagar A [this message]
2017-02-03 7:54 ` ✗ Fi.CI.BAT: failure for series starting with [1/1] " Patchwork
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