* [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd
@ 2026-01-27 11:13 Vinod Govindapillai
2026-01-27 12:18 ` Ville Syrjälä
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Vinod Govindapillai @ 2026-01-27 11:13 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: vinod.govindapillai, uma.shankar, juha-pekka.heikkila
Pixel normalizer is enabled with normalization factor as 1.0 for
FP16 formats in order to support FBC for those formats in xe3p_lpd.
Previously pixel normalizer gets disabled during the plane disable
routine. But there could be plane format settings without explicitly
calling the plane disable in-between and we could endup keeping the
pixel normalizer enabled for formats which we don't require that.
This is causing crc mismatches in yuv formats and FIFO underruns in
planar formats like NV12.
Fix this by updating the pixel normalizer configuration based on the
pixel formats explicitly during the plane settings arm calls itself
- enable it for FP16 and disable it for other formats in HDR capable
planes. To avoid redundancies in these updates, normalization factor
between old and new plane states are compared before the update. The
function to check validity of the fp16 formats for fbc is now updated
to return the normalization factor as 1.0 in case of fp16 formats and
0 in other cases.
v2: avoid redundant pixel normalization setting updates
v3: moved the normalization factor definition to intel_fbc.c and some
updates to comments
Fixes: 5298eea7ed20 ("drm/i915/xe3p_lpd: use pixel normalizer for fp16 formats for FBC")
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_types.h | 8 ++
drivers/gpu/drm/i915/display/intel_fbc.c | 19 ++++-
drivers/gpu/drm/i915/display/intel_fbc.h | 4 +-
.../drm/i915/display/skl_universal_plane.c | 82 +++++++++++++++----
.../i915/display/skl_universal_plane_regs.h | 1 -
6 files changed, 92 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 6c74d6b0cc48..126aa1eeeb6d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -175,6 +175,7 @@ struct intel_display_platforms {
#define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
#define HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
#define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >= 30)
+#define HAS_FBC_FP16_FORMATS(__display) (DISPLAY_VER(__display) >= 35)
#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
#define HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
#define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >= 3)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e6298279dc89..92bce232b2c5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -686,6 +686,14 @@ struct intel_plane_state {
unsigned long flags;
#define PLANE_HAS_FENCE BIT(0)
+ /* xe3p_lpd+ */
+ struct {
+ /* In half-precision floating-point format. 0x3c00 (1.0) for fp16 formats */
+ unsigned int factor;
+ /* update is needed if factor differs between old and new plane states */
+ bool needs_update;
+ } pixel_normalizer;
+
struct intel_fb_view view;
/* for legacy cursor fb unpin */
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 1f3f5237a1c2..f9474e7741c8 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -71,6 +71,9 @@
#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
+/* Pixel normalization factor 1.0 in half-precision floating-point format */
+#define NORM_FACTOR_1_0_IN_HALF_PRECISION_FP 0x3c00
+
struct intel_fbc_funcs {
void (*activate)(struct intel_fbc *fbc);
void (*deactivate)(struct intel_fbc *fbc);
@@ -1215,13 +1218,21 @@ static bool xe3p_lpd_fbc_pixel_format_is_valid(const struct intel_plane_state *p
}
}
-bool
-intel_fbc_is_enable_pixel_normalizer(const struct intel_plane_state *plane_state)
+unsigned int
+intel_fbc_normalization_factor(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
- return DISPLAY_VER(display) >= 35 &&
- xe3p_lpd_fbc_fp16_format_is_valid(plane_state);
+ /*
+ * In order to have FBC for fp16 formats pixel normalizer block must be
+ * active. For FP16 formats, use normalization factor as 1.0 and enable
+ * the block.
+ */
+ if (HAS_FBC_FP16_FORMATS(display) &&
+ xe3p_lpd_fbc_fp16_format_is_valid(plane_state))
+ return NORM_FACTOR_1_0_IN_HALF_PRECISION_FP;
+
+ return 0;
}
static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index f0255ddae2b6..b5888e98a659 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -56,7 +56,7 @@ void intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,
struct intel_plane *plane);
-bool
-intel_fbc_is_enable_pixel_normalizer(const struct intel_plane_state *plane_state);
+unsigned int
+intel_fbc_normalization_factor(const struct intel_plane_state *plane_state);
#endif /* __INTEL_FBC_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index b3d41705448a..05c227913b8d 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -891,20 +891,49 @@ static void icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,
intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0);
}
-static void x3p_lpd_plane_update_pixel_normalizer(struct intel_dsb *dsb,
- struct intel_plane *plane,
- bool enable)
+static void xe3p_lpd_plane_disable_pixel_normalizer(struct intel_dsb *dsb,
+ struct intel_plane *plane)
{
struct intel_display *display = to_intel_display(plane);
enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane->pipe);
- u32 val;
+ const struct intel_plane_state *plane_state =
+ to_intel_plane_state(plane->base.state);
+
+ if (!HAS_FBC_FP16_FORMATS(display))
+ return;
+
+ if (!skl_plane_has_fbc(display, fbc_id, plane->id))
+ return;
+
+ if (!plane_state->pixel_normalizer.factor)
+ return;
+
+ intel_de_write_dsb(display, dsb,
+ PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id), 0);
+}
+
+static void xe3p_lpd_plane_update_pixel_normalizer(struct intel_dsb *dsb,
+ struct intel_plane *plane)
+{
+ struct intel_display *display = to_intel_display(plane);
+ enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane->pipe);
+ const struct intel_plane_state *plane_state =
+ to_intel_plane_state(plane->base.state);
+ u32 val = 0;
+
+ if (!HAS_FBC_FP16_FORMATS(display))
+ return;
- /* Only HDR planes have pixel normalizer and don't matter if no FBC */
+ /* Only HDR planes have pixel normalizer and don't matter if FBC is fused off */
if (!skl_plane_has_fbc(display, fbc_id, plane->id))
return;
- val = enable ? PLANE_PIXEL_NORMALIZE_NORM_FACTOR(PLANE_PIXEL_NORMALIZE_NORM_FACTOR_1_0) |
- PLANE_PIXEL_NORMALIZE_ENABLE : 0;
+ if (!plane_state->pixel_normalizer.needs_update)
+ return;
+
+ if (plane_state->pixel_normalizer.factor)
+ val = PLANE_PIXEL_NORMALIZE_NORM_FACTOR(plane_state->pixel_normalizer.factor) |
+ PLANE_PIXEL_NORMALIZE_ENABLE;
intel_de_write_dsb(display, dsb,
PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id), val);
@@ -926,8 +955,7 @@ icl_plane_disable_arm(struct intel_dsb *dsb,
icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);
- if (DISPLAY_VER(display) >= 35)
- x3p_lpd_plane_update_pixel_normalizer(dsb, plane, false);
+ xe3p_lpd_plane_disable_pixel_normalizer(dsb, plane);
intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), 0);
intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);
@@ -1674,13 +1702,7 @@ icl_plane_update_arm(struct intel_dsb *dsb,
intel_color_plane_commit_arm(dsb, plane_state);
- /*
- * In order to have FBC for fp16 formats pixel normalizer block must be
- * active. Check if pixel normalizer block need to be enabled for FBC.
- * If needed, use normalization factor as 1.0 and enable the block.
- */
- if (intel_fbc_is_enable_pixel_normalizer(plane_state))
- x3p_lpd_plane_update_pixel_normalizer(dsb, plane, true);
+ xe3p_lpd_plane_update_pixel_normalizer(dsb, plane);
/*
* The control register self-arms if the plane was previously
@@ -2350,6 +2372,32 @@ static void clip_damage(struct intel_plane_state *plane_state)
drm_rect_intersect(damage, &src);
}
+static void check_pixel_normalizer(struct intel_plane_state *plane_state)
+{
+ struct intel_display *display = to_intel_display(plane_state);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(plane_state->uapi.state);
+ const struct intel_plane_state *old_plane_state =
+ intel_atomic_get_old_plane_state(state, plane);
+
+ if (!HAS_FBC_FP16_FORMATS(display))
+ return;
+
+ plane_state->pixel_normalizer.factor =
+ intel_fbc_normalization_factor(plane_state);
+
+ /*
+ * In case of no old state to compare, better to force update the pixel
+ * normalizer settings.
+ */
+ plane_state->pixel_normalizer.needs_update = true;
+ if (old_plane_state && old_plane_state->hw.fb)
+ plane_state->pixel_normalizer.needs_update =
+ plane_state->pixel_normalizer.factor !=
+ intel_fbc_normalization_factor(old_plane_state);
+}
+
static int skl_plane_check(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
@@ -2400,6 +2448,8 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state,
check_protection(plane_state);
+ check_pixel_normalizer(plane_state);
+
/* HW only has 8 bits pixel precision, disable plane if invisible */
if (!(plane_state->hw.alpha >> 8)) {
plane_state->uapi.visible = false;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
index 6fd4da9f63cf..651f3557b576 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
@@ -580,6 +580,5 @@
#define PLANE_PIXEL_NORMALIZE_ENABLE REG_BIT(31)
#define PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK REG_GENMASK(15, 0)
#define PLANE_PIXEL_NORMALIZE_NORM_FACTOR(val) REG_FIELD_PREP(PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK, (val))
-#define PLANE_PIXEL_NORMALIZE_NORM_FACTOR_1_0 0x3c00
#endif /* __SKL_UNIVERSAL_PLANE_REGS_H__ */
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd
2026-01-27 11:13 [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd Vinod Govindapillai
@ 2026-01-27 12:18 ` Ville Syrjälä
2026-01-28 6:06 ` Shankar, Uma
2026-01-28 7:38 ` Govindapillai, Vinod
2026-01-27 12:21 ` ✓ i915.CI.BAT: success for drm/i915/display: fix the pixel normalization handling for xe3p_lpd (rev3) Patchwork
2026-01-27 18:04 ` ✗ i915.CI.Full: failure " Patchwork
2 siblings, 2 replies; 7+ messages in thread
From: Ville Syrjälä @ 2026-01-27 12:18 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe, intel-gfx, uma.shankar, juha-pekka.heikkila
On Tue, Jan 27, 2026 at 01:13:45PM +0200, Vinod Govindapillai wrote:
> Pixel normalizer is enabled with normalization factor as 1.0 for
> FP16 formats in order to support FBC for those formats in xe3p_lpd.
> Previously pixel normalizer gets disabled during the plane disable
> routine. But there could be plane format settings without explicitly
> calling the plane disable in-between and we could endup keeping the
> pixel normalizer enabled for formats which we don't require that.
> This is causing crc mismatches in yuv formats and FIFO underruns in
> planar formats like NV12.
>
> Fix this by updating the pixel normalizer configuration based on the
> pixel formats explicitly during the plane settings arm calls itself
> - enable it for FP16 and disable it for other formats in HDR capable
> planes. To avoid redundancies in these updates, normalization factor
> between old and new plane states are compared before the update. The
> function to check validity of the fp16 formats for fbc is now updated
> to return the normalization factor as 1.0 in case of fp16 formats and
> 0 in other cases.
This looks incredibly complex for just writing a single register.
I think it should be just somehting like:
static u32 pixel_normalizer_val()
{
if (!need_pixel_normalizer())
return 0;
return ENABLE | FACTOR;
}
plane_update(..)
{
...
if (HAS_PIXEL_NORMALIZER())
write(PIXEL_NOFMRALIZER, pixel_normalizer_val())
...
}
plane_disable()
{
...
// do we even need to disable it for disabled planes?
if (HAS_PIXEL_NORMALIZER())
write(PIXEL_NORMALIZER, 0);
...
}
>
> v2: avoid redundant pixel normalization setting updates
>
> v3: moved the normalization factor definition to intel_fbc.c and some
> updates to comments
>
> Fixes: 5298eea7ed20 ("drm/i915/xe3p_lpd: use pixel normalizer for fp16 formats for FBC")
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
> .../drm/i915/display/intel_display_device.h | 1 +
> .../drm/i915/display/intel_display_types.h | 8 ++
> drivers/gpu/drm/i915/display/intel_fbc.c | 19 ++++-
> drivers/gpu/drm/i915/display/intel_fbc.h | 4 +-
> .../drm/i915/display/skl_universal_plane.c | 82 +++++++++++++++----
> .../i915/display/skl_universal_plane_regs.h | 1 -
> 6 files changed, 92 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 6c74d6b0cc48..126aa1eeeb6d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -175,6 +175,7 @@ struct intel_display_platforms {
> #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
> #define HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
> #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >= 30)
> +#define HAS_FBC_FP16_FORMATS(__display) (DISPLAY_VER(__display) >= 35)
> #define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
> #define HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
> #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >= 3)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e6298279dc89..92bce232b2c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -686,6 +686,14 @@ struct intel_plane_state {
> unsigned long flags;
> #define PLANE_HAS_FENCE BIT(0)
>
> + /* xe3p_lpd+ */
> + struct {
> + /* In half-precision floating-point format. 0x3c00 (1.0) for fp16 formats */
> + unsigned int factor;
> + /* update is needed if factor differs between old and new plane states */
> + bool needs_update;
> + } pixel_normalizer;
> +
> struct intel_fb_view view;
>
> /* for legacy cursor fb unpin */
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 1f3f5237a1c2..f9474e7741c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -71,6 +71,9 @@
>
> #define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
>
> +/* Pixel normalization factor 1.0 in half-precision floating-point format */
> +#define NORM_FACTOR_1_0_IN_HALF_PRECISION_FP 0x3c00
> +
> struct intel_fbc_funcs {
> void (*activate)(struct intel_fbc *fbc);
> void (*deactivate)(struct intel_fbc *fbc);
> @@ -1215,13 +1218,21 @@ static bool xe3p_lpd_fbc_pixel_format_is_valid(const struct intel_plane_state *p
> }
> }
>
> -bool
> -intel_fbc_is_enable_pixel_normalizer(const struct intel_plane_state *plane_state)
> +unsigned int
> +intel_fbc_normalization_factor(const struct intel_plane_state *plane_state)
> {
> struct intel_display *display = to_intel_display(plane_state);
>
> - return DISPLAY_VER(display) >= 35 &&
> - xe3p_lpd_fbc_fp16_format_is_valid(plane_state);
> + /*
> + * In order to have FBC for fp16 formats pixel normalizer block must be
> + * active. For FP16 formats, use normalization factor as 1.0 and enable
> + * the block.
> + */
> + if (HAS_FBC_FP16_FORMATS(display) &&
> + xe3p_lpd_fbc_fp16_format_is_valid(plane_state))
> + return NORM_FACTOR_1_0_IN_HALF_PRECISION_FP;
> +
> + return 0;
> }
>
> static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
> index f0255ddae2b6..b5888e98a659 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -56,7 +56,7 @@ void intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
> struct intel_crtc *crtc);
> void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,
> struct intel_plane *plane);
> -bool
> -intel_fbc_is_enable_pixel_normalizer(const struct intel_plane_state *plane_state);
> +unsigned int
> +intel_fbc_normalization_factor(const struct intel_plane_state *plane_state);
>
> #endif /* __INTEL_FBC_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index b3d41705448a..05c227913b8d 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -891,20 +891,49 @@ static void icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,
> intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0);
> }
>
> -static void x3p_lpd_plane_update_pixel_normalizer(struct intel_dsb *dsb,
> - struct intel_plane *plane,
> - bool enable)
> +static void xe3p_lpd_plane_disable_pixel_normalizer(struct intel_dsb *dsb,
> + struct intel_plane *plane)
> {
> struct intel_display *display = to_intel_display(plane);
> enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane->pipe);
> - u32 val;
> + const struct intel_plane_state *plane_state =
> + to_intel_plane_state(plane->base.state);
> +
> + if (!HAS_FBC_FP16_FORMATS(display))
> + return;
> +
> + if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> + return;
> +
> + if (!plane_state->pixel_normalizer.factor)
> + return;
> +
> + intel_de_write_dsb(display, dsb,
> + PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id), 0);
> +}
> +
> +static void xe3p_lpd_plane_update_pixel_normalizer(struct intel_dsb *dsb,
> + struct intel_plane *plane)
> +{
> + struct intel_display *display = to_intel_display(plane);
> + enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane->pipe);
> + const struct intel_plane_state *plane_state =
> + to_intel_plane_state(plane->base.state);
> + u32 val = 0;
> +
> + if (!HAS_FBC_FP16_FORMATS(display))
> + return;
>
> - /* Only HDR planes have pixel normalizer and don't matter if no FBC */
> + /* Only HDR planes have pixel normalizer and don't matter if FBC is fused off */
> if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> return;
>
> - val = enable ? PLANE_PIXEL_NORMALIZE_NORM_FACTOR(PLANE_PIXEL_NORMALIZE_NORM_FACTOR_1_0) |
> - PLANE_PIXEL_NORMALIZE_ENABLE : 0;
> + if (!plane_state->pixel_normalizer.needs_update)
> + return;
> +
> + if (plane_state->pixel_normalizer.factor)
> + val = PLANE_PIXEL_NORMALIZE_NORM_FACTOR(plane_state->pixel_normalizer.factor) |
> + PLANE_PIXEL_NORMALIZE_ENABLE;
>
> intel_de_write_dsb(display, dsb,
> PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id), val);
> @@ -926,8 +955,7 @@ icl_plane_disable_arm(struct intel_dsb *dsb,
>
> icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);
>
> - if (DISPLAY_VER(display) >= 35)
> - x3p_lpd_plane_update_pixel_normalizer(dsb, plane, false);
> + xe3p_lpd_plane_disable_pixel_normalizer(dsb, plane);
>
> intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), 0);
> intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);
> @@ -1674,13 +1702,7 @@ icl_plane_update_arm(struct intel_dsb *dsb,
>
> intel_color_plane_commit_arm(dsb, plane_state);
>
> - /*
> - * In order to have FBC for fp16 formats pixel normalizer block must be
> - * active. Check if pixel normalizer block need to be enabled for FBC.
> - * If needed, use normalization factor as 1.0 and enable the block.
> - */
> - if (intel_fbc_is_enable_pixel_normalizer(plane_state))
> - x3p_lpd_plane_update_pixel_normalizer(dsb, plane, true);
> + xe3p_lpd_plane_update_pixel_normalizer(dsb, plane);
>
> /*
> * The control register self-arms if the plane was previously
> @@ -2350,6 +2372,32 @@ static void clip_damage(struct intel_plane_state *plane_state)
> drm_rect_intersect(damage, &src);
> }
>
> +static void check_pixel_normalizer(struct intel_plane_state *plane_state)
> +{
> + struct intel_display *display = to_intel_display(plane_state);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> + struct intel_atomic_state *state =
> + to_intel_atomic_state(plane_state->uapi.state);
> + const struct intel_plane_state *old_plane_state =
> + intel_atomic_get_old_plane_state(state, plane);
> +
> + if (!HAS_FBC_FP16_FORMATS(display))
> + return;
> +
> + plane_state->pixel_normalizer.factor =
> + intel_fbc_normalization_factor(plane_state);
> +
> + /*
> + * In case of no old state to compare, better to force update the pixel
> + * normalizer settings.
> + */
> + plane_state->pixel_normalizer.needs_update = true;
> + if (old_plane_state && old_plane_state->hw.fb)
> + plane_state->pixel_normalizer.needs_update =
> + plane_state->pixel_normalizer.factor !=
> + intel_fbc_normalization_factor(old_plane_state);
> +}
> +
> static int skl_plane_check(struct intel_crtc_state *crtc_state,
> struct intel_plane_state *plane_state)
> {
> @@ -2400,6 +2448,8 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state,
>
> check_protection(plane_state);
>
> + check_pixel_normalizer(plane_state);
> +
> /* HW only has 8 bits pixel precision, disable plane if invisible */
> if (!(plane_state->hw.alpha >> 8)) {
> plane_state->uapi.visible = false;
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> index 6fd4da9f63cf..651f3557b576 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> @@ -580,6 +580,5 @@
> #define PLANE_PIXEL_NORMALIZE_ENABLE REG_BIT(31)
> #define PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK REG_GENMASK(15, 0)
> #define PLANE_PIXEL_NORMALIZE_NORM_FACTOR(val) REG_FIELD_PREP(PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK, (val))
> -#define PLANE_PIXEL_NORMALIZE_NORM_FACTOR_1_0 0x3c00
>
> #endif /* __SKL_UNIVERSAL_PLANE_REGS_H__ */
> --
> 2.43.0
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/display: fix the pixel normalization handling for xe3p_lpd (rev3)
2026-01-27 11:13 [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd Vinod Govindapillai
2026-01-27 12:18 ` Ville Syrjälä
@ 2026-01-27 12:21 ` Patchwork
2026-01-27 18:04 ` ✗ i915.CI.Full: failure " Patchwork
2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-01-27 12:21 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 2931 bytes --]
== Series Details ==
Series: drm/i915/display: fix the pixel normalization handling for xe3p_lpd (rev3)
URL : https://patchwork.freedesktop.org/series/160255/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17893 -> Patchwork_160255v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/index.html
Participating hosts (43 -> 40)
------------------------------
Missing (3): bat-dg2-13 fi-snb-2520m bat-adls-6
Known issues
------------
Here are the changes found in Patchwork_160255v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@workarounds:
- bat-dg2-9: [PASS][1] -> [DMESG-FAIL][2] ([i915#12061]) +1 other test dmesg-fail
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/bat-dg2-9/igt@i915_selftest@live@workarounds.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/bat-dg2-9/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-mtlp-8: [DMESG-FAIL][3] ([i915#12061]) -> [PASS][4] +1 other test pass
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/bat-mtlp-8/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/bat-mtlp-8/igt@i915_selftest@live.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-atsm-1: [DMESG-FAIL][5] ([i915#12061] / [i915#13929]) -> [DMESG-FAIL][6] ([i915#12061] / [i915#14204])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/bat-atsm-1/igt@i915_selftest@live.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][7] ([i915#13929]) -> [DMESG-FAIL][8] ([i915#14204])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/bat-atsm-1/igt@i915_selftest@live@mman.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
Build changes
-------------
* Linux: CI_DRM_17893 -> Patchwork_160255v3
CI-20190529: 20190529
CI_DRM_17893: 786060d864f2e568a6ff216c63b927f80da2c043 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8719: 399f1e1cd9d38f0d0ab2c55a9ade415cc8248959 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_160255v3: 786060d864f2e568a6ff216c63b927f80da2c043 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/index.html
[-- Attachment #2: Type: text/html, Size: 3977 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ i915.CI.Full: failure for drm/i915/display: fix the pixel normalization handling for xe3p_lpd (rev3)
2026-01-27 11:13 [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd Vinod Govindapillai
2026-01-27 12:18 ` Ville Syrjälä
2026-01-27 12:21 ` ✓ i915.CI.BAT: success for drm/i915/display: fix the pixel normalization handling for xe3p_lpd (rev3) Patchwork
@ 2026-01-27 18:04 ` Patchwork
2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-01-27 18:04 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 127819 bytes --]
== Series Details ==
Series: drm/i915/display: fix the pixel normalization handling for xe3p_lpd (rev3)
URL : https://patchwork.freedesktop.org/series/160255/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_17893_full -> Patchwork_160255v3_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_160255v3_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_160255v3_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_160255v3_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@migrate:
- shard-mtlp: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-mtlp-6/igt@i915_selftest@live@migrate.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-5/igt@i915_selftest@live@migrate.html
New tests
---------
New tests have been introduced between CI_DRM_17893_full and Patchwork_160255v3_full:
### New IGT tests (3) ###
* igt@kms_atomic@plane-cursor-legacy@pipe-a-vga-1:
- Statuses : 1 pass(s)
- Exec time: [0.20] s
* igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping@pipe-a-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
* igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping@pipe-b-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_160255v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][3] ([i915#8411])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@api_intel_bb@blit-reloc-purge-cache.html
- shard-dg1: NOTRUN -> [SKIP][4] ([i915#8411])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-tglu: NOTRUN -> [SKIP][5] ([i915#11078])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_buddy@drm_buddy:
- shard-glk: NOTRUN -> [DMESG-WARN][6] ([i915#15095]) +1 other test dmesg-warn
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk3/igt@drm_buddy@drm_buddy.html
* igt@gem_caching@read-writes:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#4873])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@gem_caching@read-writes.html
* igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][8] ([i915#12392] / [i915#13356])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-tglu: NOTRUN -> [SKIP][9] ([i915#6335])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_create@create-ext-set-pat:
- shard-rkl: NOTRUN -> [SKIP][10] ([i915#8562])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@gem_create@create-ext-set-pat.html
* igt@gem_ctx_persistence@engines-cleanup:
- shard-snb: NOTRUN -> [SKIP][11] ([i915#1099])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-snb4/igt@gem_ctx_persistence@engines-cleanup.html
* igt@gem_ctx_persistence@heartbeat-close:
- shard-mtlp: NOTRUN -> [SKIP][12] ([i915#8555])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@gem_ctx_persistence@heartbeat-close.html
* igt@gem_ctx_sseu@mmap-args:
- shard-rkl: NOTRUN -> [SKIP][13] ([i915#280])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_eio@unwedge-stress:
- shard-snb: NOTRUN -> [FAIL][14] ([i915#8898]) +1 other test fail
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-snb4/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2: NOTRUN -> [SKIP][15] ([i915#4812])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@gem_exec_balancer@bonded-false-hang.html
- shard-dg1: NOTRUN -> [SKIP][16] ([i915#4812])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@gem_exec_balancer@bonded-false-hang.html
* igt@gem_exec_balancer@parallel-dmabuf-import-out-fence:
- shard-rkl: NOTRUN -> [SKIP][17] ([i915#4525])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@gem_exec_balancer@parallel-dmabuf-import-out-fence.html
- shard-tglu: NOTRUN -> [SKIP][18] ([i915#4525])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@gem_exec_balancer@parallel-dmabuf-import-out-fence.html
* igt@gem_exec_balancer@parallel-out-fence:
- shard-tglu-1: NOTRUN -> [SKIP][19] ([i915#4525])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@gem_exec_balancer@parallel-out-fence.html
* igt@gem_exec_reloc@basic-cpu-read-active:
- shard-dg2: NOTRUN -> [SKIP][20] ([i915#3281]) +3 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@gem_exec_reloc@basic-cpu-read-active.html
- shard-dg1: NOTRUN -> [SKIP][21] ([i915#3281]) +3 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@gem_exec_reloc@basic-cpu-read-active.html
* igt@gem_exec_reloc@basic-gtt-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][22] ([i915#3281]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@gem_exec_reloc@basic-gtt-noreloc.html
* igt@gem_exec_reloc@basic-wc-cpu:
- shard-rkl: NOTRUN -> [SKIP][23] ([i915#3281]) +6 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@gem_exec_reloc@basic-wc-cpu.html
* igt@gem_exec_suspend@basic-s0:
- shard-dg2: NOTRUN -> [INCOMPLETE][24] ([i915#13356]) +1 other test incomplete
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@gem_exec_suspend@basic-s0.html
* igt@gem_huc_copy@huc-copy:
- shard-glk: NOTRUN -> [SKIP][25] ([i915#2190])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk6/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-tglu: NOTRUN -> [SKIP][26] ([i915#4613]) +2 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@massive:
- shard-rkl: NOTRUN -> [SKIP][27] ([i915#4613])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@gem_lmem_swapping@massive.html
* igt@gem_lmem_swapping@parallel-random-verify:
- shard-tglu-1: NOTRUN -> [SKIP][28] ([i915#4613]) +2 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-verify.html
* igt@gem_lmem_swapping@random:
- shard-glk: NOTRUN -> [SKIP][29] ([i915#4613]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk1/igt@gem_lmem_swapping@random.html
* igt@gem_mmap_gtt@fault-concurrent-y:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#4077]) +3 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@gem_mmap_gtt@fault-concurrent-y.html
- shard-dg1: NOTRUN -> [SKIP][31] ([i915#4077]) +2 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@gem_mmap_gtt@fault-concurrent-y.html
* igt@gem_mmap_wc@bad-offset:
- shard-mtlp: NOTRUN -> [SKIP][32] ([i915#4083])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@gem_mmap_wc@bad-offset.html
* igt@gem_mmap_wc@bad-size:
- shard-dg2: NOTRUN -> [SKIP][33] ([i915#4083])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@gem_mmap_wc@bad-size.html
* igt@gem_pread@display:
- shard-dg2: NOTRUN -> [SKIP][34] ([i915#3282])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@gem_pread@display.html
- shard-dg1: NOTRUN -> [SKIP][35] ([i915#3282])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@gem_pread@display.html
* igt@gem_pread@exhaustion:
- shard-tglu: NOTRUN -> [WARN][36] ([i915#2658])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@gem_pread@exhaustion.html
* igt@gem_pwrite@basic-random:
- shard-rkl: NOTRUN -> [SKIP][37] ([i915#3282]) +4 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@gem_pwrite@basic-random.html
* igt@gem_pxp@hw-rejects-pxp-context:
- shard-tglu: NOTRUN -> [SKIP][38] ([i915#13398])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@gem_pxp@hw-rejects-pxp-context.html
* igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#4270]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
- shard-dg1: NOTRUN -> [SKIP][40] ([i915#4270]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
* igt@gem_render_copy@y-tiled-ccs-to-y-tiled-ccs:
- shard-mtlp: NOTRUN -> [SKIP][41] ([i915#8428])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-ccs.html
* igt@gem_render_copy@yf-tiled-ccs-to-y-tiled:
- shard-dg2: NOTRUN -> [SKIP][42] ([i915#5190] / [i915#8428]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@gem_render_copy@yf-tiled-ccs-to-y-tiled.html
* igt@gem_softpin@noreloc-s3:
- shard-rkl: NOTRUN -> [INCOMPLETE][43] ([i915#13809])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gem_softpin@noreloc-s3.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-tglu: NOTRUN -> [SKIP][44] ([i915#3297] / [i915#3323])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-tglu-1: NOTRUN -> [SKIP][45] ([i915#3297])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-dg2: NOTRUN -> [SKIP][46] ([i915#3297] / [i915#4880])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
- shard-dg1: NOTRUN -> [SKIP][47] ([i915#3297] / [i915#4880])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-tglu: NOTRUN -> [SKIP][48] ([i915#3297])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gen3_render_tiledy_blits:
- shard-mtlp: NOTRUN -> [SKIP][49] +3 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@gen3_render_tiledy_blits.html
* igt@gen9_exec_parse@batch-invalid-length:
- shard-dg2: NOTRUN -> [SKIP][50] ([i915#2856])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@gen9_exec_parse@batch-invalid-length.html
- shard-rkl: NOTRUN -> [SKIP][51] ([i915#2527]) +2 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@gen9_exec_parse@batch-invalid-length.html
- shard-dg1: NOTRUN -> [SKIP][52] ([i915#2527])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@gen9_exec_parse@batch-invalid-length.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglu: NOTRUN -> [SKIP][53] ([i915#2527] / [i915#2856]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@gen9_exec_parse@bb-start-cmd.html
* igt@gen9_exec_parse@secure-batches:
- shard-tglu-1: NOTRUN -> [SKIP][54] ([i915#2527] / [i915#2856]) +1 other test skip
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@gen9_exec_parse@secure-batches.html
* igt@i915_drm_fdinfo@busy-hang@ccs0:
- shard-mtlp: NOTRUN -> [SKIP][55] ([i915#14073]) +6 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@i915_drm_fdinfo@busy-hang@ccs0.html
* igt@i915_drm_fdinfo@busy@rcs0:
- shard-dg1: NOTRUN -> [SKIP][56] ([i915#14073]) +5 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@i915_drm_fdinfo@busy@rcs0.html
* igt@i915_drm_fdinfo@busy@vecs1:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#14073]) +7 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@i915_drm_fdinfo@busy@vecs1.html
* igt@i915_module_load@reload-no-display:
- shard-dg2: NOTRUN -> [DMESG-WARN][58] ([i915#13029] / [i915#14545])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@i915_module_load@reload-no-display.html
- shard-dg1: NOTRUN -> [DMESG-WARN][59] ([i915#13029] / [i915#14545])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@i915_module_load@reload-no-display.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2: [PASS][60] -> [INCOMPLETE][61] ([i915#13356] / [i915#13820]) +1 other test incomplete
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-11/igt@i915_pm_freq_api@freq-suspend@gt0.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-7/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@i915_pm_rpm@system-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][62] ([i915#13356])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk8/igt@i915_pm_rpm@system-suspend.html
* igt@i915_pm_rps@thresholds-park:
- shard-dg2: NOTRUN -> [SKIP][63] ([i915#11681])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@i915_pm_rps@thresholds-park.html
- shard-dg1: NOTRUN -> [SKIP][64] ([i915#11681])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@i915_pm_rps@thresholds-park.html
* igt@i915_pm_sseu@full-enable:
- shard-mtlp: NOTRUN -> [SKIP][65] ([i915#8437])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@hwconfig_table:
- shard-tglu: NOTRUN -> [SKIP][66] ([i915#6245])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@i915_query@hwconfig_table.html
* igt@i915_selftest@live:
- shard-mtlp: [PASS][67] -> [INCOMPLETE][68] ([i915#15176])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-mtlp-6/igt@i915_selftest@live.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-5/igt@i915_selftest@live.html
* igt@i915_suspend@debugfs-reader:
- shard-rkl: [PASS][69] -> [INCOMPLETE][70] ([i915#4817]) +1 other test incomplete
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@i915_suspend@debugfs-reader.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@fence-restore-untiled:
- shard-rkl: [PASS][71] -> [ABORT][72] ([i915#15131])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-5/igt@i915_suspend@fence-restore-untiled.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-1/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_addfb_basic@clobberred-modifier:
- shard-dg2: NOTRUN -> [SKIP][73] ([i915#4212])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_addfb_basic@clobberred-modifier.html
- shard-dg1: NOTRUN -> [SKIP][74] ([i915#4212])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_addfb_basic@clobberred-modifier.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-tglu-1: NOTRUN -> [SKIP][75] ([i915#1769] / [i915#3555])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][76] ([i915#5286]) +2 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][77] ([i915#4538] / [i915#5286])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-180:
- shard-tglu-1: NOTRUN -> [SKIP][78] ([i915#5286]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-tglu: NOTRUN -> [SKIP][79] ([i915#5286]) +3 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [PASS][80] -> [FAIL][81] ([i915#5138])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][82] ([i915#3638])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][83] ([i915#3638])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][84] ([i915#4538] / [i915#5190]) +3 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
- shard-dg1: NOTRUN -> [SKIP][85] ([i915#4538]) +1 other test skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-rkl: NOTRUN -> [SKIP][86] +12 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][87] ([i915#6095]) +49 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][88] ([i915#6095]) +128 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-17/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][89] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-4/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-dg2: NOTRUN -> [SKIP][90] ([i915#12313])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
- shard-dg1: NOTRUN -> [SKIP][91] ([i915#12313])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc:
- shard-mtlp: NOTRUN -> [SKIP][92] ([i915#6095]) +4 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][93] ([i915#6095]) +51 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2:
- shard-glk: NOTRUN -> [SKIP][94] +361 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][95] ([i915#6095]) +29 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs:
- shard-tglu: NOTRUN -> [SKIP][96] ([i915#6095]) +54 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [INCOMPLETE][97] ([i915#14694] / [i915#15582]) +1 other test incomplete
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk3/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
- shard-rkl: [PASS][98] -> [INCOMPLETE][99] ([i915#15582])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [INCOMPLETE][100] ([i915#15582])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-rkl: NOTRUN -> [SKIP][101] ([i915#12313])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][102] ([i915#14098] / [i915#6095]) +29 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc@pipe-c-dp-3:
- shard-dg2: NOTRUN -> [SKIP][103] ([i915#10307] / [i915#6095]) +137 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-11/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc@pipe-c-dp-3.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][104] ([i915#4423] / [i915#6095])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-12/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-tglu-1: NOTRUN -> [SKIP][105] ([i915#3742])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][106] ([i915#13783]) +3 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-4/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1.html
* igt@kms_chamelium_audio@dp-audio:
- shard-tglu: NOTRUN -> [SKIP][107] ([i915#11151] / [i915#7828]) +7 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_chamelium_color@degamma:
- shard-dg2: NOTRUN -> [SKIP][108] +5 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
- shard-mtlp: NOTRUN -> [SKIP][109] ([i915#11151] / [i915#7828])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-dg2: NOTRUN -> [SKIP][110] ([i915#11151] / [i915#7828]) +1 other test skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
- shard-dg1: NOTRUN -> [SKIP][111] ([i915#11151] / [i915#7828]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_hpd@dp-hpd-storm:
- shard-rkl: NOTRUN -> [SKIP][112] ([i915#11151] / [i915#7828]) +4 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_chamelium_hpd@dp-hpd-storm.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-tglu-1: NOTRUN -> [SKIP][113] ([i915#11151] / [i915#7828]) +1 other test skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_color@deep-color:
- shard-tglu: NOTRUN -> [SKIP][114] ([i915#3555] / [i915#9979])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_color@deep-color.html
* igt@kms_content_protection@atomic:
- shard-rkl: NOTRUN -> [SKIP][115] ([i915#6944] / [i915#7118] / [i915#9424])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_content_protection@atomic.html
- shard-tglu: NOTRUN -> [SKIP][116] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@atomic-dpms-hdcp14:
- shard-dg2: NOTRUN -> [SKIP][117] ([i915#6944]) +1 other test skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@kms_content_protection@atomic-dpms-hdcp14.html
- shard-tglu-1: NOTRUN -> [SKIP][118] ([i915#6944])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_content_protection@atomic-dpms-hdcp14.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-dg1: NOTRUN -> [SKIP][119] ([i915#6944])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_content_protection@atomic-hdcp14.html
- shard-rkl: NOTRUN -> [SKIP][120] ([i915#6944])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_content_protection@content-type-change:
- shard-rkl: NOTRUN -> [SKIP][121] ([i915#6944] / [i915#9424])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-tglu-1: NOTRUN -> [SKIP][122] ([i915#15330] / [i915#3116] / [i915#3299])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
- shard-tglu: NOTRUN -> [SKIP][123] ([i915#15330])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-tglu: NOTRUN -> [SKIP][124] ([i915#13049]) +1 other test skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-tglu-1: NOTRUN -> [SKIP][125] ([i915#13049])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-dg2: NOTRUN -> [SKIP][126] ([i915#3555]) +1 other test skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@kms_cursor_crc@cursor-random-max-size.html
- shard-tglu-1: NOTRUN -> [SKIP][127] ([i915#3555]) +2 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-rkl: NOTRUN -> [SKIP][128] ([i915#13049]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-sliding-64x21:
- shard-mtlp: NOTRUN -> [SKIP][129] ([i915#8814])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_cursor_crc@cursor-sliding-64x21.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-rkl: NOTRUN -> [SKIP][130] ([i915#4103])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- shard-tglu: NOTRUN -> [SKIP][131] ([i915#4103])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-mtlp: NOTRUN -> [SKIP][132] ([i915#9809])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
- shard-dg1: NOTRUN -> [DMESG-WARN][133] ([i915#4423])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][134] ([i915#3804])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_dp_aux_dev:
- shard-dg2: [PASS][135] -> [SKIP][136] ([i915#1257])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-11/igt@kms_dp_aux_dev.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-8/igt@kms_dp_aux_dev.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-rkl: NOTRUN -> [SKIP][137] ([i915#13707])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_dp_linktrain_fallback@dp-fallback.html
- shard-tglu: NOTRUN -> [SKIP][138] ([i915#13707])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-tglu: NOTRUN -> [SKIP][139] ([i915#3840])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_feature_discovery@chamelium:
- shard-tglu: NOTRUN -> [SKIP][140] ([i915#2065] / [i915#4854])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-2x:
- shard-dg2: NOTRUN -> [SKIP][141] ([i915#1839])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_feature_discovery@display-2x.html
- shard-dg1: NOTRUN -> [SKIP][142] ([i915#1839])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@psr1:
- shard-tglu: NOTRUN -> [SKIP][143] ([i915#658])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_feature_discovery@psr1.html
- shard-rkl: NOTRUN -> [SKIP][144] ([i915#658])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_feature_discovery@psr1.html
* igt@kms_feature_discovery@psr2:
- shard-tglu-1: NOTRUN -> [SKIP][145] ([i915#658])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-absolute-wf_vblank:
- shard-dg2: NOTRUN -> [SKIP][146] ([i915#9934]) +2 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_flip@2x-absolute-wf_vblank.html
- shard-dg1: NOTRUN -> [SKIP][147] ([i915#9934]) +2 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_flip@2x-absolute-wf_vblank.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-rkl: NOTRUN -> [SKIP][148] ([i915#9934]) +4 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-tglu: NOTRUN -> [SKIP][149] ([i915#3637] / [i915#9934]) +4 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-tglu-1: NOTRUN -> [SKIP][150] ([i915#3637] / [i915#9934]) +1 other test skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-snb: [PASS][151] -> [INCOMPLETE][152] ([i915#12314] / [i915#12745] / [i915#4839])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-snb5/igt@kms_flip@flip-vs-suspend.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-snb6/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
- shard-snb: [PASS][153] -> [INCOMPLETE][154] ([i915#12314] / [i915#4839])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-snb5/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-snb6/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
- shard-dg2: NOTRUN -> [SKIP][155] ([i915#2672] / [i915#3555])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][156] ([i915#2672])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][157] ([i915#2672] / [i915#3555]) +1 other test skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-tglu: NOTRUN -> [SKIP][158] ([i915#2587] / [i915#2672] / [i915#3555]) +1 other test skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][159] ([i915#2587] / [i915#2672]) +3 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x:
- shard-rkl: NOTRUN -> [SKIP][160] ([i915#15573]) +1 other test skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
- shard-dg1: NOTRUN -> [SKIP][161] ([i915#2672] / [i915#3555]) +1 other test skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-dg1: NOTRUN -> [SKIP][162] ([i915#2587] / [i915#2672]) +1 other test skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-tglu-1: NOTRUN -> [SKIP][163] ([i915#2672] / [i915#3555])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-tglu-1: NOTRUN -> [SKIP][164] ([i915#2587] / [i915#2672])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-rkl: NOTRUN -> [SKIP][165] ([i915#2672] / [i915#3555]) +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][166] ([i915#2672]) +1 other test skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
- shard-tglu: NOTRUN -> [SKIP][167] +36 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite:
- shard-mtlp: NOTRUN -> [SKIP][168] ([i915#1825]) +3 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][169] ([i915#15574])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][170] ([i915#15574])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][171] ([i915#8708]) +3 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
- shard-dg1: NOTRUN -> [SKIP][172] ([i915#8708]) +2 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt:
- shard-rkl: NOTRUN -> [SKIP][173] ([i915#15102]) +2 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-dg1: NOTRUN -> [SKIP][174] ([i915#15102] / [i915#3458]) +1 other test skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-pwrite:
- shard-dg1: NOTRUN -> [SKIP][175] +10 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff:
- shard-tglu-1: NOTRUN -> [SKIP][176] +24 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][177] ([i915#1825]) +17 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][178] ([i915#15104])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
- shard-dg2: NOTRUN -> [SKIP][179] ([i915#15104])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
- shard-dg2: NOTRUN -> [SKIP][180] ([i915#15102] / [i915#3458]) +3 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
- shard-rkl: NOTRUN -> [SKIP][181] ([i915#15102] / [i915#3023]) +13 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- shard-tglu: NOTRUN -> [SKIP][182] ([i915#15102]) +21 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][183] ([i915#5354]) +7 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][184] ([i915#15574])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][185] ([i915#15574])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-pwrite.html
- shard-tglu-1: NOTRUN -> [SKIP][186] ([i915#15574]) +2 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
- shard-tglu-1: NOTRUN -> [SKIP][187] ([i915#15102]) +9 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html
* igt@kms_hdr@brightness-with-hdr:
- shard-dg2: NOTRUN -> [SKIP][188] ([i915#12713])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_hdr@brightness-with-hdr.html
- shard-dg1: NOTRUN -> [SKIP][189] ([i915#12713])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-tglu-1: NOTRUN -> [SKIP][190] ([i915#3555] / [i915#8228])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_hdr@static-toggle:
- shard-tglu: NOTRUN -> [SKIP][191] ([i915#3555] / [i915#8228]) +1 other test skip
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][192] ([i915#15459])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-tglu: NOTRUN -> [SKIP][193] ([i915#15458])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-dg2: NOTRUN -> [SKIP][194] ([i915#15458])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_joiner@invalid-modeset-ultra-joiner.html
- shard-dg1: NOTRUN -> [SKIP][195] ([i915#15458])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-rkl: NOTRUN -> [SKIP][196] ([i915#13522])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- shard-glk: NOTRUN -> [INCOMPLETE][197] ([i915#12756] / [i915#13409] / [i915#13476])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk6/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2:
- shard-glk: NOTRUN -> [INCOMPLETE][198] ([i915#13409] / [i915#13476])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk6/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-tglu: NOTRUN -> [SKIP][199] ([i915#14712])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
- shard-rkl: NOTRUN -> [SKIP][200] ([i915#14712])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier:
- shard-glk10: NOTRUN -> [SKIP][201] +234 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier.html
- shard-rkl: NOTRUN -> [SKIP][202] ([i915#15608] / [i915#8825]) +1 other test skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier@pipe-a-plane-3:
- shard-rkl: NOTRUN -> [SKIP][203] ([i915#15608]) +4 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier@pipe-a-plane-3.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping@pipe-a-plane-7:
- shard-tglu: NOTRUN -> [SKIP][204] ([i915#15609]) +3 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping@pipe-a-plane-7.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-b-plane-5:
- shard-tglu-1: NOTRUN -> [SKIP][205] ([i915#15608]) +8 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-b-plane-7:
- shard-tglu-1: NOTRUN -> [SKIP][206] ([i915#15608] / [i915#8825]) +1 other test skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-b-plane-7.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier:
- shard-tglu: NOTRUN -> [SKIP][207] ([i915#15608] / [i915#8825]) +5 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier@pipe-a-plane-3:
- shard-tglu: NOTRUN -> [SKIP][208] ([i915#15608]) +32 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier@pipe-a-plane-3.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping:
- shard-snb: NOTRUN -> [SKIP][209] +58 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-snb4/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping:
- shard-dg2: NOTRUN -> [SKIP][210] ([i915#15608] / [i915#15609] / [i915#8825])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-a-plane-3:
- shard-dg2: NOTRUN -> [SKIP][211] ([i915#15608]) +3 other tests skip
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-a-plane-3.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-a-plane-5:
- shard-dg2: NOTRUN -> [SKIP][212] ([i915#15609])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-a-plane-5.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-b-plane-5:
- shard-dg2: NOTRUN -> [SKIP][213] ([i915#15609] / [i915#8825])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-b-plane-5.html
- shard-rkl: NOTRUN -> [SKIP][214] ([i915#15609]) +5 other tests skip
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-b-plane-7:
- shard-dg1: NOTRUN -> [SKIP][215] ([i915#15609]) +1 other test skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier-source-clamping@pipe-b-plane-7.html
* igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
- shard-tglu: NOTRUN -> [SKIP][216] ([i915#15608] / [i915#15609] / [i915#8825]) +1 other test skip
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html
* igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-b-plane-7:
- shard-tglu: NOTRUN -> [SKIP][217] ([i915#15609] / [i915#8825]) +1 other test skip
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-b-plane-7.html
* igt@kms_plane@plane-panning-bottom-right-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][218] ([i915#13026]) +1 other test incomplete
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk8/igt@kms_plane@plane-panning-bottom-right-suspend.html
* igt@kms_plane_alpha_blend@alpha-basic:
- shard-glk10: NOTRUN -> [FAIL][219] ([i915#12178])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_plane_alpha_blend@alpha-basic.html
* igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1:
- shard-glk10: NOTRUN -> [FAIL][220] ([i915#7862]) +1 other test fail
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1.html
* igt@kms_plane_alpha_blend@alpha-transparent-fb:
- shard-glk10: NOTRUN -> [FAIL][221] ([i915#10647] / [i915#12177])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
- shard-glk10: NOTRUN -> [FAIL][222] ([i915#10647]) +1 other test fail
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
- shard-tglu: NOTRUN -> [SKIP][223] ([i915#15329] / [i915#3555])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b:
- shard-tglu: NOTRUN -> [SKIP][224] ([i915#15329]) +3 other tests skip
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-tglu: NOTRUN -> [SKIP][225] ([i915#12343])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][226] ([i915#9812])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-mtlp: NOTRUN -> [SKIP][227] ([i915#9292])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-rkl: NOTRUN -> [SKIP][228] ([i915#8430])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_pm_lpsp@screens-disabled.html
- shard-tglu: NOTRUN -> [SKIP][229] ([i915#8430])
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-dg2: [PASS][230] -> [SKIP][231] ([i915#15073])
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-1/igt@kms_pm_rpm@dpms-non-lpsp.html
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-4/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-rkl: [PASS][232] -> [SKIP][233] ([i915#15073]) +1 other test skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-rkl: NOTRUN -> [SKIP][234] ([i915#15073])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
- shard-dg1: [PASS][235] -> [SKIP][236] ([i915#15073])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg1-18/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-14/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
- shard-tglu: NOTRUN -> [SKIP][237] ([i915#15073])
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_prime@d3hot:
- shard-mtlp: NOTRUN -> [SKIP][238] ([i915#6524])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_prime@d3hot.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-snb: NOTRUN -> [SKIP][239] ([i915#11520])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-snb4/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][240] ([i915#11520]) +8 other tests skip
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk1/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
- shard-glk10: NOTRUN -> [SKIP][241] ([i915#11520]) +5 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area:
- shard-tglu-1: NOTRUN -> [SKIP][242] ([i915#11520]) +2 other tests skip
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-mtlp: NOTRUN -> [SKIP][243] ([i915#12316])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
- shard-rkl: NOTRUN -> [SKIP][244] ([i915#11520]) +3 other tests skip
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-tglu: NOTRUN -> [SKIP][245] ([i915#11520]) +4 other tests skip
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-dg2: NOTRUN -> [SKIP][246] ([i915#11520]) +3 other tests skip
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
- shard-dg1: NOTRUN -> [SKIP][247] ([i915#11520]) +2 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-tglu-1: NOTRUN -> [SKIP][248] ([i915#9683]) +1 other test skip
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-pr-sprite-plane-onoff:
- shard-rkl: NOTRUN -> [SKIP][249] ([i915#1072] / [i915#9732]) +9 other tests skip
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_psr@fbc-pr-sprite-plane-onoff.html
* igt@kms_psr@fbc-pr-sprite-render:
- shard-tglu-1: NOTRUN -> [SKIP][250] ([i915#9732]) +8 other tests skip
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@kms_psr@fbc-pr-sprite-render.html
* igt@kms_psr@fbc-psr-primary-blt:
- shard-rkl: NOTRUN -> [SKIP][251] ([i915#1072] / [i915#14544] / [i915#9732])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_psr@fbc-psr-primary-blt.html
* igt@kms_psr@fbc-psr-sprite-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][252] ([i915#1072] / [i915#9732]) +3 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_psr@fbc-psr-sprite-mmap-gtt.html
* igt@kms_psr@fbc-psr-suspend@edp-1:
- shard-mtlp: NOTRUN -> [SKIP][253] ([i915#9688]) +2 other tests skip
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_psr@fbc-psr-suspend@edp-1.html
* igt@kms_psr@pr-sprite-mmap-cpu:
- shard-tglu: NOTRUN -> [SKIP][254] ([i915#9732]) +15 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_psr@pr-sprite-mmap-cpu.html
* igt@kms_psr@psr2-sprite-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][255] ([i915#1072] / [i915#9732]) +3 other tests skip
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_psr@psr2-sprite-mmap-cpu.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-dg1: [PASS][256] -> [DMESG-WARN][257] ([i915#4423]) +3 other tests dmesg-warn
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg1-17/igt@kms_rotation_crc@bad-pixel-format.html
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-16/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-rkl: NOTRUN -> [SKIP][258] ([i915#5289])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-dg1: NOTRUN -> [SKIP][259] ([i915#5289])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
- shard-dg2: NOTRUN -> [SKIP][260] ([i915#5190])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-dg1: NOTRUN -> [SKIP][261] ([i915#3555])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-tglu: NOTRUN -> [SKIP][262] ([i915#3555]) +1 other test skip
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_scaling_modes@scaling-mode-full-aspect.html
- shard-rkl: NOTRUN -> [SKIP][263] ([i915#3555])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_selftest@drm_framebuffer:
- shard-glk10: NOTRUN -> [ABORT][264] ([i915#13179]) +1 other test abort
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_selftest@drm_framebuffer.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-glk10: NOTRUN -> [FAIL][265] ([i915#10959])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk10/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-tglu: NOTRUN -> [SKIP][266] ([i915#8623])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@flip-basic-fastset:
- shard-dg2: NOTRUN -> [SKIP][267] ([i915#9906])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@kms_vrr@flip-basic-fastset.html
- shard-dg1: NOTRUN -> [SKIP][268] ([i915#9906])
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@flip-suspend:
- shard-rkl: NOTRUN -> [SKIP][269] ([i915#15243] / [i915#3555])
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_vrr@flip-suspend.html
* igt@kms_vrr@flipline:
- shard-mtlp: NOTRUN -> [SKIP][270] ([i915#3555] / [i915#8808])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@kms_vrr@flipline.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-tglu: NOTRUN -> [SKIP][271] ([i915#9906])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-rkl: NOTRUN -> [SKIP][272] ([i915#2433])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@busy-double-start@rcs0:
- shard-mtlp: [PASS][273] -> [FAIL][274] ([i915#4349])
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-mtlp-5/igt@perf_pmu@busy-double-start@rcs0.html
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-6/igt@perf_pmu@busy-double-start@rcs0.html
* igt@prime_vgem@fence-flip-hang:
- shard-mtlp: NOTRUN -> [SKIP][275] ([i915#3708])
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@prime_vgem@fence-flip-hang.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-dg2: NOTRUN -> [SKIP][276] ([i915#9917])
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-6/igt@sriov_basic@enable-vfs-autoprobe-off.html
- shard-dg1: NOTRUN -> [SKIP][277] ([i915#9917])
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-18/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-7:
- shard-tglu-1: NOTRUN -> [FAIL][278] ([i915#12910]) +9 other tests fail
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-1/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-7.html
* igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
- shard-tglu: NOTRUN -> [FAIL][279] ([i915#12910])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-7/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
#### Possible fixes ####
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
- shard-dg2: [INCOMPLETE][280] ([i915#13356]) -> [PASS][281]
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-4/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
* igt@gem_mmap_offset@clear-via-pagefault:
- shard-mtlp: [ABORT][282] ([i915#14809]) -> [PASS][283] +1 other test pass
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-mtlp-4/igt@gem_mmap_offset@clear-via-pagefault.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-3/igt@gem_mmap_offset@clear-via-pagefault.html
* igt@gem_workarounds@suspend-resume-context:
- shard-rkl: [INCOMPLETE][284] ([i915#13356]) -> [PASS][285]
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@gem_workarounds@suspend-resume-context.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_pm_rpm@system-suspend:
- shard-rkl: [ABORT][286] ([i915#15060]) -> [PASS][287]
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-1/igt@i915_pm_rpm@system-suspend.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@i915_pm_rpm@system-suspend.html
* igt@i915_suspend@debugfs-reader:
- shard-glk: [INCOMPLETE][288] ([i915#4817]) -> [PASS][289]
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-glk8/igt@i915_suspend@debugfs-reader.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk6/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@forcewake:
- shard-rkl: [INCOMPLETE][290] ([i915#4817]) -> [PASS][291]
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@i915_suspend@forcewake.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@i915_suspend@forcewake.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-dg2: [FAIL][292] ([i915#5956]) -> [PASS][293] +2 other tests pass
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-mtlp: [FAIL][294] ([i915#5138]) -> [PASS][295]
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-rkl: [INCOMPLETE][296] ([i915#9878]) -> [PASS][297]
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_fbcon_fbt@fbc-suspend.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite:
- shard-dg2: [FAIL][298] ([i915#15389] / [i915#6880]) -> [PASS][299]
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-rkl: [SKIP][300] ([i915#3555] / [i915#8228]) -> [PASS][301]
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_hdr@bpc-switch-dpms.html
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@static-toggle-suspend:
- shard-dg2: [SKIP][302] ([i915#3555] / [i915#8228]) -> [PASS][303]
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-6/igt@kms_hdr@static-toggle-suspend.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-11/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-dg2: [SKIP][304] ([i915#15459]) -> [PASS][305]
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-11/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_pm_dc@dc5-psr:
- shard-mtlp: [FAIL][306] -> [PASS][307]
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-mtlp-5/igt@kms_pm_dc@dc5-psr.html
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-mtlp-6/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-dg2: [SKIP][308] ([i915#15073]) -> [PASS][309]
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-1/igt@kms_pm_rpm@modeset-lpsp.html
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-rkl: [SKIP][310] ([i915#15073]) -> [PASS][311] +1 other test pass
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-5/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@system-suspend-idle:
- shard-dg2: [INCOMPLETE][312] ([i915#14419]) -> [PASS][313]
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-3/igt@kms_pm_rpm@system-suspend-idle.html
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@kms_pm_rpm@system-suspend-idle.html
#### Warnings ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-rkl: [SKIP][314] ([i915#14544] / [i915#8411]) -> [SKIP][315] ([i915#8411])
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@api_intel_bb@blit-reloc-purge-cache.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@gem_ccs@block-copy-compressed:
- shard-rkl: [SKIP][316] ([i915#14544] / [i915#3555] / [i915#9323]) -> [SKIP][317] ([i915#3555] / [i915#9323])
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gem_ccs@block-copy-compressed.html
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@gem_ccs@block-copy-compressed.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-rkl: [SKIP][318] ([i915#14544] / [i915#9323]) -> [SKIP][319] ([i915#9323])
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-rkl: [SKIP][320] ([i915#14544] / [i915#4525]) -> [SKIP][321] ([i915#4525])
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gem_exec_balancer@parallel-keep-in-fence.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-rkl: [SKIP][322] ([i915#4525]) -> [SKIP][323] ([i915#14544] / [i915#4525])
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@gem_exec_balancer@parallel-keep-submit-fence.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-rkl: [SKIP][324] ([i915#6334]) -> [SKIP][325] ([i915#14544] / [i915#6334]) +1 other test skip
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@gem_exec_capture@capture-invisible@smem0.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_reloc@basic-wc:
- shard-rkl: [SKIP][326] ([i915#3281]) -> [SKIP][327] ([i915#14544] / [i915#3281]) +4 other tests skip
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@gem_exec_reloc@basic-wc.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gem_exec_reloc@basic-wc.html
* igt@gem_exec_reloc@basic-write-wc-noreloc:
- shard-rkl: [SKIP][328] ([i915#14544] / [i915#3281]) -> [SKIP][329] ([i915#3281]) +6 other tests skip
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gem_exec_reloc@basic-write-wc-noreloc.html
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@gem_exec_reloc@basic-write-wc-noreloc.html
* igt@gem_lmem_swapping@parallel-random:
- shard-rkl: [SKIP][330] ([i915#14544] / [i915#4613]) -> [SKIP][331] ([i915#4613]) +1 other test skip
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gem_lmem_swapping@parallel-random.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_lmem_swapping@random:
- shard-rkl: [SKIP][332] ([i915#4613]) -> [SKIP][333] ([i915#14544] / [i915#4613])
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@gem_lmem_swapping@random.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gem_lmem_swapping@random.html
* igt@gem_partial_pwrite_pread@reads-uncached:
- shard-rkl: [SKIP][334] ([i915#3282]) -> [SKIP][335] ([i915#14544] / [i915#3282]) +2 other tests skip
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@gem_partial_pwrite_pread@reads-uncached.html
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gem_partial_pwrite_pread@reads-uncached.html
* igt@gem_tiled_partial_pwrite_pread@reads:
- shard-rkl: [SKIP][336] ([i915#14544] / [i915#3282]) -> [SKIP][337] ([i915#3282]) +1 other test skip
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gem_tiled_partial_pwrite_pread@reads.html
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@gem_tiled_partial_pwrite_pread@reads.html
* igt@gem_userptr_blits@coherency-sync:
- shard-rkl: [SKIP][338] ([i915#3297]) -> [SKIP][339] ([i915#14544] / [i915#3297])
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@gem_userptr_blits@coherency-sync.html
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gem_userptr_blits@coherency-sync.html
* igt@gem_userptr_blits@unsync-overlap:
- shard-rkl: [SKIP][340] ([i915#14544] / [i915#3297]) -> [SKIP][341] ([i915#3297])
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gem_userptr_blits@unsync-overlap.html
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@gem_userptr_blits@unsync-overlap.html
* igt@gen9_exec_parse@batch-without-end:
- shard-rkl: [SKIP][342] ([i915#14544] / [i915#2527]) -> [SKIP][343] ([i915#2527])
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@gen9_exec_parse@batch-without-end.html
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@gen9_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@unaligned-access:
- shard-rkl: [SKIP][344] ([i915#2527]) -> [SKIP][345] ([i915#14544] / [i915#2527]) +2 other tests skip
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@gen9_exec_parse@unaligned-access.html
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@gen9_exec_parse@unaligned-access.html
* igt@intel_hwmon@hwmon-read:
- shard-rkl: [SKIP][346] ([i915#7707]) -> [SKIP][347] ([i915#14544] / [i915#7707])
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@intel_hwmon@hwmon-read.html
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@intel_hwmon@hwmon-read.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-rkl: [SKIP][348] ([i915#12454] / [i915#12712] / [i915#14544]) -> [SKIP][349] ([i915#12454] / [i915#12712])
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-90:
- shard-rkl: [SKIP][350] ([i915#14544] / [i915#5286]) -> [SKIP][351] ([i915#5286]) +2 other tests skip
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-180:
- shard-rkl: [SKIP][352] ([i915#5286]) -> [SKIP][353] ([i915#14544] / [i915#5286])
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-rkl: [SKIP][354] ([i915#14544] / [i915#3638]) -> [SKIP][355] ([i915#3638])
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-270.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-rkl: [SKIP][356] ([i915#3638]) -> [SKIP][357] ([i915#14544] / [i915#3638]) +2 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_big_fb@linear-8bpp-rotate-270.html
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs:
- shard-rkl: [SKIP][358] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][359] ([i915#14098] / [i915#6095]) +7 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-rkl: [SKIP][360] ([i915#12313] / [i915#14544]) -> [SKIP][361] ([i915#12313])
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-c-hdmi-a-2:
- shard-rkl: [SKIP][362] ([i915#14098] / [i915#6095]) -> [SKIP][363] ([i915#14098] / [i915#14544] / [i915#6095]) +17 other tests skip
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-c-hdmi-a-2.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][364] ([i915#14544] / [i915#6095]) -> [SKIP][365] ([i915#6095]) +7 other tests skip
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2:
- shard-rkl: [SKIP][366] ([i915#6095]) -> [SKIP][367] ([i915#14544] / [i915#6095]) +17 other tests skip
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg1: [SKIP][368] ([i915#6095]) -> [SKIP][369] ([i915#4423] / [i915#6095])
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg1-19/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-12/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-rkl: [SKIP][370] ([i915#14544]) -> [SKIP][371] +10 other tests skip
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_chamelium_color@ctm-green-to-red.html
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
- shard-rkl: [SKIP][372] ([i915#11151] / [i915#7828]) -> [SKIP][373] ([i915#11151] / [i915#14544] / [i915#7828]) +3 other tests skip
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
* igt@kms_chamelium_frames@hdmi-frame-dump:
- shard-rkl: [SKIP][374] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][375] ([i915#11151] / [i915#7828]) +3 other tests skip
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_chamelium_frames@hdmi-frame-dump.html
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_chamelium_frames@hdmi-frame-dump.html
* igt@kms_content_protection@dp-mst-type-0-suspend-resume:
- shard-rkl: [SKIP][376] ([i915#14544] / [i915#15330]) -> [SKIP][377] ([i915#15330])
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
* igt@kms_content_protection@lic-type-1:
- shard-rkl: [SKIP][378] ([i915#6944] / [i915#9424]) -> [SKIP][379] ([i915#14544] / [i915#6944] / [i915#9424])
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_content_protection@lic-type-1.html
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_content_protection@lic-type-1.html
* igt@kms_content_protection@mei-interface:
- shard-dg1: [SKIP][380] ([i915#6944] / [i915#9424]) -> [SKIP][381] ([i915#9433])
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg1-14/igt@kms_content_protection@mei-interface.html
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-13/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@type1:
- shard-rkl: [SKIP][382] ([i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][383] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424])
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_content_protection@type1.html
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-rkl: [SKIP][384] ([i915#3555]) -> [SKIP][385] ([i915#14544] / [i915#3555]) +2 other tests skip
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-32x32.html
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-rkl: [SKIP][386] ([i915#14544] / [i915#3555]) -> [SKIP][387] ([i915#3555]) +2 other tests skip
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-rkl: [SKIP][388] ([i915#13049]) -> [SKIP][389] ([i915#13049] / [i915#14544])
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-512x512.html
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
- shard-rkl: [SKIP][390] -> [SKIP][391] ([i915#14544]) +5 other tests skip
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-rkl: [SKIP][392] ([i915#14544] / [i915#9723]) -> [SKIP][393] ([i915#9723])
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-rkl: [SKIP][394] ([i915#14544] / [i915#3555] / [i915#3804]) -> [SKIP][395] ([i915#3555] / [i915#3804])
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_feature_discovery@display-2x:
- shard-rkl: [SKIP][396] ([i915#14544] / [i915#1839]) -> [SKIP][397] ([i915#1839])
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_feature_discovery@display-2x.html
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: [INCOMPLETE][398] ([i915#12314] / [i915#12745] / [i915#4839] / [i915#6113]) -> [INCOMPLETE][399] ([i915#12745] / [i915#4839] / [i915#6113])
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-glk5/igt@kms_flip@2x-flip-vs-suspend.html
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk1/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2:
- shard-glk: [INCOMPLETE][400] ([i915#12314] / [i915#4839] / [i915#6113]) -> [INCOMPLETE][401] ([i915#4839] / [i915#6113])
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-glk5/igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2.html
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-glk1/igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-nonexisting-fb-interruptible:
- shard-rkl: [SKIP][402] ([i915#9934]) -> [SKIP][403] ([i915#14544] / [i915#9934]) +1 other test skip
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_flip@2x-nonexisting-fb-interruptible.html
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_flip@2x-nonexisting-fb-interruptible.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-rkl: [SKIP][404] ([i915#14544] / [i915#9934]) -> [SKIP][405] ([i915#9934]) +7 other tests skip
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_flip@2x-plain-flip-interruptible.html
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-rkl: [SKIP][406] ([i915#2672] / [i915#3555]) -> [SKIP][407] ([i915#14544] / [i915#2672] / [i915#3555])
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode:
- shard-rkl: [SKIP][408] ([i915#2672]) -> [SKIP][409] ([i915#14544] / [i915#2672])
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-rkl: [SKIP][410] ([i915#14544] / [i915#2672] / [i915#3555]) -> [SKIP][411] ([i915#2672] / [i915#3555]) +2 other tests skip
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-rkl: [SKIP][412] ([i915#14544] / [i915#2672]) -> [SKIP][413] ([i915#2672]) +2 other tests skip
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt:
- shard-rkl: [SKIP][414] ([i915#15574]) -> [SKIP][415] ([i915#14544] / [i915#15574])
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt.html
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][416] ([i915#15102]) -> [SKIP][417] ([i915#14544] / [i915#15102]) +1 other test skip
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-rkl: [SKIP][418] ([i915#14544] / [i915#15102]) -> [SKIP][419] ([i915#15102]) +1 other test skip
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-dg1: [SKIP][420] ([i915#4423] / [i915#8708]) -> [SKIP][421] ([i915#8708])
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-dg2: [SKIP][422] ([i915#15102] / [i915#3458]) -> [SKIP][423] ([i915#10433] / [i915#15102] / [i915#3458]) +1 other test skip
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-rkl: [SKIP][424] ([i915#14544] / [i915#1825]) -> [SKIP][425] ([i915#1825]) +18 other tests skip
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-dg2: [SKIP][426] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][427] ([i915#15102] / [i915#3458]) +1 other test skip
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-rkl: [SKIP][428] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][429] ([i915#15102] / [i915#3023]) +6 other tests skip
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render:
- shard-rkl: [SKIP][430] ([i915#1825]) -> [SKIP][431] ([i915#14544] / [i915#1825]) +16 other tests skip
[430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render.html
[431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-cpu:
- shard-rkl: [SKIP][432] ([i915#14544] / [i915#15574]) -> [SKIP][433] ([i915#15574]) +1 other test skip
[432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-cpu.html
[433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite:
- shard-dg1: [SKIP][434] ([i915#15102] / [i915#3458]) -> [SKIP][435] ([i915#15102] / [i915#3458] / [i915#4423])
[434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
[435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-render:
- shard-rkl: [SKIP][436] ([i915#15102] / [i915#3023]) -> [SKIP][437] ([i915#14544] / [i915#15102] / [i915#3023]) +5 other tests skip
[436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
[437]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
* igt@kms_hdr@brightness-with-hdr:
- shard-rkl: [SKIP][438] ([i915#13331] / [i915#14544]) -> [SKIP][439] ([i915#12713])
[438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_hdr@brightness-with-hdr.html
[439]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@invalid-hdr:
- shard-rkl: [SKIP][440] ([i915#3555] / [i915#8228]) -> [SKIP][441] ([i915#14544] / [i915#3555] / [i915#8228])
[440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_hdr@invalid-hdr.html
[441]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-rkl: [SKIP][442] ([i915#14544] / [i915#15458]) -> [SKIP][443] ([i915#15458])
[442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_joiner@invalid-modeset-ultra-joiner.html
[443]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][444] ([i915#14544] / [i915#1839] / [i915#4816]) -> [SKIP][445] ([i915#1839] / [i915#4816])
[444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[445]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-a-plane-0:
- shard-rkl: [SKIP][446] ([i915#14544] / [i915#15608]) -> [SKIP][447] ([i915#15608]) +1 other test skip
[446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-a-plane-0.html
[447]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-a-plane-0.html
* igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-a-plane-0:
- shard-rkl: [SKIP][448] ([i915#15608]) -> [SKIP][449] ([i915#14544] / [i915#15608]) +2 other tests skip
[448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-a-plane-0.html
[449]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-a-plane-0.html
* igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
- shard-rkl: [SKIP][450] ([i915#15608] / [i915#15609] / [i915#8825]) -> [SKIP][451] ([i915#14544] / [i915#15608] / [i915#15609] / [i915#8825]) +2 other tests skip
[450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
[451]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
- shard-rkl: [SKIP][452] ([i915#14544] / [i915#15608] / [i915#8825]) -> [SKIP][453] ([i915#15608] / [i915#8825]) +3 other tests skip
[452]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
[453]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping@pipe-b-plane-5:
- shard-rkl: [SKIP][454] ([i915#15609] / [i915#8825]) -> [SKIP][455] ([i915#14544] / [i915#15609] / [i915#8825]) +2 other tests skip
[454]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping@pipe-b-plane-5.html
[455]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping@pipe-b-plane-5.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-rkl: [SKIP][456] ([i915#14544] / [i915#3828]) -> [SKIP][457] ([i915#3828])
[456]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_pm_dc@dc5-retention-flops.html
[457]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-4/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@dc6-dpms:
- shard-tglu: [SKIP][458] ([i915#15128]) -> [FAIL][459] ([i915#9295])
[458]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-tglu-6/igt@kms_pm_dc@dc6-dpms.html
[459]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-tglu-9/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: [SKIP][460] ([i915#14544] / [i915#4281]) -> [SKIP][461] ([i915#4281])
[460]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_pm_dc@dc9-dpms.html
[461]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-8/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
- shard-rkl: [SKIP][462] ([i915#11520]) -> [SKIP][463] ([i915#11520] / [i915#14544]) +3 other tests skip
[462]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
[463]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-rkl: [SKIP][464] ([i915#11520] / [i915#14544]) -> [SKIP][465] ([i915#11520]) +3 other tests skip
[464]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
[465]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-rkl: [SKIP][466] ([i915#9683]) -> [SKIP][467] ([i915#14544] / [i915#9683])
[466]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_psr2_su@frontbuffer-xrgb8888.html
[467]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@pr-cursor-mmap-cpu:
- shard-rkl: [SKIP][468] ([i915#1072] / [i915#9732]) -> [SKIP][469] ([i915#1072] / [i915#14544] / [i915#9732]) +9 other tests skip
[468]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-4/igt@kms_psr@pr-cursor-mmap-cpu.html
[469]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_psr@pr-cursor-mmap-cpu.html
* igt@kms_psr@psr2-sprite-blt:
- shard-dg1: [SKIP][470] ([i915#1072] / [i915#9732]) -> [SKIP][471] ([i915#1072] / [i915#4423] / [i915#9732])
[470]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-dg1-17/igt@kms_psr@psr2-sprite-blt.html
[471]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-dg1-16/igt@kms_psr@psr2-sprite-blt.html
* igt@kms_psr@psr2-sprite-mmap-cpu:
- shard-rkl: [SKIP][472] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][473] ([i915#1072] / [i915#9732]) +10 other tests skip
[472]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_psr@psr2-sprite-mmap-cpu.html
[473]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_psr@psr2-sprite-mmap-cpu.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-rkl: [SKIP][474] ([i915#9685]) -> [SKIP][475] ([i915#14544] / [i915#9685])
[474]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[475]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-rkl: [SKIP][476] ([i915#14544] / [i915#5289]) -> [SKIP][477] ([i915#5289])
[476]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
[477]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_vrr@flip-basic-fastset:
- shard-rkl: [SKIP][478] ([i915#14544] / [i915#9906]) -> [SKIP][479] ([i915#9906]) +1 other test skip
[478]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@kms_vrr@flip-basic-fastset.html
[479]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@max-min:
- shard-rkl: [SKIP][480] ([i915#9906]) -> [SKIP][481] ([i915#14544] / [i915#9906])
[480]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@kms_vrr@max-min.html
[481]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@kms_vrr@max-min.html
* igt@perf_pmu@rc6-all-gts:
- shard-rkl: [SKIP][482] ([i915#8516]) -> [SKIP][483] ([i915#14544] / [i915#8516])
[482]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-3/igt@perf_pmu@rc6-all-gts.html
[483]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-6/igt@perf_pmu@rc6-all-gts.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-rkl: [SKIP][484] ([i915#14544] / [i915#9917]) -> [SKIP][485] ([i915#9917])
[484]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17893/shard-rkl-6/igt@sriov_basic@enable-vfs-autoprobe-off.html
[485]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/shard-rkl-7/igt@sriov_basic@enable-vfs-autoprobe-off.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
[i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#12177]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12177
[i915#12178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12178
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
[i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
[i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
[i915#13029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
[i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
[i915#13409]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13409
[i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
[i915#13522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13522
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
[i915#13809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13809
[i915#13820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13820
[i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14545]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14545
[i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#14809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14809
[i915#15060]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15060
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15095
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
[i915#15128]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15128
[i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
[i915#15176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15176
[i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15389]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15389
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
[i915#15573]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15573
[i915#15574]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15574
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
[i915#15609]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15609
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2065
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
[i915#4873]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4873
[i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
[i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8437
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
[i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
[i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
[i915#8898]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8898
[i915#9292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9292
[i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
[i915#9979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9979
Build changes
-------------
* Linux: CI_DRM_17893 -> Patchwork_160255v3
CI-20190529: 20190529
CI_DRM_17893: 786060d864f2e568a6ff216c63b927f80da2c043 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8719: 399f1e1cd9d38f0d0ab2c55a9ade415cc8248959 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_160255v3: 786060d864f2e568a6ff216c63b927f80da2c043 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_160255v3/index.html
[-- Attachment #2: Type: text/html, Size: 173236 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd
2026-01-27 12:18 ` Ville Syrjälä
@ 2026-01-28 6:06 ` Shankar, Uma
2026-01-28 7:38 ` Govindapillai, Vinod
1 sibling, 0 replies; 7+ messages in thread
From: Shankar, Uma @ 2026-01-28 6:06 UTC (permalink / raw)
To: Ville Syrjälä, Govindapillai, Vinod
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Heikkila, Juha-pekka
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Tuesday, January 27, 2026 5:48 PM
> To: Govindapillai, Vinod <vinod.govindapillai@intel.com>
> Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Shankar, Uma
> <uma.shankar@intel.com>; Heikkila, Juha-pekka <juha-
> pekka.heikkila@intel.com>
> Subject: Re: [PATCH v3] drm/i915/display: fix the pixel normalization handling for
> xe3p_lpd
>
> On Tue, Jan 27, 2026 at 01:13:45PM +0200, Vinod Govindapillai wrote:
> > Pixel normalizer is enabled with normalization factor as 1.0 for
> > FP16 formats in order to support FBC for those formats in xe3p_lpd.
> > Previously pixel normalizer gets disabled during the plane disable
> > routine. But there could be plane format settings without explicitly
> > calling the plane disable in-between and we could endup keeping the
> > pixel normalizer enabled for formats which we don't require that.
> > This is causing crc mismatches in yuv formats and FIFO underruns in
> > planar formats like NV12.
> >
> > Fix this by updating the pixel normalizer configuration based on the
> > pixel formats explicitly during the plane settings arm calls itself
> > - enable it for FP16 and disable it for other formats in HDR capable
> > planes. To avoid redundancies in these updates, normalization factor
> > between old and new plane states are compared before the update. The
> > function to check validity of the fp16 formats for fbc is now updated
> > to return the normalization factor as 1.0 in case of fp16 formats and
> > 0 in other cases.
>
> This looks incredibly complex for just writing a single register.
> I think it should be just somehting like:
>
> static u32 pixel_normalizer_val()
> {
> if (!need_pixel_normalizer())
> return 0;
>
> return ENABLE | FACTOR;
> }
>
> plane_update(..)
> {
> ...
> if (HAS_PIXEL_NORMALIZER())
> write(PIXEL_NOFMRALIZER, pixel_normalizer_val())
> ...
> }
>
> plane_disable()
> {
> ...
> // do we even need to disable it for disabled planes?
> if (HAS_PIXEL_NORMALIZER())
> write(PIXEL_NORMALIZER, 0);
> ...
> }
I think we should enable pixel normalizer only when FP16 is being enabled and disable it
in case frame buffer format is switched from FP16 to any other format.
The "need_pixel_normalizer" should check that, in patch this is done by "check_pixel_normalizer".
I am not sure if disable case whether we need to explicitly disable it, but good to have it.
Regards,
Uma Shankar
> >
> > v2: avoid redundant pixel normalization setting updates
> >
> > v3: moved the normalization factor definition to intel_fbc.c and some
> > updates to comments
> >
> > Fixes: 5298eea7ed20 ("drm/i915/xe3p_lpd: use pixel normalizer for fp16
> > formats for FBC")
> > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> > ---
> > .../drm/i915/display/intel_display_device.h | 1 +
> > .../drm/i915/display/intel_display_types.h | 8 ++
> > drivers/gpu/drm/i915/display/intel_fbc.c | 19 ++++-
> > drivers/gpu/drm/i915/display/intel_fbc.h | 4 +-
> > .../drm/i915/display/skl_universal_plane.c | 82 +++++++++++++++----
> > .../i915/display/skl_universal_plane_regs.h | 1 -
> > 6 files changed, 92 insertions(+), 23 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> > b/drivers/gpu/drm/i915/display/intel_display_device.h
> > index 6c74d6b0cc48..126aa1eeeb6d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> > @@ -175,6 +175,7 @@ struct intel_display_platforms {
> > #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >= 12
> && HAS_DSC(__display))
> > #define HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)-
> >fbc_mask != 0)
> > #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >= 30)
> > +#define HAS_FBC_FP16_FORMATS(__display)
> (DISPLAY_VER(__display) >= 35)
> > #define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35
> && !(__display)->platform.dgfx)
> > #define HAS_FPGA_DBG_UNCLAIMED(__display)
> (DISPLAY_INFO(__display)->has_fpga_dbg)
> > #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >= 3)
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index e6298279dc89..92bce232b2c5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -686,6 +686,14 @@ struct intel_plane_state {
> > unsigned long flags;
> > #define PLANE_HAS_FENCE BIT(0)
> >
> > + /* xe3p_lpd+ */
> > + struct {
> > + /* In half-precision floating-point format. 0x3c00 (1.0) for fp16
> formats */
> > + unsigned int factor;
> > + /* update is needed if factor differs between old and new plane
> states */
> > + bool needs_update;
> > + } pixel_normalizer;
> > +
> > struct intel_fb_view view;
> >
> > /* for legacy cursor fb unpin */
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 1f3f5237a1c2..f9474e7741c8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -71,6 +71,9 @@
> >
> > #define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
> >
> > +/* Pixel normalization factor 1.0 in half-precision floating-point format */
> > +#define NORM_FACTOR_1_0_IN_HALF_PRECISION_FP 0x3c00
> > +
> > struct intel_fbc_funcs {
> > void (*activate)(struct intel_fbc *fbc);
> > void (*deactivate)(struct intel_fbc *fbc); @@ -1215,13 +1218,21 @@
> > static bool xe3p_lpd_fbc_pixel_format_is_valid(const struct intel_plane_state *p
> > }
> > }
> >
> > -bool
> > -intel_fbc_is_enable_pixel_normalizer(const struct intel_plane_state
> > *plane_state)
> > +unsigned int
> > +intel_fbc_normalization_factor(const struct intel_plane_state
> > +*plane_state)
> > {
> > struct intel_display *display = to_intel_display(plane_state);
> >
> > - return DISPLAY_VER(display) >= 35 &&
> > - xe3p_lpd_fbc_fp16_format_is_valid(plane_state);
> > + /*
> > + * In order to have FBC for fp16 formats pixel normalizer block must be
> > + * active. For FP16 formats, use normalization factor as 1.0 and enable
> > + * the block.
> > + */
> > + if (HAS_FBC_FP16_FORMATS(display) &&
> > + xe3p_lpd_fbc_fp16_format_is_valid(plane_state))
> > + return NORM_FACTOR_1_0_IN_HALF_PRECISION_FP;
> > +
> > + return 0;
> > }
> >
> > static bool pixel_format_is_valid(const struct intel_plane_state
> > *plane_state) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h
> > b/drivers/gpu/drm/i915/display/intel_fbc.h
> > index f0255ddae2b6..b5888e98a659 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> > @@ -56,7 +56,7 @@ void intel_fbc_prepare_dirty_rect(struct
> intel_atomic_state *state,
> > struct intel_crtc *crtc);
> > void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,
> > struct intel_plane *plane); -bool
> > -intel_fbc_is_enable_pixel_normalizer(const struct intel_plane_state
> > *plane_state);
> > +unsigned int
> > +intel_fbc_normalization_factor(const struct intel_plane_state
> > +*plane_state);
> >
> > #endif /* __INTEL_FBC_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > index b3d41705448a..05c227913b8d 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > @@ -891,20 +891,49 @@ static void icl_plane_disable_sel_fetch_arm(struct
> intel_dsb *dsb,
> > intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe,
> > plane->id), 0); }
> >
> > -static void x3p_lpd_plane_update_pixel_normalizer(struct intel_dsb *dsb,
> > - struct intel_plane *plane,
> > - bool enable)
> > +static void xe3p_lpd_plane_disable_pixel_normalizer(struct intel_dsb *dsb,
> > + struct intel_plane *plane)
> > {
> > struct intel_display *display = to_intel_display(plane);
> > enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane->pipe);
> > - u32 val;
> > + const struct intel_plane_state *plane_state =
> > + to_intel_plane_state(plane->base.state);
> > +
> > + if (!HAS_FBC_FP16_FORMATS(display))
> > + return;
> > +
> > + if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> > + return;
> > +
> > + if (!plane_state->pixel_normalizer.factor)
> > + return;
> > +
> > + intel_de_write_dsb(display, dsb,
> > + PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id),
> 0); }
> > +
> > +static void xe3p_lpd_plane_update_pixel_normalizer(struct intel_dsb *dsb,
> > + struct intel_plane *plane)
> > +{
> > + struct intel_display *display = to_intel_display(plane);
> > + enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane->pipe);
> > + const struct intel_plane_state *plane_state =
> > + to_intel_plane_state(plane->base.state);
> > + u32 val = 0;
> > +
> > + if (!HAS_FBC_FP16_FORMATS(display))
> > + return;
> >
> > - /* Only HDR planes have pixel normalizer and don't matter if no FBC */
> > + /* Only HDR planes have pixel normalizer and don't matter if FBC is
> > +fused off */
> > if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> > return;
> >
> > - val = enable ?
> PLANE_PIXEL_NORMALIZE_NORM_FACTOR(PLANE_PIXEL_NORMALIZE_NO
> RM_FACTOR_1_0) |
> > - PLANE_PIXEL_NORMALIZE_ENABLE : 0;
> > + if (!plane_state->pixel_normalizer.needs_update)
> > + return;
> > +
> > + if (plane_state->pixel_normalizer.factor)
> > + val = PLANE_PIXEL_NORMALIZE_NORM_FACTOR(plane_state-
> >pixel_normalizer.factor) |
> > + PLANE_PIXEL_NORMALIZE_ENABLE;
> >
> > intel_de_write_dsb(display, dsb,
> > PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id),
> val); @@ -926,8
> > +955,7 @@ icl_plane_disable_arm(struct intel_dsb *dsb,
> >
> > icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);
> >
> > - if (DISPLAY_VER(display) >= 35)
> > - x3p_lpd_plane_update_pixel_normalizer(dsb, plane, false);
> > + xe3p_lpd_plane_disable_pixel_normalizer(dsb, plane);
> >
> > intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), 0);
> > intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0); @@
> > -1674,13 +1702,7 @@ icl_plane_update_arm(struct intel_dsb *dsb,
> >
> > intel_color_plane_commit_arm(dsb, plane_state);
> >
> > - /*
> > - * In order to have FBC for fp16 formats pixel normalizer block must be
> > - * active. Check if pixel normalizer block need to be enabled for FBC.
> > - * If needed, use normalization factor as 1.0 and enable the block.
> > - */
> > - if (intel_fbc_is_enable_pixel_normalizer(plane_state))
> > - x3p_lpd_plane_update_pixel_normalizer(dsb, plane, true);
> > + xe3p_lpd_plane_update_pixel_normalizer(dsb, plane);
> >
> > /*
> > * The control register self-arms if the plane was previously @@
> > -2350,6 +2372,32 @@ static void clip_damage(struct intel_plane_state
> *plane_state)
> > drm_rect_intersect(damage, &src);
> > }
> >
> > +static void check_pixel_normalizer(struct intel_plane_state
> > +*plane_state) {
> > + struct intel_display *display = to_intel_display(plane_state);
> > + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> > + struct intel_atomic_state *state =
> > + to_intel_atomic_state(plane_state->uapi.state);
> > + const struct intel_plane_state *old_plane_state =
> > + intel_atomic_get_old_plane_state(state, plane);
> > +
> > + if (!HAS_FBC_FP16_FORMATS(display))
> > + return;
> > +
> > + plane_state->pixel_normalizer.factor =
> > + intel_fbc_normalization_factor(plane_state);
> > +
> > + /*
> > + * In case of no old state to compare, better to force update the pixel
> > + * normalizer settings.
> > + */
> > + plane_state->pixel_normalizer.needs_update = true;
> > + if (old_plane_state && old_plane_state->hw.fb)
> > + plane_state->pixel_normalizer.needs_update =
> > + plane_state->pixel_normalizer.factor !=
> > + intel_fbc_normalization_factor(old_plane_state);
> > +}
> > +
> > static int skl_plane_check(struct intel_crtc_state *crtc_state,
> > struct intel_plane_state *plane_state) { @@ -2400,6
> +2448,8 @@
> > static int skl_plane_check(struct intel_crtc_state *crtc_state,
> >
> > check_protection(plane_state);
> >
> > + check_pixel_normalizer(plane_state);
> > +
> > /* HW only has 8 bits pixel precision, disable plane if invisible */
> > if (!(plane_state->hw.alpha >> 8)) {
> > plane_state->uapi.visible = false;
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > index 6fd4da9f63cf..651f3557b576 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > @@ -580,6 +580,5 @@
> > #define PLANE_PIXEL_NORMALIZE_ENABLE
> REG_BIT(31)
> > #define PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK
> REG_GENMASK(15, 0)
> > #define PLANE_PIXEL_NORMALIZE_NORM_FACTOR(val)
> REG_FIELD_PREP(PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MAS
> K, (val))
> > -#define PLANE_PIXEL_NORMALIZE_NORM_FACTOR_1_0
> 0x3c00
> >
> > #endif /* __SKL_UNIVERSAL_PLANE_REGS_H__ */
> > --
> > 2.43.0
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd
2026-01-27 12:18 ` Ville Syrjälä
2026-01-28 6:06 ` Shankar, Uma
@ 2026-01-28 7:38 ` Govindapillai, Vinod
2026-01-28 15:28 ` Ville Syrjälä
1 sibling, 1 reply; 7+ messages in thread
From: Govindapillai, Vinod @ 2026-01-28 7:38 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com
Cc: intel-xe@lists.freedesktop.org, Shankar, Uma,
Heikkila, Juha-pekka, intel-gfx@lists.freedesktop.org
On Tue, 2026-01-27 at 14:18 +0200, Ville Syrjälä wrote:
> On Tue, Jan 27, 2026 at 01:13:45PM +0200, Vinod Govindapillai wrote:
> > Pixel normalizer is enabled with normalization factor as 1.0 for
> > FP16 formats in order to support FBC for those formats in xe3p_lpd.
> > Previously pixel normalizer gets disabled during the plane disable
> > routine. But there could be plane format settings without
> > explicitly
> > calling the plane disable in-between and we could endup keeping the
> > pixel normalizer enabled for formats which we don't require that.
> > This is causing crc mismatches in yuv formats and FIFO underruns in
> > planar formats like NV12.
> >
> > Fix this by updating the pixel normalizer configuration based on
> > the
> > pixel formats explicitly during the plane settings arm calls itself
> > - enable it for FP16 and disable it for other formats in HDR
> > capable
> > planes. To avoid redundancies in these updates, normalization
> > factor
> > between old and new plane states are compared before the update.
> > The
> > function to check validity of the fp16 formats for fbc is now
> > updated
> > to return the normalization factor as 1.0 in case of fp16 formats
> > and
> > 0 in other cases.
>
> This looks incredibly complex for just writing a single register.
> I think it should be just somehting like:
>
> static u32 pixel_normalizer_val()
> {
> if (!need_pixel_normalizer())
> return 0;
>
> return ENABLE | FACTOR;
> }
>
> plane_update(..)
> {
> ...
> if (HAS_PIXEL_NORMALIZER())
> write(PIXEL_NOFMRALIZER, pixel_normalizer_val())
> ...
> }
>
> plane_disable()
> {
> ...
> // do we even need to disable it for disabled planes?
> if (HAS_PIXEL_NORMALIZER())
> write(PIXEL_NORMALIZER, 0);
> ...
> }
Okay. Thanks for the suggestion. This is basically similar to the
revision 1 of this patch!
But before sending another revision, I would like to clarify about
HAS_PIXEL_NORMALIZER(). Pixel normalizer is there even in earlier
versions. We are using this mainly for the FP16 case. So do you agree
to use HAS_FP16_FORMATS instead of HAS_PIXEL_NORMALIZER?
Also normalizer is available for the HDR planes, so will have to use
if (HAS_FP16_FORMATS(display) && skl_plane_has_fbc(display, fbc_id,
plane->id))
write(PIXEL_NORMALIZER, val / 0)
BR
Vinod
>
> >
> > v2: avoid redundant pixel normalization setting updates
> >
> > v3: moved the normalization factor definition to intel_fbc.c and
> > some
> > updates to comments
> >
> > Fixes: 5298eea7ed20 ("drm/i915/xe3p_lpd: use pixel normalizer for
> > fp16 formats for FBC")
> > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> > ---
> > .../drm/i915/display/intel_display_device.h | 1 +
> > .../drm/i915/display/intel_display_types.h | 8 ++
> > drivers/gpu/drm/i915/display/intel_fbc.c | 19 ++++-
> > drivers/gpu/drm/i915/display/intel_fbc.h | 4 +-
> > .../drm/i915/display/skl_universal_plane.c | 82
> > +++++++++++++++----
> > .../i915/display/skl_universal_plane_regs.h | 1 -
> > 6 files changed, 92 insertions(+), 23 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> > b/drivers/gpu/drm/i915/display/intel_display_device.h
> > index 6c74d6b0cc48..126aa1eeeb6d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> > @@ -175,6 +175,7 @@ struct intel_display_platforms {
> > #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >=
> > 12 && HAS_DSC(__display))
> > #define
> > HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
> > #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >=
> > 30)
> > +#define
> > HAS_FBC_FP16_FORMATS(__display) (DISPLAY_VER(__display) >= 35)
> > #define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >=
> > 35 && !(__display)->platform.dgfx)
> > #define
> > HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
> > #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >=
> > 3)
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index e6298279dc89..92bce232b2c5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -686,6 +686,14 @@ struct intel_plane_state {
> > unsigned long flags;
> > #define PLANE_HAS_FENCE BIT(0)
> >
> > + /* xe3p_lpd+ */
> > + struct {
> > + /* In half-precision floating-point format. 0x3c00
> > (1.0) for fp16 formats */
> > + unsigned int factor;
> > + /* update is needed if factor differs between old
> > and new plane states */
> > + bool needs_update;
> > + } pixel_normalizer;
> > +
> > struct intel_fb_view view;
> >
> > /* for legacy cursor fb unpin */
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 1f3f5237a1c2..f9474e7741c8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -71,6 +71,9 @@
> >
> > #define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
> >
> > +/* Pixel normalization factor 1.0 in half-precision floating-point
> > format */
> > +#define NORM_FACTOR_1_0_IN_HALF_PRECISION_FP 0x3c00
> > +
> > struct intel_fbc_funcs {
> > void (*activate)(struct intel_fbc *fbc);
> > void (*deactivate)(struct intel_fbc *fbc);
> > @@ -1215,13 +1218,21 @@ static bool
> > xe3p_lpd_fbc_pixel_format_is_valid(const struct intel_plane_state
> > *p
> > }
> > }
> >
> > -bool
> > -intel_fbc_is_enable_pixel_normalizer(const struct
> > intel_plane_state *plane_state)
> > +unsigned int
> > +intel_fbc_normalization_factor(const struct intel_plane_state
> > *plane_state)
> > {
> > struct intel_display *display =
> > to_intel_display(plane_state);
> >
> > - return DISPLAY_VER(display) >= 35 &&
> > - xe3p_lpd_fbc_fp16_format_is_valid(plane_state);
> > + /*
> > + * In order to have FBC for fp16 formats pixel normalizer
> > block must be
> > + * active. For FP16 formats, use normalization factor as
> > 1.0 and enable
> > + * the block.
> > + */
> > + if (HAS_FBC_FP16_FORMATS(display) &&
> > + xe3p_lpd_fbc_fp16_format_is_valid(plane_state))
> > + return NORM_FACTOR_1_0_IN_HALF_PRECISION_FP;
> > +
> > + return 0;
> > }
> >
> > static bool pixel_format_is_valid(const struct intel_plane_state
> > *plane_state)
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h
> > b/drivers/gpu/drm/i915/display/intel_fbc.h
> > index f0255ddae2b6..b5888e98a659 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> > @@ -56,7 +56,7 @@ void intel_fbc_prepare_dirty_rect(struct
> > intel_atomic_state *state,
> > struct intel_crtc *crtc);
> > void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,
> > struct intel_plane *plane);
> > -bool
> > -intel_fbc_is_enable_pixel_normalizer(const struct
> > intel_plane_state *plane_state);
> > +unsigned int
> > +intel_fbc_normalization_factor(const struct intel_plane_state
> > *plane_state);
> >
> > #endif /* __INTEL_FBC_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > index b3d41705448a..05c227913b8d 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > @@ -891,20 +891,49 @@ static void
> > icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,
> > intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe,
> > plane->id), 0);
> > }
> >
> > -static void x3p_lpd_plane_update_pixel_normalizer(struct intel_dsb
> > *dsb,
> > - struct
> > intel_plane *plane,
> > - bool enable)
> > +static void xe3p_lpd_plane_disable_pixel_normalizer(struct
> > intel_dsb *dsb,
> > + struct
> > intel_plane *plane)
> > {
> > struct intel_display *display = to_intel_display(plane);
> > enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane-
> > >pipe);
> > - u32 val;
> > + const struct intel_plane_state *plane_state =
> > + to_intel_plane_state(plane->base.state);
> > +
> > + if (!HAS_FBC_FP16_FORMATS(display))
> > + return;
> > +
> > + if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> > + return;
> > +
> > + if (!plane_state->pixel_normalizer.factor)
> > + return;
> > +
> > + intel_de_write_dsb(display, dsb,
> > + PLANE_PIXEL_NORMALIZE(plane->pipe,
> > plane->id), 0);
> > +}
> > +
> > +static void xe3p_lpd_plane_update_pixel_normalizer(struct
> > intel_dsb *dsb,
> > + struct
> > intel_plane *plane)
> > +{
> > + struct intel_display *display = to_intel_display(plane);
> > + enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane-
> > >pipe);
> > + const struct intel_plane_state *plane_state =
> > + to_intel_plane_state(plane->base.state);
> > + u32 val = 0;
> > +
> > + if (!HAS_FBC_FP16_FORMATS(display))
> > + return;
> >
> > - /* Only HDR planes have pixel normalizer and don't matter
> > if no FBC */
> > + /* Only HDR planes have pixel normalizer and don't matter
> > if FBC is fused off */
> > if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> > return;
> >
> > - val = enable ?
> > PLANE_PIXEL_NORMALIZE_NORM_FACTOR(PLANE_PIXEL_NORMALIZE_NORM_FACTOR
> > _1_0) |
> > - PLANE_PIXEL_NORMALIZE_ENABLE : 0;
> > + if (!plane_state->pixel_normalizer.needs_update)
> > + return;
> > +
> > + if (plane_state->pixel_normalizer.factor)
> > + val =
> > PLANE_PIXEL_NORMALIZE_NORM_FACTOR(plane_state-
> > >pixel_normalizer.factor) |
> > + PLANE_PIXEL_NORMALIZE_ENABLE;
> >
> > intel_de_write_dsb(display, dsb,
> > PLANE_PIXEL_NORMALIZE(plane->pipe,
> > plane->id), val);
> > @@ -926,8 +955,7 @@ icl_plane_disable_arm(struct intel_dsb *dsb,
> >
> > icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);
> >
> > - if (DISPLAY_VER(display) >= 35)
> > - x3p_lpd_plane_update_pixel_normalizer(dsb, plane,
> > false);
> > + xe3p_lpd_plane_disable_pixel_normalizer(dsb, plane);
> >
> > intel_de_write_dsb(display, dsb, PLANE_CTL(pipe,
> > plane_id), 0);
> > intel_de_write_dsb(display, dsb, PLANE_SURF(pipe,
> > plane_id), 0);
> > @@ -1674,13 +1702,7 @@ icl_plane_update_arm(struct intel_dsb *dsb,
> >
> > intel_color_plane_commit_arm(dsb, plane_state);
> >
> > - /*
> > - * In order to have FBC for fp16 formats pixel normalizer
> > block must be
> > - * active. Check if pixel normalizer block need to be
> > enabled for FBC.
> > - * If needed, use normalization factor as 1.0 and enable
> > the block.
> > - */
> > - if (intel_fbc_is_enable_pixel_normalizer(plane_state))
> > - x3p_lpd_plane_update_pixel_normalizer(dsb, plane,
> > true);
> > + xe3p_lpd_plane_update_pixel_normalizer(dsb, plane);
> >
> > /*
> > * The control register self-arms if the plane was
> > previously
> > @@ -2350,6 +2372,32 @@ static void clip_damage(struct
> > intel_plane_state *plane_state)
> > drm_rect_intersect(damage, &src);
> > }
> >
> > +static void check_pixel_normalizer(struct intel_plane_state
> > *plane_state)
> > +{
> > + struct intel_display *display =
> > to_intel_display(plane_state);
> > + struct intel_plane *plane = to_intel_plane(plane_state-
> > >uapi.plane);
> > + struct intel_atomic_state *state =
> > + to_intel_atomic_state(plane_state->uapi.state);
> > + const struct intel_plane_state *old_plane_state =
> > + intel_atomic_get_old_plane_state(state, plane);
> > +
> > + if (!HAS_FBC_FP16_FORMATS(display))
> > + return;
> > +
> > + plane_state->pixel_normalizer.factor =
> > + intel_fbc_normalization_factor(plane_state);
> > +
> > + /*
> > + * In case of no old state to compare, better to force
> > update the pixel
> > + * normalizer settings.
> > + */
> > + plane_state->pixel_normalizer.needs_update = true;
> > + if (old_plane_state && old_plane_state->hw.fb)
> > + plane_state->pixel_normalizer.needs_update =
> > + plane_state->pixel_normalizer.factor !=
> > + intel_fbc_normalization_factor(old_plane_s
> > tate);
> > +}
> > +
> > static int skl_plane_check(struct intel_crtc_state *crtc_state,
> > struct intel_plane_state *plane_state)
> > {
> > @@ -2400,6 +2448,8 @@ static int skl_plane_check(struct
> > intel_crtc_state *crtc_state,
> >
> > check_protection(plane_state);
> >
> > + check_pixel_normalizer(plane_state);
> > +
> > /* HW only has 8 bits pixel precision, disable plane if
> > invisible */
> > if (!(plane_state->hw.alpha >> 8)) {
> > plane_state->uapi.visible = false;
> > diff --git
> > a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > index 6fd4da9f63cf..651f3557b576 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > @@ -580,6 +580,5 @@
> > #define
> > PLANE_PIXEL_NORMALIZE_ENABLE REG_BIT(31)
> > #define
> > PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK REG_GENMASK(15, 0)
> > #define
> > PLANE_PIXEL_NORMALIZE_NORM_FACTOR(val) REG_FIELD_PREP(PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK,(val))
> > -#define
> > PLANE_PIXEL_NORMALIZE_NORM_FACTOR_1_0 0x3c00
> >
> > #endif /* __SKL_UNIVERSAL_PLANE_REGS_H__ */
> > --
> > 2.43.0
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd
2026-01-28 7:38 ` Govindapillai, Vinod
@ 2026-01-28 15:28 ` Ville Syrjälä
0 siblings, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2026-01-28 15:28 UTC (permalink / raw)
To: Govindapillai, Vinod
Cc: intel-xe@lists.freedesktop.org, Shankar, Uma,
Heikkila, Juha-pekka, intel-gfx@lists.freedesktop.org
On Wed, Jan 28, 2026 at 07:38:48AM +0000, Govindapillai, Vinod wrote:
> On Tue, 2026-01-27 at 14:18 +0200, Ville Syrjälä wrote:
> > On Tue, Jan 27, 2026 at 01:13:45PM +0200, Vinod Govindapillai wrote:
> > > Pixel normalizer is enabled with normalization factor as 1.0 for
> > > FP16 formats in order to support FBC for those formats in xe3p_lpd.
> > > Previously pixel normalizer gets disabled during the plane disable
> > > routine. But there could be plane format settings without
> > > explicitly
> > > calling the plane disable in-between and we could endup keeping the
> > > pixel normalizer enabled for formats which we don't require that.
> > > This is causing crc mismatches in yuv formats and FIFO underruns in
> > > planar formats like NV12.
> > >
> > > Fix this by updating the pixel normalizer configuration based on
> > > the
> > > pixel formats explicitly during the plane settings arm calls itself
> > > - enable it for FP16 and disable it for other formats in HDR
> > > capable
> > > planes. To avoid redundancies in these updates, normalization
> > > factor
> > > between old and new plane states are compared before the update.
> > > The
> > > function to check validity of the fp16 formats for fbc is now
> > > updated
> > > to return the normalization factor as 1.0 in case of fp16 formats
> > > and
> > > 0 in other cases.
> >
> > This looks incredibly complex for just writing a single register.
> > I think it should be just somehting like:
> >
> > static u32 pixel_normalizer_val()
> > {
> > if (!need_pixel_normalizer())
> > return 0;
> >
> > return ENABLE | FACTOR;
> > }
> >
> > plane_update(..)
> > {
> > ...
> > if (HAS_PIXEL_NORMALIZER())
> > write(PIXEL_NOFMRALIZER, pixel_normalizer_val())
> > ...
> > }
> >
> > plane_disable()
> > {
> > ...
> > // do we even need to disable it for disabled planes?
> > if (HAS_PIXEL_NORMALIZER())
> > write(PIXEL_NORMALIZER, 0);
> > ...
> > }
>
>
> Okay. Thanks for the suggestion. This is basically similar to the
> revision 1 of this patch!
>
> But before sending another revision, I would like to clarify about
> HAS_PIXEL_NORMALIZER(). Pixel normalizer is there even in earlier
> versions. We are using this mainly for the FP16 case. So do you agree
> to use HAS_FP16_FORMATS instead of HAS_PIXEL_NORMALIZER?
If the normalizer is there then we want to program it.
>
> Also normalizer is available for the HDR planes, so will have to use
>
> if (HAS_FP16_FORMATS(display) && skl_plane_has_fbc(display, fbc_id,
> plane->id))
plane_has_pixel_normalizer()
{
return HAS_PIXEL_NORMALIZER() && plane_is_hdr();
}
> write(PIXEL_NORMALIZER, val / 0)
>
>
> BR
> Vinod
>
> >
> > >
> > > v2: avoid redundant pixel normalization setting updates
> > >
> > > v3: moved the normalization factor definition to intel_fbc.c and
> > > some
> > > updates to comments
> > >
> > > Fixes: 5298eea7ed20 ("drm/i915/xe3p_lpd: use pixel normalizer for
> > > fp16 formats for FBC")
> > > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> > > ---
> > > .../drm/i915/display/intel_display_device.h | 1 +
> > > .../drm/i915/display/intel_display_types.h | 8 ++
> > > drivers/gpu/drm/i915/display/intel_fbc.c | 19 ++++-
> > > drivers/gpu/drm/i915/display/intel_fbc.h | 4 +-
> > > .../drm/i915/display/skl_universal_plane.c | 82
> > > +++++++++++++++----
> > > .../i915/display/skl_universal_plane_regs.h | 1 -
> > > 6 files changed, 92 insertions(+), 23 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> > > b/drivers/gpu/drm/i915/display/intel_display_device.h
> > > index 6c74d6b0cc48..126aa1eeeb6d 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> > > @@ -175,6 +175,7 @@ struct intel_display_platforms {
> > > #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >=
> > > 12 && HAS_DSC(__display))
> > > #define
> > > HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
> > > #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >=
> > > 30)
> > > +#define
> > > HAS_FBC_FP16_FORMATS(__display) (DISPLAY_VER(__display) >= 35)
> > > #define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >=
> > > 35 && !(__display)->platform.dgfx)
> > > #define
> > > HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
> > > #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >=
> > > 3)
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index e6298279dc89..92bce232b2c5 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -686,6 +686,14 @@ struct intel_plane_state {
> > > unsigned long flags;
> > > #define PLANE_HAS_FENCE BIT(0)
> > >
> > > + /* xe3p_lpd+ */
> > > + struct {
> > > + /* In half-precision floating-point format. 0x3c00
> > > (1.0) for fp16 formats */
> > > + unsigned int factor;
> > > + /* update is needed if factor differs between old
> > > and new plane states */
> > > + bool needs_update;
> > > + } pixel_normalizer;
> > > +
> > > struct intel_fb_view view;
> > >
> > > /* for legacy cursor fb unpin */
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 1f3f5237a1c2..f9474e7741c8 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -71,6 +71,9 @@
> > >
> > > #define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
> > >
> > > +/* Pixel normalization factor 1.0 in half-precision floating-point
> > > format */
> > > +#define NORM_FACTOR_1_0_IN_HALF_PRECISION_FP 0x3c00
> > > +
> > > struct intel_fbc_funcs {
> > > void (*activate)(struct intel_fbc *fbc);
> > > void (*deactivate)(struct intel_fbc *fbc);
> > > @@ -1215,13 +1218,21 @@ static bool
> > > xe3p_lpd_fbc_pixel_format_is_valid(const struct intel_plane_state
> > > *p
> > > }
> > > }
> > >
> > > -bool
> > > -intel_fbc_is_enable_pixel_normalizer(const struct
> > > intel_plane_state *plane_state)
> > > +unsigned int
> > > +intel_fbc_normalization_factor(const struct intel_plane_state
> > > *plane_state)
> > > {
> > > struct intel_display *display =
> > > to_intel_display(plane_state);
> > >
> > > - return DISPLAY_VER(display) >= 35 &&
> > > - xe3p_lpd_fbc_fp16_format_is_valid(plane_state);
> > > + /*
> > > + * In order to have FBC for fp16 formats pixel normalizer
> > > block must be
> > > + * active. For FP16 formats, use normalization factor as
> > > 1.0 and enable
> > > + * the block.
> > > + */
> > > + if (HAS_FBC_FP16_FORMATS(display) &&
> > > + xe3p_lpd_fbc_fp16_format_is_valid(plane_state))
> > > + return NORM_FACTOR_1_0_IN_HALF_PRECISION_FP;
> > > +
> > > + return 0;
> > > }
> > >
> > > static bool pixel_format_is_valid(const struct intel_plane_state
> > > *plane_state)
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h
> > > b/drivers/gpu/drm/i915/display/intel_fbc.h
> > > index f0255ddae2b6..b5888e98a659 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> > > @@ -56,7 +56,7 @@ void intel_fbc_prepare_dirty_rect(struct
> > > intel_atomic_state *state,
> > > struct intel_crtc *crtc);
> > > void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,
> > > struct intel_plane *plane);
> > > -bool
> > > -intel_fbc_is_enable_pixel_normalizer(const struct
> > > intel_plane_state *plane_state);
> > > +unsigned int
> > > +intel_fbc_normalization_factor(const struct intel_plane_state
> > > *plane_state);
> > >
> > > #endif /* __INTEL_FBC_H__ */
> > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > index b3d41705448a..05c227913b8d 100644
> > > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > @@ -891,20 +891,49 @@ static void
> > > icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,
> > > intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe,
> > > plane->id), 0);
> > > }
> > >
> > > -static void x3p_lpd_plane_update_pixel_normalizer(struct intel_dsb
> > > *dsb,
> > > - struct
> > > intel_plane *plane,
> > > - bool enable)
> > > +static void xe3p_lpd_plane_disable_pixel_normalizer(struct
> > > intel_dsb *dsb,
> > > + struct
> > > intel_plane *plane)
> > > {
> > > struct intel_display *display = to_intel_display(plane);
> > > enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane-
> > > >pipe);
> > > - u32 val;
> > > + const struct intel_plane_state *plane_state =
> > > + to_intel_plane_state(plane->base.state);
> > > +
> > > + if (!HAS_FBC_FP16_FORMATS(display))
> > > + return;
> > > +
> > > + if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> > > + return;
> > > +
> > > + if (!plane_state->pixel_normalizer.factor)
> > > + return;
> > > +
> > > + intel_de_write_dsb(display, dsb,
> > > + PLANE_PIXEL_NORMALIZE(plane->pipe,
> > > plane->id), 0);
> > > +}
> > > +
> > > +static void xe3p_lpd_plane_update_pixel_normalizer(struct
> > > intel_dsb *dsb,
> > > + struct
> > > intel_plane *plane)
> > > +{
> > > + struct intel_display *display = to_intel_display(plane);
> > > + enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane-
> > > >pipe);
> > > + const struct intel_plane_state *plane_state =
> > > + to_intel_plane_state(plane->base.state);
> > > + u32 val = 0;
> > > +
> > > + if (!HAS_FBC_FP16_FORMATS(display))
> > > + return;
> > >
> > > - /* Only HDR planes have pixel normalizer and don't matter
> > > if no FBC */
> > > + /* Only HDR planes have pixel normalizer and don't matter
> > > if FBC is fused off */
> > > if (!skl_plane_has_fbc(display, fbc_id, plane->id))
> > > return;
> > >
> > > - val = enable ?
> > > PLANE_PIXEL_NORMALIZE_NORM_FACTOR(PLANE_PIXEL_NORMALIZE_NORM_FACTOR
> > > _1_0) |
> > > - PLANE_PIXEL_NORMALIZE_ENABLE : 0;
> > > + if (!plane_state->pixel_normalizer.needs_update)
> > > + return;
> > > +
> > > + if (plane_state->pixel_normalizer.factor)
> > > + val =
> > > PLANE_PIXEL_NORMALIZE_NORM_FACTOR(plane_state-
> > > >pixel_normalizer.factor) |
> > > + PLANE_PIXEL_NORMALIZE_ENABLE;
> > >
> > > intel_de_write_dsb(display, dsb,
> > > PLANE_PIXEL_NORMALIZE(plane->pipe,
> > > plane->id), val);
> > > @@ -926,8 +955,7 @@ icl_plane_disable_arm(struct intel_dsb *dsb,
> > >
> > > icl_plane_disable_sel_fetch_arm(dsb, plane, crtc_state);
> > >
> > > - if (DISPLAY_VER(display) >= 35)
> > > - x3p_lpd_plane_update_pixel_normalizer(dsb, plane,
> > > false);
> > > + xe3p_lpd_plane_disable_pixel_normalizer(dsb, plane);
> > >
> > > intel_de_write_dsb(display, dsb, PLANE_CTL(pipe,
> > > plane_id), 0);
> > > intel_de_write_dsb(display, dsb, PLANE_SURF(pipe,
> > > plane_id), 0);
> > > @@ -1674,13 +1702,7 @@ icl_plane_update_arm(struct intel_dsb *dsb,
> > >
> > > intel_color_plane_commit_arm(dsb, plane_state);
> > >
> > > - /*
> > > - * In order to have FBC for fp16 formats pixel normalizer
> > > block must be
> > > - * active. Check if pixel normalizer block need to be
> > > enabled for FBC.
> > > - * If needed, use normalization factor as 1.0 and enable
> > > the block.
> > > - */
> > > - if (intel_fbc_is_enable_pixel_normalizer(plane_state))
> > > - x3p_lpd_plane_update_pixel_normalizer(dsb, plane,
> > > true);
> > > + xe3p_lpd_plane_update_pixel_normalizer(dsb, plane);
> > >
> > > /*
> > > * The control register self-arms if the plane was
> > > previously
> > > @@ -2350,6 +2372,32 @@ static void clip_damage(struct
> > > intel_plane_state *plane_state)
> > > drm_rect_intersect(damage, &src);
> > > }
> > >
> > > +static void check_pixel_normalizer(struct intel_plane_state
> > > *plane_state)
> > > +{
> > > + struct intel_display *display =
> > > to_intel_display(plane_state);
> > > + struct intel_plane *plane = to_intel_plane(plane_state-
> > > >uapi.plane);
> > > + struct intel_atomic_state *state =
> > > + to_intel_atomic_state(plane_state->uapi.state);
> > > + const struct intel_plane_state *old_plane_state =
> > > + intel_atomic_get_old_plane_state(state, plane);
> > > +
> > > + if (!HAS_FBC_FP16_FORMATS(display))
> > > + return;
> > > +
> > > + plane_state->pixel_normalizer.factor =
> > > + intel_fbc_normalization_factor(plane_state);
> > > +
> > > + /*
> > > + * In case of no old state to compare, better to force
> > > update the pixel
> > > + * normalizer settings.
> > > + */
> > > + plane_state->pixel_normalizer.needs_update = true;
> > > + if (old_plane_state && old_plane_state->hw.fb)
> > > + plane_state->pixel_normalizer.needs_update =
> > > + plane_state->pixel_normalizer.factor !=
> > > + intel_fbc_normalization_factor(old_plane_s
> > > tate);
> > > +}
> > > +
> > > static int skl_plane_check(struct intel_crtc_state *crtc_state,
> > > struct intel_plane_state *plane_state)
> > > {
> > > @@ -2400,6 +2448,8 @@ static int skl_plane_check(struct
> > > intel_crtc_state *crtc_state,
> > >
> > > check_protection(plane_state);
> > >
> > > + check_pixel_normalizer(plane_state);
> > > +
> > > /* HW only has 8 bits pixel precision, disable plane if
> > > invisible */
> > > if (!(plane_state->hw.alpha >> 8)) {
> > > plane_state->uapi.visible = false;
> > > diff --git
> > > a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > > b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > > index 6fd4da9f63cf..651f3557b576 100644
> > > --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> > > @@ -580,6 +580,5 @@
> > > #define
> > > PLANE_PIXEL_NORMALIZE_ENABLE REG_BIT(31)
> > > #define
> > > PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK REG_GENMASK(15, 0)
> > > #define
> > > PLANE_PIXEL_NORMALIZE_NORM_FACTOR(val) REG_FIELD_PREP(PLANE_PIXEL_NORMALIZE_NORM_FACTOR_MASK,(val))
> > > -#define
> > > PLANE_PIXEL_NORMALIZE_NORM_FACTOR_1_0 0x3c00
> > >
> > > #endif /* __SKL_UNIVERSAL_PLANE_REGS_H__ */
> > > --
> > > 2.43.0
> >
>
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-01-28 15:28 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-01-27 11:13 [PATCH v3] drm/i915/display: fix the pixel normalization handling for xe3p_lpd Vinod Govindapillai
2026-01-27 12:18 ` Ville Syrjälä
2026-01-28 6:06 ` Shankar, Uma
2026-01-28 7:38 ` Govindapillai, Vinod
2026-01-28 15:28 ` Ville Syrjälä
2026-01-27 12:21 ` ✓ i915.CI.BAT: success for drm/i915/display: fix the pixel normalization handling for xe3p_lpd (rev3) Patchwork
2026-01-27 18:04 ` ✗ i915.CI.Full: failure " Patchwork
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