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From: Imre Deak <imre.deak@intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>,
	<intel-xe@lists.freedesktop.org>, <jani.nikula@linux.intel.com>
Subject: Re: [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid
Date: Mon, 2 Feb 2026 10:50:48 +0200	[thread overview]
Message-ID: <aYBlaFOIsCSbefqI@ideak-desk.lan> (raw)
In-Reply-To: <20260130081812.32087-9-ankit.k.nautiyal@intel.com>

On Fri, Jan 30, 2026 at 01:48:03PM +0530, Ankit Nautiyal wrote:
> Refactor the logic to get the number of joined pipes. Start with a single
> pipe and incrementally try additional pipes only if needed. While DSC
> overhead is not yet computed here, this restructuring prepares the code to
> support that in follow-up changes.
> 
> v2:
>  - Remove fallback in case force-joiner configuration fails. (Imre)
>  - Drop redundant MODE_OK assignment (Imre)
> v3:
>  - Align with the changes in intel_dp_mode_valid(). (Imre)
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Reviewed-by: Imre Deak <imre.deak@intel.com>

One comment below.

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     |  2 -
>  drivers/gpu/drm/i915/display/intel_dp.h     |  3 +
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 86 ++++++++++++---------
>  3 files changed, 52 insertions(+), 39 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 85e84f7748d3..2a31543ce4d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1371,7 +1371,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  	return MODE_OK;
>  }
>  
> -static
>  int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
>  {
>  	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> @@ -1434,7 +1433,6 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
>  	return true;
>  }
>  
> -static
>  bool intel_dp_can_join(struct intel_display *display,
>  		       int num_joined_pipes)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 25bfbfd291b0..6d409c1998c9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -225,5 +225,8 @@ int intel_dp_compute_config_late(struct intel_encoder *encoder,
>  				 struct drm_connector_state *conn_state);
>  int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
>  			       bool assume_all_enabled);
> +int intel_dp_max_hdisplay_per_pipe(struct intel_display *display);
> +bool intel_dp_can_join(struct intel_display *display,
> +		       int num_joined_pipes);
>  
>  #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index fc9367cc42ec..6414fc8fb4a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1420,7 +1420,6 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
>  	struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr;
>  	struct drm_dp_mst_port *port = connector->mst.port;
>  	const int min_bpp = 18;
> -	int max_dotclk = display->cdclk.max_dotclk_freq;
>  	int max_rate, mode_rate, max_lanes, max_link_clock;
>  	unsigned long bw_overhead_flags =
>  		DRM_DP_BW_OVERHEAD_MST | DRM_DP_BW_OVERHEAD_SSC_REF_CLK;
> @@ -1480,47 +1479,60 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
>  		return 0;
>  	}
>  
> -	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
> -						     mode->hdisplay, target_clock);
> +	*status = MODE_CLOCK_HIGH;
> +	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> +		int max_dotclk = display->cdclk.max_dotclk_freq;
>  
> -	if (intel_dp_has_dsc(connector) && drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> -		/*
> -		 * TBD pass the connector BPC,
> -		 * for now U8_MAX so that max BPC on that platform would be picked
> -		 */
> -		int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
> +		if (connector->force_joined_pipes &&
> +		    num_joined_pipes != connector->force_joined_pipes)
> +			continue;
>  
> -		if (!drm_dp_is_uhbr_rate(max_link_clock))
> -			bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> +		if (!intel_dp_can_join(display, num_joined_pipes))
> +			continue;
>  
> -		dsc = intel_dp_mode_valid_with_dsc(connector,
> -						   max_link_clock, max_lanes,
> -						   target_clock, mode->hdisplay,
> -						   num_joined_pipes,
> -						   INTEL_OUTPUT_FORMAT_RGB, pipe_bpp,
> -						   bw_overhead_flags);
> +		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> +			continue;
> +
> +		if (intel_dp_has_dsc(connector) &&
> +		    drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> +			/*
> +			 * TBD pass the connector BPC,
> +			 * for now U8_MAX so that max BPC on that platform would be picked
> +			 */
> +			int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
> +
> +			if (!drm_dp_is_uhbr_rate(max_link_clock))
> +				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> +
> +			dsc = intel_dp_mode_valid_with_dsc(connector,
> +							   max_link_clock, max_lanes,
> +							   target_clock, mode->hdisplay,
> +							   num_joined_pipes,
> +							   INTEL_OUTPUT_FORMAT_RGB, pipe_bpp,
> +							   bw_overhead_flags);
> +		}
> +
> +		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> +			continue;

Nit: This does work, since *status is guaranteed to be other than MODE_OK
(either MODE_CLOCK_HIGH set before the loop, or the error return from
intel_mode_valid_max_plane_size() in the previous iteration). However
for symmetry with the SST code, this could set *status = MODE_CLOCK_HIGH
explicitly before the continue.

> +
> +		if (mode_rate > max_rate && !dsc)

This as well.

> +			continue;
> +
> +		*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
> +
> +		if (*status != MODE_OK)
> +			continue;
> +
> +		max_dotclk *= num_joined_pipes;
> +
> +		if (mode->clock > max_dotclk) {
> +			*status = MODE_CLOCK_HIGH;
> +			continue;
> +		}
> +
> +		break;
>  	}
>  
> -	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) {
> -		*status = MODE_CLOCK_HIGH;
> -		return 0;
> -	}
> -
> -	if (mode_rate > max_rate && !dsc) {
> -		*status = MODE_CLOCK_HIGH;
> -		return 0;
> -	}
> -
> -	*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
> -
> -	if (*status != MODE_OK)
> -		return 0;
> -
> -	max_dotclk *= num_joined_pipes;
> -
> -	if (mode->clock > max_dotclk)
> -		*status = MODE_CLOCK_HIGH;
> -
>  	return 0;
>  }
>  
> -- 
> 2.45.2
> 

  reply	other threads:[~2026-02-02  8:51 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 01/17] drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 02/17] drm/i915/dp: Move num_joined_pipes and related checks together Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 03/17] drm/i915/dp: Extract helper to get the hdisplay limit Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid Ankit Nautiyal
2026-02-02  8:40   ` Imre Deak
2026-02-02  9:24     ` Nautiyal, Ankit K
2026-02-02  9:27       ` Imre Deak
2026-02-02  9:29         ` Nautiyal, Ankit K
2026-01-30  8:18 ` [PATCH 05/17] drm/i915/dp: Rework pipe joiner logic in compute_config Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 06/17] drm/i915/dp_mst: Move the check for dotclock at the end Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 07/17] drm/i915/dp_mst: Move the joiner dependent code together Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid Ankit Nautiyal
2026-02-02  8:50   ` Imre Deak [this message]
2026-01-30  8:18 ` [PATCH 09/17] drm/i915/dp_mst: Extract helper to compute link for given joiner config Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 10/17] drm/i915/dp_mst: Rework pipe joiner logic in compute_config Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 11/17] drm/i915/dp: Remove unused joiner helpers Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 12/17] drm/i915/dp: Introduce helper to check pixel rate against dotclock limits Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 13/17] drm/i915/dp: Refactor dsc_slice_count handling in intel_dp_mode_valid() Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 14/17] drm/i915/dp: Account for DSC slice overhead Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 15/17] drm/i915/dp: Add helpers for joiner candidate loops Ankit Nautiyal
2026-02-02  8:51   ` Imre Deak
2026-01-30  8:18 ` [PATCH 16/17] drm/i915/display: Add upper limit check for pixel clock Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 17/17] drm/i915/display: Extend the max dotclock limit to WCL Ankit Nautiyal
2026-01-30  9:41 ` ✓ i915.CI.BAT: success for Account for DSC bubble overhead for horizontal slices (rev6) Patchwork
2026-01-30 17:45 ` ✗ i915.CI.Full: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2026-02-02 10:37 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
2026-02-02 10:37 ` [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid Ankit Nautiyal

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