Re: [PATCH v7 0/3] Panel Replay BW optimization

[Imre Deak <imre.deak@intel.com>]

On Fri, Mar 13, 2026 at 07:20:24AM +0200, Hogander, Jouni wrote:
> On Thu, 2026-03-12 at 17:18 +0200, Imre Deak wrote:
> > On Thu, Mar 12, 2026 at 10:05:35AM +0200, Hogander, Jouni wrote:
> > > On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > > > Unused bandwidth can be used by external display agents for Panel
> > > > Replay
> > > > enabled DP panel during idleness with link on. This patch series
> > > > enabling the same.
> > > 
> > > Generic comment on this patch set. Maybe we should add one more
> > > patch
> > > with "Fixes" tag:
> > > 
> > > Fixes: e60cff453b82 ("drm/i915/dp: Enable DP tunnel BW allocation
> > > mode")
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > Cc: <stable@vger.kernel.org> # v6.9+
> > 
> > Why? As I understand the Panel Replay BW optimization on a DP
> > tunneled
> > link is an _optional_ feature, whereby the free BW can be used by the
> > Thunderbolt protocol for other purposes than for the given display
> > stream for which Panel Replay is enabled. IOW, it looks to me a valid
> > configuration to enable Panel Replay on a DP tunneled link without
> > enabling the Panel Replay BW optimization on it.
> 
> My original comment was about DP spec:
> 
> "
> The DP Source device may optionally enable PR optimization with DP
> tunneling. The device
> shall query the Tunneling Bridge’s PR tunneling optimization capability
> by way of the
> Panel_Replay_Tunneling_Optimization_Support bit in the
> DP_TUNNELING_CAPABILITIES
> register (DPCD E000Dh[6]), and then enable PR only when the Tunneling
> Bridge is capable.
> "
> 
> That sounds like PR can be enabled only when Panel Replay Tunneling
> Optimization is supported?

The Standard refers to the _optimization_ of the Panel Replay
functionality over a tunnel. This optimization can be either enabled by
the source when enabling the Panel Replay functionality over a tunnel or
the optimization can be left disabled by the source when enabling the
Panel Replay functionality over a tunnel.

The optimization means that the BW of the stream, not otherwise used for
transferring active pixels or other data (i.e. dummy pixels) can be used
by the Thunderbolt protocol to transfer non-display traffic. If the
Panel Replay is enabled over a tunnel without this optimization, then
the Thunderbolt protocol is not allowed to use this BW for other
purposes (i.e. it just transfers all the display traffic it receives
from the source as-is).

> 
> BR,
> Jouni Högander
> 
> > 
> > > This patch would just add:
> > > 
> > > if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) {
> > > 	drm_dbg_kms(display->drm,
> > > 		    "Panel Replay is disabled as DP tunneling
> > > enabled\n");
> > > 	return false;
> > > }
> > > 
> > > into _panel_replay_compute_config. this could be first patch in
> > > your
> > > set. What do you think?
> > > 
> > > BR,
> > > Jouni Högander
> > > 
> > > > 
> > > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > > 
> > > > Animesh Manna (3):
> > > >   drm/i915/display: Add drm helper to check pr optimization
> > > > support
> > > >   drm/i915/display: Panel Replay BW optimization for DP2.0
> > > > tunneling
> > > >   drm/i915/display: Disable Panel Replay for DP-tunneling without
> > > >     optimization
> > > > 
> > > >  drivers/gpu/drm/display/drm_dp_tunnel.c       | 17 ++++++++++
> > > >  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
> > > >  .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
> > > >  .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
> > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 31
> > > > +++++++++++++++++--
> > > >  include/drm/display/drm_dp_tunnel.h           |  6 ++++
> > > >  6 files changed, 73 insertions(+), 2 deletions(-)
> > > > 
> > > 
>