[PATCH v7 0/3] Panel Replay BW optimization

[PATCH v7 0/3] Panel Replay BW optimization

[Animesh Manna]

Unused bandwidth can be used by external display agents for Panel Replay
enabled DP panel during idleness with link on. This patch series
enabling the same.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (3):
  drm/i915/display: Add drm helper to check pr optimization support
  drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
  drm/i915/display: Disable Panel Replay for DP-tunneling without
    optimization

 drivers/gpu/drm/display/drm_dp_tunnel.c       | 17 ++++++++++
 .../gpu/drm/i915/display/intel_display_regs.h |  1 +
 .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
 .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
 drivers/gpu/drm/i915/display/intel_psr.c      | 31 +++++++++++++++++--
 include/drm/display/drm_dp_tunnel.h           |  6 ++++
 6 files changed, 73 insertions(+), 2 deletions(-)

-- 
2.29.0

[PATCH v7 1/3] drm/i915/display: Add drm helper to check pr optimization support

[Animesh Manna]

Add api to check panel replay optimization supported or not to
drm-core DP tunneling framework which can be used by other driver
as well.

Suggested-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/display/drm_dp_tunnel.c        | 17 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp_tunnel.c | 14 ++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp_tunnel.h |  6 ++++++
 include/drm/display/drm_dp_tunnel.h            |  6 ++++++
 4 files changed, 43 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_tunnel.c b/drivers/gpu/drm/display/drm_dp_tunnel.c
index f442430d8de7..39c07cb4123b 100644
--- a/drivers/gpu/drm/display/drm_dp_tunnel.c
+++ b/drivers/gpu/drm/display/drm_dp_tunnel.c
@@ -149,6 +149,7 @@ struct drm_dp_tunnel {
 	bool bw_alloc_enabled:1;
 	bool has_io_error:1;
 	bool destroyed:1;
+	bool pr_optimization_support:1;
 };
 
 struct drm_dp_tunnel_group_state;
@@ -508,6 +509,8 @@ create_tunnel(struct drm_dp_tunnel_mgr *mgr,
 
 	tunnel->bw_alloc_supported = tunnel_reg_bw_alloc_supported(regs);
 	tunnel->bw_alloc_enabled = tunnel_reg_bw_alloc_enabled(regs);
+	tunnel->pr_optimization_support = tunnel_reg(regs, DP_TUNNELING_CAPABILITIES) &
+					  DP_PANEL_REPLAY_OPTIMIZATION_SUPPORT;
 
 	if (!add_tunnel_to_group(mgr, drv_group_id, tunnel)) {
 		kfree(tunnel);
@@ -1036,6 +1039,20 @@ bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel *tunnel)
 }
 EXPORT_SYMBOL(drm_dp_tunnel_bw_alloc_is_enabled);
 
+/**
+ * drm_dp_tunnel_pr_optimization_supported - Query the PR BW optimization support
+ * @tunnel: Tunnel object
+ *
+ * Query if the PR BW optimization is supported for @tunnel.
+ *
+ * Returns %true if the PR BW optimiation is supported for @tunnel.
+ */
+bool drm_dp_tunnel_pr_optimization_supported(const struct drm_dp_tunnel *tunnel)
+{
+	return tunnel && tunnel->pr_optimization_support;
+}
+EXPORT_SYMBOL(drm_dp_tunnel_pr_optimization_supported);
+
 static int clear_bw_req_state(struct drm_dp_aux *aux)
 {
 	u8 bw_req_mask = DP_BW_REQUEST_SUCCEEDED | DP_BW_REQUEST_FAILED;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
index 1fd1ac8d556d..075aea9d6ede 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
@@ -296,6 +296,20 @@ bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp)
 	return drm_dp_tunnel_bw_alloc_is_enabled(intel_dp->tunnel);
 }
 
+/**
+ * intel_dp_tunnel_pr_optimization_supported - Query the PR BW optimization support
+ * @intel_dp: DP port object
+ *
+ * Query whether a DP tunnel is connected on @intel_dp and the tunnel supports
+ * the PR BW optimization.
+ *
+ * Returns %true if the BW allocation mode is supported on @intel_dp.
+ */
+bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp *intel_dp)
+{
+	return drm_dp_tunnel_pr_optimization_supported(intel_dp->tunnel);
+}
+
 /**
  * intel_dp_tunnel_suspend - Suspend a DP tunnel connected on a port
  * @intel_dp: DP port object
diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
index 7f0f720e8dca..03e147736b65 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
@@ -32,6 +32,7 @@ void intel_dp_tunnel_resume(struct intel_dp *intel_dp,
 void intel_dp_tunnel_suspend(struct intel_dp *intel_dp);
 
 bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp);
+bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp *intel_dp);
 
 void
 intel_dp_tunnel_atomic_cleanup_inherited_state(struct intel_atomic_state *state);
@@ -76,6 +77,11 @@ static inline bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp
 	return false;
 }
 
+static inline bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp *intel_dp)
+{
+	return false;
+}
+
 static inline void
 intel_dp_tunnel_atomic_cleanup_inherited_state(struct intel_atomic_state *state) {}
 
diff --git a/include/drm/display/drm_dp_tunnel.h b/include/drm/display/drm_dp_tunnel.h
index 87212c847915..4aa3ce9fd829 100644
--- a/include/drm/display/drm_dp_tunnel.h
+++ b/include/drm/display/drm_dp_tunnel.h
@@ -53,6 +53,7 @@ int drm_dp_tunnel_destroy(struct drm_dp_tunnel *tunnel);
 int drm_dp_tunnel_enable_bw_alloc(struct drm_dp_tunnel *tunnel);
 int drm_dp_tunnel_disable_bw_alloc(struct drm_dp_tunnel *tunnel);
 bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel *tunnel);
+bool drm_dp_tunnel_pr_optimization_supported(const struct drm_dp_tunnel *tunnel);
 int drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw);
 int drm_dp_tunnel_get_allocated_bw(struct drm_dp_tunnel *tunnel);
 int drm_dp_tunnel_update_state(struct drm_dp_tunnel *tunnel);
@@ -140,6 +141,11 @@ static inline bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
 	return false;
 }
 
+static inline bool drm_dp_tunnel_pr_optimization_supported(const struct drm_dp_tunnel *tunnel)
+{
+	return false;
+}
+
 static inline int
 drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw)
 {
-- 
2.29.0

[PATCH v7 2/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling

[Animesh Manna]

Unused bandwidth can be used by external display agents for Panel Replay
enabled DP panel during idleness with link on. Enable source to replace
dummy data from the display with data from another agent by programming
TRANS_DP2_CTL [Panel Replay Tunneling Enable].

v2:
- Enable pr bw optimization along with panel replay enable. [Jani]

v3:
- Write TRANS_DP2_CTL once for both bw optimization and panel replay
enable. [Jani]

v4:
- Read DPCD once in init() and store in panel_replay_caps. [Jouni]

v5:
- Avoid reading DPCD for edp. [Jouni]
- Use drm_dp_dpcd_read_byte() and some cosmetic changes. [Jani]

v6:
- Extend the corresponding interface defined in drm_dp_tunnel.c
to query the Panel Replay optimization capability. [Imre]

Bspec: 68920
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 .../gpu/drm/i915/display/intel_display_regs.h |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 24 +++++++++++++++++--
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 4746e9ebd920..dada8dc27ea4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -2263,6 +2263,7 @@
 #define TRANS_DP2_CTL(trans)			_MMIO_TRANS(trans, _TRANS_DP2_CTL_A, _TRANS_DP2_CTL_B)
 #define  TRANS_DP2_128B132B_CHANNEL_CODING	REG_BIT(31)
 #define  TRANS_DP2_PANEL_REPLAY_ENABLE		REG_BIT(30)
+#define  TRANS_DP2_PR_TUNNELING_ENABLE		REG_BIT(26)
 #define  TRANS_DP2_DEBUG_ENABLE			REG_BIT(23)
 
 #define _TRANS_DP2_VFREQHIGH_A			0x600a4
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 5041a5a138d1..632527ede29f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -44,6 +44,7 @@
 #include "intel_dmc.h"
 #include "intel_dp.h"
 #include "intel_dp_aux.h"
+#include "intel_dp_tunnel.h"
 #include "intel_dsb.h"
 #include "intel_frontbuffer.h"
 #include "intel_hdmi.h"
@@ -1023,11 +1024,28 @@ static u8 frames_before_su_entry(struct intel_dp *intel_dp)
 	return frames_before_su_entry;
 }
 
+static bool intel_psr_allow_pr_bw_optimization(struct intel_dp *intel_dp)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+
+	if (DISPLAY_VER(display) < 35)
+		return false;
+
+	if (!intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
+		return false;
+
+	if (!intel_dp_tunnel_pr_optimization_supported(intel_dp))
+		return false;
+
+	return true;
+}
+
 static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	struct intel_psr *psr = &intel_dp->psr;
 	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
+	u32 dp2_ctl_val = TRANS_DP2_PANEL_REPLAY_ENABLE;
 
 	if (intel_dp_is_edp(intel_dp) && psr->sel_update_enabled) {
 		u32 val = psr->su_region_et_enabled ?
@@ -1040,12 +1058,14 @@ static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
 			       val);
 	}
 
+	if (!intel_dp_is_edp(intel_dp) && intel_psr_allow_pr_bw_optimization(intel_dp))
+		dp2_ctl_val |= TRANS_DP2_PR_TUNNELING_ENABLE;
+
 	intel_de_rmw(display,
 		     PSR2_MAN_TRK_CTL(display, intel_dp->psr.transcoder),
 		     0, ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
 
-	intel_de_rmw(display, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
-		     TRANS_DP2_PANEL_REPLAY_ENABLE);
+	intel_de_rmw(display, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0, dp2_ctl_val);
 }
 
 static void hsw_activate_psr2(struct intel_dp *intel_dp)
-- 
2.29.0

[PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-tunneling without optimization

[Animesh Manna]

As per DP specification,
    The DP Source device may optionally enable PR optimization
    with DP tunneling. The device shall query the Tunneling Bridge’s
    PR tunneling optimization capability by way of the
    Panel_Replay_Tunneling_Optimization_Support bit in the
    DP_TUNNELING_CAPABILITIES register (DPCD E000Dh[6]), and then enable PR
    only when the Tunneling Bridge is capable.

Therefore, do not enable Panel Replay for DP tunneling when optimization
support is not available.

Suggested-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 632527ede29f..3ec407a801b1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1796,6 +1796,13 @@ static bool _panel_replay_compute_config(struct intel_crtc_state *crtc_state,
 	crtc_state->link_off_after_as_sdp_when_pr_active = compute_link_off_after_as_sdp_when_pr_active(connector);
 	crtc_state->disable_as_sdp_when_pr_active = compute_disable_as_sdp_when_pr_active(connector);
 
+	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) &&
+	    !intel_dp_tunnel_pr_optimization_supported(intel_dp)) {
+		drm_dbg_kms(display->drm,
+			    "Panel Replay is disabled as DP tunelling enabled without optimization\n");
+		return false;
+	}
+
 	if (!intel_dp_is_edp(intel_dp))
 		return true;
 
-- 
2.29.0

Re: [PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-tunneling without optimization

[Hogander, Jouni]

On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> As per DP specification,
>     The DP Source device may optionally enable PR optimization
>     with DP tunneling. The device shall query the Tunneling Bridge’s
>     PR tunneling optimization capability by way of the
>     Panel_Replay_Tunneling_Optimization_Support bit in the
>     DP_TUNNELING_CAPABILITIES register (DPCD E000Dh[6]), and then
> enable PR
>     only when the Tunneling Bridge is capable.
> 
> Therefore, do not enable Panel Replay for DP tunneling when
> optimization
> support is not available.
> 
> Suggested-by: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 632527ede29f..3ec407a801b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1796,6 +1796,13 @@ static bool
> _panel_replay_compute_config(struct intel_crtc_state *crtc_state,
>  	crtc_state->link_off_after_as_sdp_when_pr_active =
> compute_link_off_after_as_sdp_when_pr_active(connector);
>  	crtc_state->disable_as_sdp_when_pr_active =
> compute_disable_as_sdp_when_pr_active(connector);
>  
> +	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) &&
> +	    !intel_dp_tunnel_pr_optimization_supported(intel_dp)) {
> +		drm_dbg_kms(display->drm,
> +			    "Panel Replay is disabled as DP
> tunelling enabled without

typo tunelling vs. tunneling. How about:

"Panel Replay is disabled as DP tunnelling PR optimization not
supported."

?

BR,
Jouni Högander

> optimization\n");
> +		return false;
> +	}
> +
>  	if (!intel_dp_is_edp(intel_dp))
>  		return true;
>  

Re: [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr optimization support

[Hogander, Jouni]

On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> Add api to check panel replay optimization supported or not to
> drm-core DP tunneling framework which can be used by other driver
> as well.
> 
> Suggested-by: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/display/drm_dp_tunnel.c        | 17
> +++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_dp_tunnel.c | 14 ++++++++++++++
>  drivers/gpu/drm/i915/display/intel_dp_tunnel.h |  6 ++++++
>  include/drm/display/drm_dp_tunnel.h            |  6 ++++++
>  4 files changed, 43 insertions(+)
> 
> diff --git a/drivers/gpu/drm/display/drm_dp_tunnel.c
> b/drivers/gpu/drm/display/drm_dp_tunnel.c
> index f442430d8de7..39c07cb4123b 100644
> --- a/drivers/gpu/drm/display/drm_dp_tunnel.c
> +++ b/drivers/gpu/drm/display/drm_dp_tunnel.c
> @@ -149,6 +149,7 @@ struct drm_dp_tunnel {
>  	bool bw_alloc_enabled:1;
>  	bool has_io_error:1;
>  	bool destroyed:1;
> +	bool pr_optimization_support:1;
>  };
>  
>  struct drm_dp_tunnel_group_state;
> @@ -508,6 +509,8 @@ create_tunnel(struct drm_dp_tunnel_mgr *mgr,
>  
>  	tunnel->bw_alloc_supported =
> tunnel_reg_bw_alloc_supported(regs);
>  	tunnel->bw_alloc_enabled =
> tunnel_reg_bw_alloc_enabled(regs);
> +	tunnel->pr_optimization_support = tunnel_reg(regs,
> DP_TUNNELING_CAPABILITIES) &
> +					 
> DP_PANEL_REPLAY_OPTIMIZATION_SUPPORT;
>  
>  	if (!add_tunnel_to_group(mgr, drv_group_id, tunnel)) {
>  		kfree(tunnel);
> @@ -1036,6 +1039,20 @@ bool drm_dp_tunnel_bw_alloc_is_enabled(const
> struct drm_dp_tunnel *tunnel)
>  }
>  EXPORT_SYMBOL(drm_dp_tunnel_bw_alloc_is_enabled);
>  
> +/**
> + * drm_dp_tunnel_pr_optimization_supported - Query the PR BW
> optimization support
> + * @tunnel: Tunnel object
> + *
> + * Query if the PR BW optimization is supported for @tunnel.
> + *
> + * Returns %true if the PR BW optimiation is supported for @tunnel.
> + */
> +bool drm_dp_tunnel_pr_optimization_supported(const struct
> drm_dp_tunnel *tunnel)
> +{
> +	return tunnel && tunnel->pr_optimization_support;
> +}
> +EXPORT_SYMBOL(drm_dp_tunnel_pr_optimization_supported);
> +
>  static int clear_bw_req_state(struct drm_dp_aux *aux)
>  {
>  	u8 bw_req_mask = DP_BW_REQUEST_SUCCEEDED |
> DP_BW_REQUEST_FAILED;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> index 1fd1ac8d556d..075aea9d6ede 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> @@ -296,6 +296,20 @@ bool intel_dp_tunnel_bw_alloc_is_enabled(struct
> intel_dp *intel_dp)
>  	return drm_dp_tunnel_bw_alloc_is_enabled(intel_dp->tunnel);
>  }
>  
> +/**
> + * intel_dp_tunnel_pr_optimization_supported - Query the PR BW
> optimization support
> + * @intel_dp: DP port object
> + *
> + * Query whether a DP tunnel is connected on @intel_dp and the
> tunnel supports
> + * the PR BW optimization.

How this is checking if DP tunnel is connected? To me it looks like it
is just checking if PR BW optimization is supported.

> + *
> + * Returns %true if the BW allocation mode is supported on
> @intel_dp.
> + */
> +bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp
> *intel_dp)
> +{
> +	return drm_dp_tunnel_pr_optimization_supported(intel_dp-
> >tunnel);
> +}

I would guess it is not ok to mix Intel specific and generic drm
changes into one patch.

Maybe you could add:

if (DISPLAY_VER(display) < 35)
	return false;

into here? Otherwise you need to modify check in patch 3 as:

if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) &&
    (DISPLAY_VER(display) < 35 ||
     !intel_dp_tunnel_pr_optimization_supported(intel_dp)))
    
	   BR,
Jouni Högander

> +
>  /**
>   * intel_dp_tunnel_suspend - Suspend a DP tunnel connected on a port
>   * @intel_dp: DP port object
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> index 7f0f720e8dca..03e147736b65 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> @@ -32,6 +32,7 @@ void intel_dp_tunnel_resume(struct intel_dp
> *intel_dp,
>  void intel_dp_tunnel_suspend(struct intel_dp *intel_dp);
>  
>  bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp);
> +bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp
> *intel_dp);
>  
>  void
>  intel_dp_tunnel_atomic_cleanup_inherited_state(struct
> intel_atomic_state *state);
> @@ -76,6 +77,11 @@ static inline bool
> intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp
>  	return false;
>  }
>  
> +static inline bool intel_dp_tunnel_pr_optimization_supported(struct
> intel_dp *intel_dp)
> +{
> +	return false;
> +}
> +
>  static inline void
>  intel_dp_tunnel_atomic_cleanup_inherited_state(struct
> intel_atomic_state *state) {}
>  
> diff --git a/include/drm/display/drm_dp_tunnel.h
> b/include/drm/display/drm_dp_tunnel.h
> index 87212c847915..4aa3ce9fd829 100644
> --- a/include/drm/display/drm_dp_tunnel.h
> +++ b/include/drm/display/drm_dp_tunnel.h
> @@ -53,6 +53,7 @@ int drm_dp_tunnel_destroy(struct drm_dp_tunnel
> *tunnel);
>  int drm_dp_tunnel_enable_bw_alloc(struct drm_dp_tunnel *tunnel);
>  int drm_dp_tunnel_disable_bw_alloc(struct drm_dp_tunnel *tunnel);
>  bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
> *tunnel);
> +bool drm_dp_tunnel_pr_optimization_supported(const struct
> drm_dp_tunnel *tunnel);
>  int drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw);
>  int drm_dp_tunnel_get_allocated_bw(struct drm_dp_tunnel *tunnel);
>  int drm_dp_tunnel_update_state(struct drm_dp_tunnel *tunnel);
> @@ -140,6 +141,11 @@ static inline bool
> drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
>  	return false;
>  }
>  
> +static inline bool drm_dp_tunnel_pr_optimization_supported(const
> struct drm_dp_tunnel *tunnel)
> +{
> +	return false;
> +}
> +
>  static inline int
>  drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw)
>  {

Re: [PATCH v7 2/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling

[Hogander, Jouni]

On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> Unused bandwidth can be used by external display agents for Panel
> Replay
> enabled DP panel during idleness with link on. Enable source to
> replace
> dummy data from the display with data from another agent by
> programming
> TRANS_DP2_CTL [Panel Replay Tunneling Enable].
> 
> v2:
> - Enable pr bw optimization along with panel replay enable. [Jani]
> 
> v3:
> - Write TRANS_DP2_CTL once for both bw optimization and panel replay
> enable. [Jani]
> 
> v4:
> - Read DPCD once in init() and store in panel_replay_caps. [Jouni]
> 
> v5:
> - Avoid reading DPCD for edp. [Jouni]
> - Use drm_dp_dpcd_read_byte() and some cosmetic changes. [Jani]
> 
> v6:
> - Extend the corresponding interface defined in drm_dp_tunnel.c
> to query the Panel Replay optimization capability. [Imre]
> 
> Bspec: 68920
> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 24
> +++++++++++++++++--
>  2 files changed, 23 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h
> b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 4746e9ebd920..dada8dc27ea4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -2263,6 +2263,7 @@
>  #define TRANS_DP2_CTL(trans)			_MMIO_TRANS(trans,
> _TRANS_DP2_CTL_A, _TRANS_DP2_CTL_B)
>  #define  TRANS_DP2_128B132B_CHANNEL_CODING	REG_BIT(31)
>  #define  TRANS_DP2_PANEL_REPLAY_ENABLE		REG_BIT(30)
> +#define  TRANS_DP2_PR_TUNNELING_ENABLE		REG_BIT(26)
>  #define  TRANS_DP2_DEBUG_ENABLE			REG_BIT(23)
>  
>  #define _TRANS_DP2_VFREQHIGH_A			0x600a4
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 5041a5a138d1..632527ede29f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -44,6 +44,7 @@
>  #include "intel_dmc.h"
>  #include "intel_dp.h"
>  #include "intel_dp_aux.h"
> +#include "intel_dp_tunnel.h"
>  #include "intel_dsb.h"
>  #include "intel_frontbuffer.h"
>  #include "intel_hdmi.h"
> @@ -1023,11 +1024,28 @@ static u8 frames_before_su_entry(struct
> intel_dp *intel_dp)
>  	return frames_before_su_entry;
>  }
>  
> +static bool intel_psr_allow_pr_bw_optimization(struct intel_dp
> *intel_dp)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +
> +	if (DISPLAY_VER(display) < 35)
> +		return false;

This is not necessary if you check it already at compute config.

> +
> +	if (!intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> +		return false;
> +
> +	if (!intel_dp_tunnel_pr_optimization_supported(intel_dp))
> +		return false;

You should move this patch after patch 3. Then you can drop this check.

> +
> +	return true;
> +}
> +
>  static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	struct intel_psr *psr = &intel_dp->psr;
>  	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> +	u32 dp2_ctl_val = TRANS_DP2_PANEL_REPLAY_ENABLE;
>  
>  	if (intel_dp_is_edp(intel_dp) && psr->sel_update_enabled) {
>  		u32 val = psr->su_region_et_enabled ?
> @@ -1040,12 +1058,14 @@ static void dg2_activate_panel_replay(struct
> intel_dp *intel_dp)
>  			       val);
>  	}
>  
> +	if (!intel_dp_is_edp(intel_dp) &&
> intel_psr_allow_pr_bw_optimization(intel_dp))
> +		dp2_ctl_val |= TRANS_DP2_PR_TUNNELING_ENABLE;

If you do modification I commented above you could just check
intel_dp_tunnel_bw_alloc_is_enabled here. No need to add
intel_psr_allow_pr_bw_optimization helper.

BR,

Jouni Högander

>  		     PSR2_MAN_TRK_CTL(display, intel_dp-
> >psr.transcoder),
>  		     0,
> ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
>  
> -	intel_de_rmw(display, TRANS_DP2_CTL(intel_dp-
> >psr.transcoder), 0,
> -		     TRANS_DP2_PANEL_REPLAY_ENABLE);
> +	intel_de_rmw(display, TRANS_DP2_CTL(intel_dp-
> >psr.transcoder), 0, dp2_ctl_val);
>  }
>  
>  static void hsw_activate_psr2(struct intel_dp *intel_dp)

✓ i915.CI.BAT: success for Panel Replay BW optimization

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1941 bytes --]

== Series Details ==

Series: Panel Replay BW optimization
URL   : https://patchwork.freedesktop.org/series/163079/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_18133 -> Patchwork_163079v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/index.html

Participating hosts (41 -> 39)
------------------------------

  Missing    (2): bat-dg2-13 fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_163079v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-9:         [PASS][1] -> [DMESG-FAIL][2] ([i915#12061]) +1 other test dmesg-fail
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/bat-mtlp-9/igt@i915_selftest@live@workarounds.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@workarounds:
    - bat-arls-6:         [DMESG-FAIL][3] ([i915#12061]) -> [PASS][4] +1 other test pass
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/bat-arls-6/igt@i915_selftest@live@workarounds.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/bat-arls-6/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061


Build changes
-------------

  * Linux: CI_DRM_18133 -> Patchwork_163079v1

  CI-20190529: 20190529
  CI_DRM_18133: 389757a158d828affd3a4c242b98ffac9646daf3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8797: 8797
  Patchwork_163079v1: 389757a158d828affd3a4c242b98ffac9646daf3 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/index.html

[-- Attachment #2: Type: text/html, Size: 2629 bytes --]

Re: [PATCH v7 0/3] Panel Replay BW optimization

[Hogander, Jouni]

On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> Unused bandwidth can be used by external display agents for Panel
> Replay
> enabled DP panel during idleness with link on. This patch series
> enabling the same.

Generic comment on this patch set. Maybe we should add one more patch
with "Fixes" tag:

Fixes: e60cff453b82 ("drm/i915/dp: Enable DP tunnel BW allocation
mode")
Cc: Imre Deak <imre.deak@intel.com>
Cc: <stable@vger.kernel.org> # v6.9+

This patch would just add:

if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) {
	drm_dbg_kms(display->drm,
		    "Panel Replay is disabled as DP tunneling
enabled\n");
	return false;
}

into _panel_replay_compute_config. this could be first patch in your
set. What do you think?

BR,
Jouni Högander

> 
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> 
> Animesh Manna (3):
>   drm/i915/display: Add drm helper to check pr optimization support
>   drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
>   drm/i915/display: Disable Panel Replay for DP-tunneling without
>     optimization
> 
>  drivers/gpu/drm/display/drm_dp_tunnel.c       | 17 ++++++++++
>  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
>  .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
>  .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
>  drivers/gpu/drm/i915/display/intel_psr.c      | 31
> +++++++++++++++++--
>  include/drm/display/drm_dp_tunnel.h           |  6 ++++
>  6 files changed, 73 insertions(+), 2 deletions(-)
> 

RE: [PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-tunneling without optimization

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, March 12, 2026 11:48 AM
> To: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Manna,
> Animesh <animesh.manna@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Deak, Imre <imre.deak@intel.com>
> Subject: Re: [PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-
> tunneling without optimization
> 
> On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > As per DP specification,
> >     The DP Source device may optionally enable PR optimization
> >     with DP tunneling. The device shall query the Tunneling Bridge’s
> >     PR tunneling optimization capability by way of the
> >     Panel_Replay_Tunneling_Optimization_Support bit in the
> >     DP_TUNNELING_CAPABILITIES register (DPCD E000Dh[6]), and then
> > enable PR
> >     only when the Tunneling Bridge is capable.
> >
> > Therefore, do not enable Panel Replay for DP tunneling when
> > optimization support is not available.
> >
> > Suggested-by: Jouni Högander <jouni.hogander@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 632527ede29f..3ec407a801b1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1796,6 +1796,13 @@ static bool
> > _panel_replay_compute_config(struct intel_crtc_state *crtc_state,
> >  	crtc_state->link_off_after_as_sdp_when_pr_active =
> > compute_link_off_after_as_sdp_when_pr_active(connector);
> >  	crtc_state->disable_as_sdp_when_pr_active =
> > compute_disable_as_sdp_when_pr_active(connector);
> >
> > +	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) &&
> > +	    !intel_dp_tunnel_pr_optimization_supported(intel_dp)) {
> > +		drm_dbg_kms(display->drm,
> > +			    "Panel Replay is disabled as DP
> > tunelling enabled without
> 
> typo tunelling vs. tunneling. How about:
> 
> "Panel Replay is disabled as DP tunnelling PR optimization not supported."
> 
> ?
Sure, will modify in next version.

Regards,
Animesh
> 
> BR,
> Jouni Högander
> 
> > optimization\n");
> > +		return false;
> > +	}
> > +
> >  	if (!intel_dp_is_edp(intel_dp))
> >  		return true;
> >

RE: [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr optimization support

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, March 12, 2026 12:10 PM
> To: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Manna,
> Animesh <animesh.manna@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Deak, Imre <imre.deak@intel.com>
> Subject: Re: [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr
> optimization support
> 
> On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > Add api to check panel replay optimization supported or not to
> > drm-core DP tunneling framework which can be used by other driver as
> > well.
> >
> > Suggested-by: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/display/drm_dp_tunnel.c        | 17
> > +++++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_dp_tunnel.c | 14 ++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_dp_tunnel.h |  6 ++++++
> >  include/drm/display/drm_dp_tunnel.h            |  6 ++++++
> >  4 files changed, 43 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/display/drm_dp_tunnel.c
> > b/drivers/gpu/drm/display/drm_dp_tunnel.c
> > index f442430d8de7..39c07cb4123b 100644
> > --- a/drivers/gpu/drm/display/drm_dp_tunnel.c
> > +++ b/drivers/gpu/drm/display/drm_dp_tunnel.c
> > @@ -149,6 +149,7 @@ struct drm_dp_tunnel {
> >  	bool bw_alloc_enabled:1;
> >  	bool has_io_error:1;
> >  	bool destroyed:1;
> > +	bool pr_optimization_support:1;
> >  };
> >
> >  struct drm_dp_tunnel_group_state;
> > @@ -508,6 +509,8 @@ create_tunnel(struct drm_dp_tunnel_mgr *mgr,
> >
> >  	tunnel->bw_alloc_supported =
> > tunnel_reg_bw_alloc_supported(regs);
> >  	tunnel->bw_alloc_enabled =
> > tunnel_reg_bw_alloc_enabled(regs);
> > +	tunnel->pr_optimization_support = tunnel_reg(regs,
> > DP_TUNNELING_CAPABILITIES) &
> > +
> > DP_PANEL_REPLAY_OPTIMIZATION_SUPPORT;
> >
> >  	if (!add_tunnel_to_group(mgr, drv_group_id, tunnel)) {
> >  		kfree(tunnel);
> > @@ -1036,6 +1039,20 @@ bool
> drm_dp_tunnel_bw_alloc_is_enabled(const
> > struct drm_dp_tunnel *tunnel)
> >  }
> >  EXPORT_SYMBOL(drm_dp_tunnel_bw_alloc_is_enabled);
> >
> > +/**
> > + * drm_dp_tunnel_pr_optimization_supported - Query the PR BW
> > optimization support
> > + * @tunnel: Tunnel object
> > + *
> > + * Query if the PR BW optimization is supported for @tunnel.
> > + *
> > + * Returns %true if the PR BW optimiation is supported for @tunnel.
> > + */
> > +bool drm_dp_tunnel_pr_optimization_supported(const struct
> > drm_dp_tunnel *tunnel)
> > +{
> > +	return tunnel && tunnel->pr_optimization_support; }
> > +EXPORT_SYMBOL(drm_dp_tunnel_pr_optimization_supported);
> > +
> >  static int clear_bw_req_state(struct drm_dp_aux *aux)
> >  {
> >  	u8 bw_req_mask = DP_BW_REQUEST_SUCCEEDED |
> DP_BW_REQUEST_FAILED;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > index 1fd1ac8d556d..075aea9d6ede 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.c
> > @@ -296,6 +296,20 @@ bool intel_dp_tunnel_bw_alloc_is_enabled(struct
> > intel_dp *intel_dp)
> >  	return drm_dp_tunnel_bw_alloc_is_enabled(intel_dp->tunnel);
> >  }
> >
> > +/**
> > + * intel_dp_tunnel_pr_optimization_supported - Query the PR BW
> > optimization support
> > + * @intel_dp: DP port object
> > + *
> > + * Query whether a DP tunnel is connected on @intel_dp and the
> > tunnel supports
> > + * the PR BW optimization.
> 
> How this is checking if DP tunnel is connected? To me it looks like it is just
> checking if PR BW optimization is supported.
> 
> > + *
> > + * Returns %true if the BW allocation mode is supported on
> > @intel_dp.
> > + */
> > +bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp
> > *intel_dp)
> > +{
> > +	return drm_dp_tunnel_pr_optimization_supported(intel_dp-
> > >tunnel);
> > +}
> 
> I would guess it is not ok to mix Intel specific and generic drm changes into
> one patch.

Sure, will split in different patch.

> 
> Maybe you could add:
> 
> if (DISPLAY_VER(display) < 35)
> 	return false;
> 
> into here? Otherwise you need to modify check in patch 3 as:
> 
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) &&
>     (DISPLAY_VER(display) < 35 ||
>      !intel_dp_tunnel_pr_optimization_supported(intel_dp)))
>

Sure, will add in intel_dp_tunnel_pr_optimization_supported().

Regards,
Animesh
 
> 	   BR,
> Jouni Högander
> 
> > +
> >  /**
> >   * intel_dp_tunnel_suspend - Suspend a DP tunnel connected on a port
> >   * @intel_dp: DP port object
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > index 7f0f720e8dca..03e147736b65 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> > @@ -32,6 +32,7 @@ void intel_dp_tunnel_resume(struct intel_dp
> > *intel_dp,
> >  void intel_dp_tunnel_suspend(struct intel_dp *intel_dp);
> >
> >  bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp);
> > +bool intel_dp_tunnel_pr_optimization_supported(struct intel_dp
> > *intel_dp);
> >
> >  void
> >  intel_dp_tunnel_atomic_cleanup_inherited_state(struct
> > intel_atomic_state *state);
> > @@ -76,6 +77,11 @@ static inline bool
> > intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp
> >  	return false;
> >  }
> >
> > +static inline bool intel_dp_tunnel_pr_optimization_supported(struct
> > intel_dp *intel_dp)
> > +{
> > +	return false;
> > +}
> > +
> >  static inline void
> >  intel_dp_tunnel_atomic_cleanup_inherited_state(struct
> > intel_atomic_state *state) {}
> >
> > diff --git a/include/drm/display/drm_dp_tunnel.h
> > b/include/drm/display/drm_dp_tunnel.h
> > index 87212c847915..4aa3ce9fd829 100644
> > --- a/include/drm/display/drm_dp_tunnel.h
> > +++ b/include/drm/display/drm_dp_tunnel.h
> > @@ -53,6 +53,7 @@ int drm_dp_tunnel_destroy(struct drm_dp_tunnel
> > *tunnel);
> >  int drm_dp_tunnel_enable_bw_alloc(struct drm_dp_tunnel *tunnel);
> >  int drm_dp_tunnel_disable_bw_alloc(struct drm_dp_tunnel *tunnel);
> >  bool drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
> > *tunnel);
> > +bool drm_dp_tunnel_pr_optimization_supported(const struct
> > drm_dp_tunnel *tunnel);
> >  int drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw);
> >  int drm_dp_tunnel_get_allocated_bw(struct drm_dp_tunnel *tunnel);
> >  int drm_dp_tunnel_update_state(struct drm_dp_tunnel *tunnel); @@
> > -140,6 +141,11 @@ static inline bool
> > drm_dp_tunnel_bw_alloc_is_enabled(const struct drm_dp_tunnel
> >  	return false;
> >  }
> >
> > +static inline bool drm_dp_tunnel_pr_optimization_supported(const
> > struct drm_dp_tunnel *tunnel)
> > +{
> > +	return false;
> > +}
> > +
> >  static inline int
> >  drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw)
> >  {

RE: [PATCH v7 0/3] Panel Replay BW optimization

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, March 12, 2026 1:36 PM
> To: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Manna,
> Animesh <animesh.manna@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Deak, Imre <imre.deak@intel.com>
> Subject: Re: [PATCH v7 0/3] Panel Replay BW optimization
> 
> On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > Unused bandwidth can be used by external display agents for Panel
> > Replay enabled DP panel during idleness with link on. This patch
> > series enabling the same.
> 
> Generic comment on this patch set. Maybe we should add one more patch
> with "Fixes" tag:
> 
> Fixes: e60cff453b82 ("drm/i915/dp: Enable DP tunnel BW allocation
> mode")
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: <stable@vger.kernel.org> # v6.9+
> 
> This patch would just add:
> 
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) {
> 	drm_dbg_kms(display->drm,
> 		    "Panel Replay is disabled as DP tunneling enabled\n");
> 	return false;
> }
> 
> into _panel_replay_compute_config. this could be first patch in your set.
> What do you think?
Ok to me. Will take care in next version.

Regards,
Animesh
> 
> BR,
> Jouni Högander
> 
> >
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> >
> > Animesh Manna (3):
> >   drm/i915/display: Add drm helper to check pr optimization support
> >   drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
> >   drm/i915/display: Disable Panel Replay for DP-tunneling without
> >     optimization
> >
> >  drivers/gpu/drm/display/drm_dp_tunnel.c       | 17 ++++++++++
> >  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
> >  .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
> >  .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
> >  drivers/gpu/drm/i915/display/intel_psr.c      | 31
> > +++++++++++++++++--
> >  include/drm/display/drm_dp_tunnel.h           |  6 ++++
> >  6 files changed, 73 insertions(+), 2 deletions(-)
> >

RE: [PATCH v7 2/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, March 12, 2026 12:15 PM
> To: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Manna,
> Animesh <animesh.manna@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Deak, Imre <imre.deak@intel.com>
> Subject: Re: [PATCH v7 2/3] drm/i915/display: Panel Replay BW optimization
> for DP2.0 tunneling
> 
> On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > Unused bandwidth can be used by external display agents for Panel
> > Replay enabled DP panel during idleness with link on. Enable source to
> > replace dummy data from the display with data from another agent by
> > programming TRANS_DP2_CTL [Panel Replay Tunneling Enable].
> >
> > v2:
> > - Enable pr bw optimization along with panel replay enable. [Jani]
> >
> > v3:
> > - Write TRANS_DP2_CTL once for both bw optimization and panel replay
> > enable. [Jani]
> >
> > v4:
> > - Read DPCD once in init() and store in panel_replay_caps. [Jouni]
> >
> > v5:
> > - Avoid reading DPCD for edp. [Jouni]
> > - Use drm_dp_dpcd_read_byte() and some cosmetic changes. [Jani]
> >
> > v6:
> > - Extend the corresponding interface defined in drm_dp_tunnel.c to
> > query the Panel Replay optimization capability. [Imre]
> >
> > Bspec: 68920
> > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
> >  drivers/gpu/drm/i915/display/intel_psr.c      | 24
> > +++++++++++++++++--
> >  2 files changed, 23 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > index 4746e9ebd920..dada8dc27ea4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > @@ -2263,6 +2263,7 @@
> >  #define TRANS_DP2_CTL(trans)			_MMIO_TRANS(trans,
> > _TRANS_DP2_CTL_A, _TRANS_DP2_CTL_B)
> >  #define  TRANS_DP2_128B132B_CHANNEL_CODING	REG_BIT(31)
> >  #define  TRANS_DP2_PANEL_REPLAY_ENABLE		REG_BIT(30)
> > +#define  TRANS_DP2_PR_TUNNELING_ENABLE		REG_BIT(26)
> >  #define  TRANS_DP2_DEBUG_ENABLE			REG_BIT(23)
> >
> >  #define _TRANS_DP2_VFREQHIGH_A			0x600a4
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 5041a5a138d1..632527ede29f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -44,6 +44,7 @@
> >  #include "intel_dmc.h"
> >  #include "intel_dp.h"
> >  #include "intel_dp_aux.h"
> > +#include "intel_dp_tunnel.h"
> >  #include "intel_dsb.h"
> >  #include "intel_frontbuffer.h"
> >  #include "intel_hdmi.h"
> > @@ -1023,11 +1024,28 @@ static u8 frames_before_su_entry(struct
> > intel_dp *intel_dp)
> >  	return frames_before_su_entry;
> >  }
> >
> > +static bool intel_psr_allow_pr_bw_optimization(struct intel_dp
> > *intel_dp)
> > +{
> > +	struct intel_display *display = to_intel_display(intel_dp);
> > +
> > +	if (DISPLAY_VER(display) < 35)
> > +		return false;
> 
> This is not necessary if you check it already at compute config.
> 
> > +
> > +	if (!intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> > +		return false;
> > +
> > +	if (!intel_dp_tunnel_pr_optimization_supported(intel_dp))
> > +		return false;
> 
> You should move this patch after patch 3. Then you can drop this check.
> 
> > +
> > +	return true;
> > +}
> > +
> >  static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
> >  {
> >  	struct intel_display *display = to_intel_display(intel_dp);
> >  	struct intel_psr *psr = &intel_dp->psr;
> >  	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> > +	u32 dp2_ctl_val = TRANS_DP2_PANEL_REPLAY_ENABLE;
> >
> >  	if (intel_dp_is_edp(intel_dp) && psr->sel_update_enabled) {
> >  		u32 val = psr->su_region_et_enabled ?
> > @@ -1040,12 +1058,14 @@ static void dg2_activate_panel_replay(struct
> > intel_dp *intel_dp)
> >  			       val);
> >  	}
> >
> > +	if (!intel_dp_is_edp(intel_dp) &&
> > intel_psr_allow_pr_bw_optimization(intel_dp))
> > +		dp2_ctl_val |= TRANS_DP2_PR_TUNNELING_ENABLE;
> 
> If you do modification I commented above you could just check
> intel_dp_tunnel_bw_alloc_is_enabled here. No need to add
> intel_psr_allow_pr_bw_optimization helper.

Sure, will check on this.

Regards,
Animesh
> 
> BR,
> 
> Jouni Högander
> 
> >  		     PSR2_MAN_TRK_CTL(display, intel_dp-
> > >psr.transcoder),
> >  		     0,
> > ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
> >
> > -	intel_de_rmw(display, TRANS_DP2_CTL(intel_dp-
> > >psr.transcoder), 0,
> > -		     TRANS_DP2_PANEL_REPLAY_ENABLE);
> > +	intel_de_rmw(display, TRANS_DP2_CTL(intel_dp-
> > >psr.transcoder), 0, dp2_ctl_val);
> >  }
> >
> >  static void hsw_activate_psr2(struct intel_dp *intel_dp)

Re: [PATCH v7 0/3] Panel Replay BW optimization

[Imre Deak]

On Thu, Mar 12, 2026 at 10:05:35AM +0200, Hogander, Jouni wrote:
> On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > Unused bandwidth can be used by external display agents for Panel
> > Replay
> > enabled DP panel during idleness with link on. This patch series
> > enabling the same.
> 
> Generic comment on this patch set. Maybe we should add one more patch
> with "Fixes" tag:
> 
> Fixes: e60cff453b82 ("drm/i915/dp: Enable DP tunnel BW allocation mode")
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: <stable@vger.kernel.org> # v6.9+

Why? As I understand the Panel Replay BW optimization on a DP tunneled
link is an _optional_ feature, whereby the free BW can be used by the
Thunderbolt protocol for other purposes than for the given display
stream for which Panel Replay is enabled. IOW, it looks to me a valid
configuration to enable Panel Replay on a DP tunneled link without
enabling the Panel Replay BW optimization on it.

> This patch would just add:
> 
> if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) {
> 	drm_dbg_kms(display->drm,
> 		    "Panel Replay is disabled as DP tunneling enabled\n");
> 	return false;
> }
> 
> into _panel_replay_compute_config. this could be first patch in your
> set. What do you think?
> 
> BR,
> Jouni Högander
> 
> > 
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > 
> > Animesh Manna (3):
> >   drm/i915/display: Add drm helper to check pr optimization support
> >   drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
> >   drm/i915/display: Disable Panel Replay for DP-tunneling without
> >     optimization
> > 
> >  drivers/gpu/drm/display/drm_dp_tunnel.c       | 17 ++++++++++
> >  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
> >  .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
> >  .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
> >  drivers/gpu/drm/i915/display/intel_psr.c      | 31
> > +++++++++++++++++--
> >  include/drm/display/drm_dp_tunnel.h           |  6 ++++
> >  6 files changed, 73 insertions(+), 2 deletions(-)
> > 
> 

✓ i915.CI.Full: success for Panel Replay BW optimization

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 94013 bytes --]

== Series Details ==

Series: Panel Replay BW optimization
URL   : https://patchwork.freedesktop.org/series/163079/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_18133_full -> Patchwork_163079v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in Patchwork_163079v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@device_reset@cold-reset-bound:
    - shard-tglu:         NOTRUN -> [SKIP][1] ([i915#11078])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@device_reset@cold-reset-bound.html

  * igt@drm_buddy@drm_buddy:
    - shard-tglu-1:       NOTRUN -> [SKIP][2] ([i915#15678])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@drm_buddy@drm_buddy.html

  * igt@gem_bad_reloc@negative-reloc-lut:
    - shard-rkl:          NOTRUN -> [SKIP][3] ([i915#3281]) +9 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@gem_bad_reloc@negative-reloc-lut.html

  * igt@gem_basic@multigpu-create-close:
    - shard-tglu:         NOTRUN -> [SKIP][4] ([i915#7697])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@gem_basic@multigpu-create-close.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-tglu-1:       NOTRUN -> [SKIP][5] ([i915#3555] / [i915#9323])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-tglu:         NOTRUN -> [SKIP][6] ([i915#3555] / [i915#9323])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-tglu-1:       NOTRUN -> [SKIP][7] ([i915#9323])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_ccs@large-ctrl-surf-copy:
    - shard-tglu:         NOTRUN -> [SKIP][8] ([i915#13008])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@gem_ccs@large-ctrl-surf-copy.html

  * igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-lmem0-lmem0:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][9] ([i915#12392] / [i915#13356])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-5/igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-rkl:          NOTRUN -> [SKIP][10] ([i915#7697]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_ctx_param@set-priority-not-supported:
    - shard-tglu-1:       NOTRUN -> [SKIP][11] +32 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_ctx_param@set-priority-not-supported.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-tglu-1:       NOTRUN -> [SKIP][12] ([i915#280])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-rkl:          NOTRUN -> [SKIP][13] ([i915#280])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_exec_balancer@parallel:
    - shard-tglu:         NOTRUN -> [SKIP][14] ([i915#4525]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@gem_exec_balancer@parallel.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-tglu-1:       NOTRUN -> [SKIP][15] ([i915#4525]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-rkl:          NOTRUN -> [SKIP][16] ([i915#4525]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_capture@capture-invisible:
    - shard-glk11:        NOTRUN -> [SKIP][17] ([i915#6334]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk11/igt@gem_exec_capture@capture-invisible.html

  * igt@gem_exec_capture@capture-invisible@smem0:
    - shard-tglu-1:       NOTRUN -> [SKIP][18] ([i915#6334]) +1 other test skip
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_exec_capture@capture-invisible@smem0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-rkl:          [PASS][19] -> [ABORT][20] ([i915#7975]) +1 other test abort
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-8/igt@gem_exec_suspend@basic-s4-devices.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_lmem_swapping@massive-random:
    - shard-glk:          NOTRUN -> [SKIP][21] ([i915#4613]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk4/igt@gem_lmem_swapping@massive-random.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-tglu-1:       NOTRUN -> [SKIP][22] ([i915#4613]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][23] ([i915#4613]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@gem_lmem_swapping@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@verify-random-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][24] ([i915#4613]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@gem_lmem_swapping@verify-random-ccs.html

  * igt@gem_madvise@dontneed-before-pwrite:
    - shard-rkl:          NOTRUN -> [SKIP][25] ([i915#3282]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@gem_madvise@dontneed-before-pwrite.html

  * igt@gem_media_vme:
    - shard-tglu-1:       NOTRUN -> [SKIP][26] ([i915#284])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gem_media_vme.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-xy:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#4077]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-rkl:          NOTRUN -> [SKIP][28] ([i915#8411])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_softpin@noreloc-s3:
    - shard-rkl:          [PASS][29] -> [INCOMPLETE][30] ([i915#13809])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-7/igt@gem_softpin@noreloc-s3.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@gem_softpin@noreloc-s3.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-rkl:          NOTRUN -> [SKIP][31] ([i915#3297]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@gem_userptr_blits@coherency-sync.html
    - shard-tglu:         NOTRUN -> [SKIP][32] ([i915#3297]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-rkl:          [PASS][33] -> [INCOMPLETE][34] ([i915#13356])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@gem_workarounds@suspend-resume-context.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-rkl:          NOTRUN -> [SKIP][35] ([i915#2527])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@gen9_exec_parse@bb-oversize.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-tglu:         NOTRUN -> [SKIP][36] ([i915#2527] / [i915#2856]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@gen9_exec_parse@secure-batches.html

  * igt@gen9_exec_parse@valid-registers:
    - shard-tglu-1:       NOTRUN -> [SKIP][37] ([i915#2527] / [i915#2856])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@gen9_exec_parse@valid-registers.html

  * igt@i915_drm_fdinfo@all-busy-idle-check-all:
    - shard-dg2:          NOTRUN -> [SKIP][38] ([i915#14123])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@i915_drm_fdinfo@all-busy-idle-check-all.html

  * igt@i915_pm_freq_api@freq-basic-api:
    - shard-rkl:          NOTRUN -> [SKIP][39] ([i915#8399])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@i915_pm_freq_api@freq-basic-api.html
    - shard-tglu:         NOTRUN -> [SKIP][40] ([i915#8399])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@i915_pm_freq_api@freq-basic-api.html

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-tglu:         [PASS][41] -> [WARN][42] ([i915#13790] / [i915#2681]) +1 other test warn
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-fence.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-rkl:          NOTRUN -> [SKIP][43] ([i915#5723])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@i915_query@test-query-geometry-subslices.html

  * igt@i915_selftest@live@workarounds:
    - shard-dg2:          [PASS][44] -> [DMESG-FAIL][45] ([i915#12061]) +1 other test dmesg-fail
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg2-6/igt@i915_selftest@live@workarounds.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-7/igt@i915_selftest@live@workarounds.html

  * igt@i915_suspend@debugfs-reader:
    - shard-glk:          NOTRUN -> [INCOMPLETE][46] ([i915#4817])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk1/igt@i915_suspend@debugfs-reader.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][47] ([i915#4817])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk11/igt@i915_suspend@fence-restore-untiled.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-rkl:          NOTRUN -> [SKIP][48] ([i915#12454] / [i915#12712])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
    - shard-tglu:         NOTRUN -> [SKIP][49] ([i915#12454] / [i915#12712])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-glk:          NOTRUN -> [INCOMPLETE][50] ([i915#12761]) +1 other test incomplete
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk4/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-dg2:          [PASS][51] -> [FAIL][52] ([i915#5956]) +1 other test fail
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-tglu-1:       NOTRUN -> [SKIP][53] ([i915#1769] / [i915#3555])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-glk:          NOTRUN -> [SKIP][54] ([i915#1769])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
    - shard-tglu:         NOTRUN -> [SKIP][55] ([i915#1769] / [i915#3555])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
    - shard-tglu-1:       NOTRUN -> [SKIP][56] ([i915#5286]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-addfb-size-overflow:
    - shard-rkl:          NOTRUN -> [SKIP][57] ([i915#5286]) +3 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_big_fb@4-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-tglu:         NOTRUN -> [SKIP][58] ([i915#5286]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][59] ([i915#3638])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-tglu-1:       NOTRUN -> [SKIP][60] ([i915#3828])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#10307] / [i915#10434] / [i915#6095])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-4/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][62] ([i915#14098] / [i915#6095]) +32 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][63] ([i915#6095]) +44 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][64] ([i915#12313]) +1 other test skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][65] ([i915#12313]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][66] ([i915#6095]) +39 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][67] ([i915#6095]) +41 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][68] ([i915#6095]) +15 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][69] ([i915#10307] / [i915#6095]) +14 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-4/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][70] ([i915#6095]) +267 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-13/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_cdclk@mode-transition:
    - shard-glk:          NOTRUN -> [SKIP][71] +233 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk1/igt@kms_cdclk@mode-transition.html
    - shard-tglu:         NOTRUN -> [SKIP][72] ([i915#3742]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-tglu:         NOTRUN -> [SKIP][73] ([i915#11151] / [i915#7828]) +4 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - shard-rkl:          NOTRUN -> [SKIP][74] ([i915#11151] / [i915#7828]) +4 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-tglu-1:       NOTRUN -> [SKIP][75] ([i915#11151] / [i915#7828]) +2 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_content_protection@atomic:
    - shard-rkl:          NOTRUN -> [SKIP][76] ([i915#6944] / [i915#7118] / [i915#9424]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-tglu:         NOTRUN -> [SKIP][77] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-tglu-1:       NOTRUN -> [SKIP][78] ([i915#6944])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@content-type-change:
    - shard-rkl:          NOTRUN -> [SKIP][79] ([i915#6944] / [i915#9424])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@kms_content_protection@content-type-change.html
    - shard-tglu:         NOTRUN -> [SKIP][80] ([i915#6944] / [i915#9424])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-dg2:          NOTRUN -> [SKIP][81] ([i915#15330] / [i915#3299])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@kms_content_protection@dp-mst-lic-type-1.html
    - shard-rkl:          NOTRUN -> [SKIP][82] ([i915#15330] / [i915#3116])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-5/igt@kms_content_protection@dp-mst-lic-type-1.html
    - shard-tglu-1:       NOTRUN -> [SKIP][83] ([i915#15330] / [i915#3116] / [i915#3299])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@lic-type-0-hdcp14:
    - shard-rkl:          NOTRUN -> [SKIP][84] ([i915#6944])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_content_protection@lic-type-0-hdcp14.html

  * igt@kms_content_protection@srm:
    - shard-tglu:         NOTRUN -> [SKIP][85] ([i915#6944] / [i915#7116] / [i915#7118])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-rkl:          NOTRUN -> [SKIP][86] ([i915#13049]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-tglu-1:       NOTRUN -> [SKIP][87] ([i915#3555]) +3 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-tglu-1:       NOTRUN -> [SKIP][88] ([i915#13049]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][89] ([i915#4103])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-glk10:        NOTRUN -> [SKIP][90] +55 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk10/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-tglu:         NOTRUN -> [SKIP][91] ([i915#9723])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-rkl:          NOTRUN -> [SKIP][92] ([i915#13749])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-tglu-1:       NOTRUN -> [SKIP][93] ([i915#13748])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-rkl:          NOTRUN -> [SKIP][94] ([i915#13748])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-tglu:         NOTRUN -> [SKIP][95] ([i915#13707])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-rkl:          NOTRUN -> [SKIP][96] ([i915#3840])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-tglu:         NOTRUN -> [SKIP][97] ([i915#3840] / [i915#9053])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-tglu:         NOTRUN -> [SKIP][98] ([i915#9337])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr1:
    - shard-rkl:          NOTRUN -> [SKIP][99] ([i915#658])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][100] ([i915#12745] / [i915#4839])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk10/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][101] ([i915#4839])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk10/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-tglu:         NOTRUN -> [SKIP][102] ([i915#3637] / [i915#9934]) +2 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          NOTRUN -> [SKIP][103] ([i915#9934]) +2 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-tglu-1:       NOTRUN -> [SKIP][104] ([i915#3637] / [i915#9934]) +2 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][105] ([i915#15643]) +1 other test skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][106] ([i915#15643] / [i915#5190])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#15643]) +6 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][108] ([i915#15643]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-mtlp:         [PASS][109] -> [SKIP][110] ([i915#15672]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-mtlp-3/igt@kms_force_connector_basic@prune-stale-modes.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-mtlp-1/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][111] ([i915#10056])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk10/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][112] ([i915#5439])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][113] ([i915#15102]) +2 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#15102] / [i915#3458])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-tglu:         NOTRUN -> [SKIP][115] ([i915#5439])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-blt:
    - shard-tglu:         NOTRUN -> [SKIP][116] ([i915#15102]) +15 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff:
    - shard-glk11:        NOTRUN -> [SKIP][117] +75 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk11/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][118] ([i915#5354]) +2 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][119] ([i915#1825]) +30 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-tglu-1:       NOTRUN -> [SKIP][120] ([i915#15102]) +12 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#15102] / [i915#3023]) +11 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-tglu:         NOTRUN -> [SKIP][122] ([i915#12713])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@invalid-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][123] ([i915#3555] / [i915#8228])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-tglu-1:       NOTRUN -> [SKIP][124] ([i915#15458])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][125] ([i915#13688])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-rkl:          NOTRUN -> [SKIP][126] +11 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html

  * igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][127] +29 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-tglu:         NOTRUN -> [SKIP][128] ([i915#14712])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
    - shard-rkl:          NOTRUN -> [SKIP][129] ([i915#14712])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping:
    - shard-rkl:          NOTRUN -> [SKIP][130] ([i915#15709]) +3 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html
    - shard-tglu:         NOTRUN -> [SKIP][131] ([i915#15709]) +2 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping:
    - shard-tglu-1:       NOTRUN -> [SKIP][132] ([i915#15709]) +1 other test skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@plane-panning-bottom-right-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][133] ([i915#13026]) +1 other test incomplete
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk8/igt@kms_plane@plane-panning-bottom-right-suspend.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb:
    - shard-glk11:        NOTRUN -> [FAIL][134] ([i915#10647] / [i915#12177])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk11/igt@kms_plane_alpha_blend@alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
    - shard-glk11:        NOTRUN -> [FAIL][135] ([i915#10647]) +1 other test fail
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk11/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][136] ([i915#13958])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-tglu-1:       NOTRUN -> [SKIP][137] ([i915#13958])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-tglu:         NOTRUN -> [SKIP][138] ([i915#14259]) +1 other test skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([i915#15329]) +3 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][140] ([i915#15329]) +9 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-rkl:          NOTRUN -> [SKIP][141] ([i915#5354])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         NOTRUN -> [FAIL][142] ([i915#15752])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-tglu:         NOTRUN -> [SKIP][143] ([i915#9685])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-dg2:          NOTRUN -> [SKIP][144] ([i915#15073])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-rkl:          [PASS][145] -> [SKIP][146] ([i915#15073]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-2/igt@kms_pm_rpm@modeset-lpsp.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-4/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-tglu:         NOTRUN -> [SKIP][147] ([i915#15073])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-dg1:          [PASS][148] -> [SKIP][149] ([i915#15073])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-18/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-14/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@system-suspend-modeset:
    - shard-rkl:          [PASS][150] -> [ABORT][151] ([i915#15132])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-3/igt@kms_pm_rpm@system-suspend-modeset.html
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_pm_rpm@system-suspend-modeset.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-tglu-1:       NOTRUN -> [SKIP][152] ([i915#6524])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_prime@d3hot:
    - shard-tglu:         NOTRUN -> [SKIP][153] ([i915#6524])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-glk10:        NOTRUN -> [SKIP][154] ([i915#11520]) +1 other test skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk10/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-tglu:         NOTRUN -> [SKIP][155] ([i915#11520]) +7 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
    - shard-tglu-1:       NOTRUN -> [SKIP][156] ([i915#11520]) +4 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-rkl:          NOTRUN -> [SKIP][157] ([i915#11520]) +6 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf:
    - shard-glk:          NOTRUN -> [SKIP][158] ([i915#11520]) +8 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk3/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area:
    - shard-glk11:        NOTRUN -> [SKIP][159] ([i915#11520]) +2 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk11/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-rkl:          NOTRUN -> [SKIP][160] ([i915#9683])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-sprite-plane-onoff:
    - shard-tglu-1:       NOTRUN -> [SKIP][161] ([i915#9732]) +8 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_psr@fbc-pr-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-cursor-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][162] ([i915#1072] / [i915#9732]) +1 other test skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@kms_psr@fbc-psr2-cursor-mmap-cpu.html

  * igt@kms_psr@fbc-psr2-primary-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][163] ([i915#9732]) +11 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_psr@fbc-psr2-primary-mmap-gtt.html

  * igt@kms_psr@psr2-cursor-blt:
    - shard-rkl:          NOTRUN -> [SKIP][164] ([i915#1072] / [i915#9732]) +18 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_psr@psr2-cursor-blt.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][165] ([i915#15500])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk11/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#5289])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-tglu-1:       NOTRUN -> [SKIP][167] ([i915#5289])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-rkl:          NOTRUN -> [ABORT][168] ([i915#13179]) +1 other test abort
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_selftest@drm_framebuffer.html
    - shard-glk:          NOTRUN -> [ABORT][169] ([i915#13179]) +1 other test abort
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk4/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-rkl:          NOTRUN -> [SKIP][170] ([i915#3555]) +3 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@kms_setmode@basic-clone-single-crtc.html
    - shard-tglu:         NOTRUN -> [SKIP][171] ([i915#3555]) +3 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-tglu:         NOTRUN -> [SKIP][172] ([i915#8623])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flipline:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#15243] / [i915#3555])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@kms_vrr@flipline.html

  * igt@kms_vrr@negative-basic:
    - shard-tglu-1:       NOTRUN -> [SKIP][174] ([i915#3555] / [i915#9906])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-1/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-tglu:         NOTRUN -> [SKIP][175] ([i915#9906])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@perf@per-context-mode-unprivileged:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#2435])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@perf@per-context-mode-unprivileged.html

  * igt@perf@polling@0-rcs0:
    - shard-rkl:          [PASS][177] -> [FAIL][178] ([i915#10538]) +1 other test fail
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-7/igt@perf@polling@0-rcs0.html
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-4/igt@perf@polling@0-rcs0.html

  * igt@perf_pmu@module-unload:
    - shard-rkl:          NOTRUN -> [ABORT][179] ([i915#15778])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@perf_pmu@module-unload.html
    - shard-tglu:         NOTRUN -> [ABORT][180] ([i915#15778])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@perf_pmu@module-unload.html

  * igt@perf_pmu@rc6-suspend:
    - shard-rkl:          [PASS][181] -> [INCOMPLETE][182] ([i915#13520])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-2/igt@perf_pmu@rc6-suspend.html
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-4/igt@perf_pmu@rc6-suspend.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-rkl:          NOTRUN -> [SKIP][183] ([i915#8516])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-1/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@fence-read-hang:
    - shard-rkl:          NOTRUN -> [SKIP][184] ([i915#3708])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@prime_vgem@fence-read-hang.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - shard-rkl:          NOTRUN -> [SKIP][185] ([i915#9917])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@sriov_basic@enable-vfs-autoprobe-off.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s0:
    - shard-dg2:          [INCOMPLETE][186] ([i915#13356]) -> [PASS][187] +2 other tests pass
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg2-1/igt@gem_exec_suspend@basic-s0.html
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-6/igt@gem_exec_suspend@basic-s0.html
    - shard-rkl:          [ABORT][188] ([i915#15131]) -> [PASS][189] +1 other test pass
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-1/igt@gem_exec_suspend@basic-s0.html
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-5/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-rkl:          [INCOMPLETE][190] ([i915#13356]) -> [PASS][191] +1 other test pass
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-3/igt@gem_exec_suspend@basic-s3.html
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_lmem_swapping@smem-oom:
    - shard-dg1:          [FAIL][192] ([i915#15734]) -> [PASS][193]
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-16/igt@gem_lmem_swapping@smem-oom.html
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-14/igt@gem_lmem_swapping@smem-oom.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [CRASH][194] ([i915#5493]) -> [PASS][195]
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-14/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@i915_module_load@load:
    - shard-tglu:         ([PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [SKIP][217]) ([i915#14785]) -> ([PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237], [PASS][238], [PASS][239])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-10/igt@i915_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-10/igt@i915_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-2/igt@i915_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-2/igt@i915_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-2/igt@i915_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-3/igt@i915_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-3/igt@i915_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-4/igt@i915_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-4/igt@i915_module_load@load.html
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-5/igt@i915_module_load@load.html
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-5/igt@i915_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-6/igt@i915_module_load@load.html
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-6/igt@i915_module_load@load.html
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-6/igt@i915_module_load@load.html
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-7/igt@i915_module_load@load.html
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-7/igt@i915_module_load@load.html
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-7/igt@i915_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-8/igt@i915_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-8/igt@i915_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-8/igt@i915_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-9/igt@i915_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-9/igt@i915_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-10/igt@i915_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-10/igt@i915_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-2/igt@i915_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-2/igt@i915_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-3/igt@i915_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-3/igt@i915_module_load@load.html
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@i915_module_load@load.html
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@i915_module_load@load.html
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-4/igt@i915_module_load@load.html
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-5/igt@i915_module_load@load.html
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-5/igt@i915_module_load@load.html
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-5/igt@i915_module_load@load.html
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-6/igt@i915_module_load@load.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-6/igt@i915_module_load@load.html
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-7/igt@i915_module_load@load.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-7/igt@i915_module_load@load.html
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@i915_module_load@load.html
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@i915_module_load@load.html
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-8/igt@i915_module_load@load.html
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-9/igt@i915_module_load@load.html
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-9/igt@i915_module_load@load.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-9/igt@i915_module_load@load.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-dg1:          [DMESG-WARN][240] ([i915#4391] / [i915#4423]) -> [PASS][241]
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-18/igt@i915_suspend@basic-s3-without-i915.html
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-14/igt@i915_suspend@basic-s3-without-i915.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-rkl:          [INCOMPLETE][242] ([i915#4817]) -> [PASS][243]
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@i915_suspend@fence-restore-tiled2untiled.html
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_3d@basic:
    - shard-mtlp:         [SKIP][244] ([i915#15726]) -> [PASS][245]
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-mtlp-1/igt@kms_3d@basic.html
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-mtlp-5/igt@kms_3d@basic.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         [FAIL][246] ([i915#15733] / [i915#5138]) -> [PASS][247]
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-mtlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-mtlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs:
    - shard-dg1:          [DMESG-WARN][248] ([i915#4423]) -> [PASS][249] +2 other tests pass
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-16/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs.html
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-14/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs.html

  * igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1:
    - shard-tglu:         [FAIL][250] ([i915#13566]) -> [PASS][251] +1 other test pass
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-tglu-3/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-tglu-6/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-rkl:          [SKIP][252] ([i915#3555] / [i915#8228]) -> [PASS][253] +1 other test pass
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_hdr@invalid-metadata-sizes.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-rkl:          [INCOMPLETE][254] ([i915#12756] / [i915#13476]) -> [PASS][255]
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-3/igt@kms_pipe_crc_basic@suspend-read-crc.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-2:
    - shard-rkl:          [INCOMPLETE][256] ([i915#13476]) -> [PASS][257]
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-2.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-7/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-2.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b:
    - shard-rkl:          [ABORT][258] ([i915#15132]) -> [PASS][259] +1 other test pass
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-dg2:          [SKIP][260] ([i915#15073]) -> [PASS][261]
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg2-4/igt@kms_pm_rpm@dpms-non-lpsp.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-3/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg1:          [SKIP][262] ([i915#15073]) -> [PASS][263] +3 other tests pass
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-16/igt@kms_pm_rpm@modeset-lpsp.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp.html

  
#### Warnings ####

  * igt@api_intel_bb@crc32:
    - shard-rkl:          [SKIP][264] ([i915#14544] / [i915#6230]) -> [SKIP][265] ([i915#6230])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@api_intel_bb@crc32.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@api_intel_bb@crc32.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-rkl:          [SKIP][266] -> [SKIP][267] ([i915#14544]) +4 other tests skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-rkl:          [SKIP][268] ([i915#14544] / [i915#3281]) -> [SKIP][269] ([i915#3281]) +1 other test skip
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-wc-cpu-active:
    - shard-rkl:          [SKIP][270] ([i915#3281]) -> [SKIP][271] ([i915#14544] / [i915#3281]) +1 other test skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@gem_exec_reloc@basic-wc-cpu-active.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@gem_exec_reloc@basic-wc-cpu-active.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-rkl:          [SKIP][272] ([i915#14544] / [i915#4613] / [i915#7582]) -> [SKIP][273] ([i915#4613] / [i915#7582])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@gem_lmem_evict@dontneed-evict-race.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
    - shard-rkl:          [SKIP][274] ([i915#4613]) -> [SKIP][275] ([i915#14544] / [i915#4613]) +1 other test skip
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-rkl:          [SKIP][276] ([i915#14544] / [i915#4613]) -> [SKIP][277] ([i915#4613])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_madvise@dontneed-before-exec:
    - shard-rkl:          [SKIP][278] ([i915#3282]) -> [SKIP][279] ([i915#14544] / [i915#3282])
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@gem_madvise@dontneed-before-exec.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@gem_madvise@dontneed-before-exec.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-rkl:          [SKIP][280] ([i915#14544] / [i915#8411]) -> [SKIP][281] ([i915#8411])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-rkl:          [SKIP][282] ([i915#14544] / [i915#3282]) -> [SKIP][283] ([i915#3282]) +1 other test skip
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@gem_set_tiling_vs_pwrite.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-rkl:          [SKIP][284] ([i915#3297]) -> [SKIP][285] ([i915#14544] / [i915#3297]) +1 other test skip
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@gem_userptr_blits@create-destroy-unsync.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-rkl:          [SKIP][286] ([i915#14544] / [i915#3297] / [i915#3323]) -> [SKIP][287] ([i915#3297] / [i915#3323])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@gem_userptr_blits@dmabuf-sync.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gen9_exec_parse@batch-without-end:
    - shard-rkl:          [SKIP][288] ([i915#14544] / [i915#2527]) -> [SKIP][289] ([i915#2527]) +1 other test skip
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@gen9_exec_parse@batch-without-end.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@gen9_exec_parse@batch-without-end.html

  * igt@i915_module_load@fault-injection@__uc_init:
    - shard-rkl:          [SKIP][290] ([i915#15479]) -> [SKIP][291] ([i915#14544] / [i915#15479]) +4 other tests skip
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-8/igt@i915_module_load@fault-injection@__uc_init.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@i915_module_load@fault-injection@__uc_init.html

  * igt@i915_pm_freq_mult@media-freq@gt0:
    - shard-rkl:          [SKIP][292] ([i915#14544] / [i915#6590]) -> [SKIP][293] ([i915#6590]) +1 other test skip
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@i915_pm_freq_mult@media-freq@gt0.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@i915_pm_freq_mult@media-freq@gt0.html

  * igt@intel_hwmon@hwmon-read:
    - shard-rkl:          [SKIP][294] ([i915#7707]) -> [SKIP][295] ([i915#14544] / [i915#7707])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@intel_hwmon@hwmon-read.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@intel_hwmon@hwmon-read.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-rkl:          [SKIP][296] ([i915#5286]) -> [SKIP][297] ([i915#14544] / [i915#5286]) +1 other test skip
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-0:
    - shard-rkl:          [SKIP][298] ([i915#14544] / [i915#5286]) -> [SKIP][299] ([i915#5286])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-rkl:          [SKIP][300] ([i915#14544] / [i915#3638]) -> [SKIP][301] ([i915#3638]) +1 other test skip
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_big_fb@linear-8bpp-rotate-270.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-rkl:          [SKIP][302] ([i915#3638]) -> [SKIP][303] ([i915#14544] / [i915#3638])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][304] ([i915#14544] / [i915#6095]) -> [SKIP][305] ([i915#6095]) +3 other tests skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
    - shard-rkl:          [SKIP][306] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][307] ([i915#14098] / [i915#6095]) +4 other tests skip
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][308] ([i915#6095]) -> [SKIP][309] ([i915#14544] / [i915#6095]) +10 other tests skip
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          [SKIP][310] ([i915#14098] / [i915#6095]) -> [SKIP][311] ([i915#14098] / [i915#14544] / [i915#6095]) +11 other tests skip
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
    - shard-rkl:          [SKIP][312] ([i915#12313] / [i915#14544]) -> [SKIP][313] ([i915#12313])
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
    - shard-rkl:          [SKIP][314] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][315] ([i915#11151] / [i915#7828]) +3 other tests skip
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_hpd@dp-hpd-after-suspend:
    - shard-rkl:          [SKIP][316] ([i915#11151] / [i915#7828]) -> [SKIP][317] ([i915#11151] / [i915#14544] / [i915#7828]) +1 other test skip
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-rkl:          [SKIP][318] ([i915#15330]) -> [SKIP][319] ([i915#14544] / [i915#15330])
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_content_protection@lic-type-0:
    - shard-rkl:          [SKIP][320] ([i915#14544] / [i915#6944] / [i915#9424]) -> [SKIP][321] ([i915#6944] / [i915#9424])
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_content_protection@lic-type-0.html
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][322] ([i915#6944] / [i915#9424]) -> [SKIP][323] ([i915#9433])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-17/igt@kms_content_protection@mei-interface.html
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-13/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-rkl:          [SKIP][324] ([i915#14544]) -> [SKIP][325] +5 other tests skip
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-rkl:          [SKIP][326] ([i915#14544] / [i915#3555] / [i915#3840]) -> [SKIP][327] ([i915#3555] / [i915#3840])
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_dsc@dsc-with-bpc.html
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_flip@2x-absolute-wf_vblank-interruptible:
    - shard-rkl:          [SKIP][328] ([i915#14544] / [i915#9934]) -> [SKIP][329] ([i915#9934]) +2 other tests skip
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-rkl:          [SKIP][330] ([i915#9934]) -> [SKIP][331] ([i915#14544] / [i915#9934]) +2 other tests skip
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_flip@2x-modeset-vs-vblank-race.html
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-glk:          [INCOMPLETE][332] ([i915#12745] / [i915#4839]) -> [INCOMPLETE][333] ([i915#12745] / [i915#4839] / [i915#6113])
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-glk4/igt@kms_flip@flip-vs-suspend.html
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk2/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
    - shard-glk:          [INCOMPLETE][334] ([i915#12745]) -> [INCOMPLETE][335] ([i915#12745] / [i915#6113])
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-glk4/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-glk2/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-rkl:          [SKIP][336] ([i915#15643]) -> [SKIP][337] ([i915#14544] / [i915#15643])
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite:
    - shard-rkl:          [SKIP][338] ([i915#15102]) -> [SKIP][339] ([i915#14544] / [i915#15102])
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite.html
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-rkl:          [SKIP][340] ([i915#15102] / [i915#3023]) -> [SKIP][341] ([i915#14544] / [i915#15102] / [i915#3023]) +4 other tests skip
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2:          [SKIP][342] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][343] ([i915#15102] / [i915#3458]) +1 other test skip
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
    - shard-rkl:          [SKIP][344] ([i915#14544] / [i915#1825]) -> [SKIP][345] ([i915#1825]) +6 other tests skip
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-rkl:          [SKIP][346] ([i915#1825]) -> [SKIP][347] ([i915#14544] / [i915#1825]) +14 other tests skip
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
    - shard-dg1:          [SKIP][348] ([i915#15102] / [i915#3458] / [i915#4423]) -> [SKIP][349] ([i915#15102] / [i915#3458])
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-rte:
    - shard-rkl:          [SKIP][350] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][351] ([i915#15102] / [i915#3023]) +7 other tests skip
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-rte.html
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-rte.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-rkl:          [INCOMPLETE][352] ([i915#15436]) -> [SKIP][353] ([i915#3555] / [i915#8228])
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_hdr@bpc-switch-suspend.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-rkl:          [SKIP][354] ([i915#15460]) -> [SKIP][355] ([i915#14544] / [i915#15460])
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_joiner@invalid-modeset-big-joiner.html
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-rkl:          [SKIP][356] ([i915#14544] / [i915#15815]) -> [SKIP][357] ([i915#15815])
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
    - shard-rkl:          [SKIP][358] ([i915#14544] / [i915#15709]) -> [SKIP][359] ([i915#15709]) +1 other test skip
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
    - shard-rkl:          [SKIP][360] ([i915#15709]) -> [SKIP][361] ([i915#14544] / [i915#15709])
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-rkl:          [SKIP][362] ([i915#13958]) -> [SKIP][363] ([i915#13958] / [i915#14544])
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_plane_multiple@2x-tiling-none.html
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          [SKIP][364] ([i915#15739]) -> [SKIP][365] ([i915#14544] / [i915#15739])
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_pm_dc@dc9-dpms.html
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-rkl:          [SKIP][366] ([i915#11520]) -> [SKIP][367] ([i915#11520] / [i915#14544]) +1 other test skip
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
    - shard-rkl:          [SKIP][368] ([i915#11520] / [i915#14544]) -> [SKIP][369] ([i915#11520]) +1 other test skip
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-3/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-rkl:          [SKIP][370] ([i915#14544] / [i915#9683]) -> [SKIP][371] ([i915#9683])
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_psr2_su@page_flip-nv12.html
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@pr-cursor-mmap-cpu:
    - shard-rkl:          [SKIP][372] ([i915#1072] / [i915#9732]) -> [SKIP][373] ([i915#1072] / [i915#14544] / [i915#9732]) +5 other tests skip
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_psr@pr-cursor-mmap-cpu.html
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_psr@pr-cursor-mmap-cpu.html

  * igt@kms_psr@psr2-primary-mmap-gtt:
    - shard-rkl:          [SKIP][374] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][375] ([i915#1072] / [i915#9732]) +4 other tests skip
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-6/igt@kms_psr@psr2-primary-mmap-gtt.html
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-8/igt@kms_psr@psr2-primary-mmap-gtt.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-rkl:          [SKIP][376] ([i915#3555]) -> [SKIP][377] ([i915#14544] / [i915#3555])
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_scaling_modes@scaling-mode-center.html
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-rkl:          [SKIP][378] ([i915#9906]) -> [SKIP][379] ([i915#14544] / [i915#9906])
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@kms_vrr@flip-basic-fastset.html
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@kms_vrr@flip-basic-fastset.html

  * igt@prime_vgem@basic-fence-read:
    - shard-rkl:          [SKIP][380] ([i915#3291] / [i915#3708]) -> [SKIP][381] ([i915#14544] / [i915#3291] / [i915#3708])
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@prime_vgem@basic-fence-read.html
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@prime_vgem@basic-fence-read.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-rkl:          [SKIP][382] ([i915#9917]) -> [SKIP][383] ([i915#14544] / [i915#9917]) +1 other test skip
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18133/shard-rkl-4/igt@sriov_basic@bind-unbind-vf.html
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/shard-rkl-6/igt@sriov_basic@bind-unbind-vf.html

  
  [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10538
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12177]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12177
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
  [i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
  [i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
  [i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
  [i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
  [i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
  [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
  [i915#13809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13809
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14123]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14123
  [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
  [i915#14785]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14785
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
  [i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
  [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
  [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
  [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
  [i915#15436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15436
  [i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
  [i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
  [i915#15479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15479
  [i915#15500]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15500
  [i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
  [i915#15672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15672
  [i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
  [i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
  [i915#15726]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15726
  [i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733
  [i915#15734]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15734
  [i915#15739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15739
  [i915#15752]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15752
  [i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778
  [i915#15815]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15815
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#2435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2435
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
  [i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_18133 -> Patchwork_163079v1

  CI-20190529: 20190529
  CI_DRM_18133: 389757a158d828affd3a4c242b98ffac9646daf3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8797: 8797
  Patchwork_163079v1: 389757a158d828affd3a4c242b98ffac9646daf3 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_163079v1/index.html

[-- Attachment #2: Type: text/html, Size: 124093 bytes --]

Re: [PATCH v7 0/3] Panel Replay BW optimization

[Hogander, Jouni]

On Thu, 2026-03-12 at 17:18 +0200, Imre Deak wrote:
> On Thu, Mar 12, 2026 at 10:05:35AM +0200, Hogander, Jouni wrote:
> > On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > > Unused bandwidth can be used by external display agents for Panel
> > > Replay
> > > enabled DP panel during idleness with link on. This patch series
> > > enabling the same.
> > 
> > Generic comment on this patch set. Maybe we should add one more
> > patch
> > with "Fixes" tag:
> > 
> > Fixes: e60cff453b82 ("drm/i915/dp: Enable DP tunnel BW allocation
> > mode")
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: <stable@vger.kernel.org> # v6.9+
> 
> Why? As I understand the Panel Replay BW optimization on a DP
> tunneled
> link is an _optional_ feature, whereby the free BW can be used by the
> Thunderbolt protocol for other purposes than for the given display
> stream for which Panel Replay is enabled. IOW, it looks to me a valid
> configuration to enable Panel Replay on a DP tunneled link without
> enabling the Panel Replay BW optimization on it.

My original comment was about DP spec:

"
The DP Source device may optionally enable PR optimization with DP
tunneling. The device
shall query the Tunneling Bridge’s PR tunneling optimization capability
by way of the
Panel_Replay_Tunneling_Optimization_Support bit in the
DP_TUNNELING_CAPABILITIES
register (DPCD E000Dh[6]), and then enable PR only when the Tunneling
Bridge is capable.
"

That sounds like PR can be enabled only when Panel Replay Tunneling
Optimization is supported?

BR,
Jouni Högander

> 
> > This patch would just add:
> > 
> > if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) {
> > 	drm_dbg_kms(display->drm,
> > 		    "Panel Replay is disabled as DP tunneling
> > enabled\n");
> > 	return false;
> > }
> > 
> > into _panel_replay_compute_config. this could be first patch in
> > your
> > set. What do you think?
> > 
> > BR,
> > Jouni Högander
> > 
> > > 
> > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > 
> > > Animesh Manna (3):
> > >   drm/i915/display: Add drm helper to check pr optimization
> > > support
> > >   drm/i915/display: Panel Replay BW optimization for DP2.0
> > > tunneling
> > >   drm/i915/display: Disable Panel Replay for DP-tunneling without
> > >     optimization
> > > 
> > >  drivers/gpu/drm/display/drm_dp_tunnel.c       | 17 ++++++++++
> > >  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
> > >  .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
> > >  .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
> > >  drivers/gpu/drm/i915/display/intel_psr.c      | 31
> > > +++++++++++++++++--
> > >  include/drm/display/drm_dp_tunnel.h           |  6 ++++
> > >  6 files changed, 73 insertions(+), 2 deletions(-)
> > > 
> > 

Re: [PATCH v7 0/3] Panel Replay BW optimization

[Imre Deak]

On Fri, Mar 13, 2026 at 07:20:24AM +0200, Hogander, Jouni wrote:
> On Thu, 2026-03-12 at 17:18 +0200, Imre Deak wrote:
> > On Thu, Mar 12, 2026 at 10:05:35AM +0200, Hogander, Jouni wrote:
> > > On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > > > Unused bandwidth can be used by external display agents for Panel
> > > > Replay
> > > > enabled DP panel during idleness with link on. This patch series
> > > > enabling the same.
> > > 
> > > Generic comment on this patch set. Maybe we should add one more
> > > patch
> > > with "Fixes" tag:
> > > 
> > > Fixes: e60cff453b82 ("drm/i915/dp: Enable DP tunnel BW allocation
> > > mode")
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > Cc: <stable@vger.kernel.org> # v6.9+
> > 
> > Why? As I understand the Panel Replay BW optimization on a DP
> > tunneled
> > link is an _optional_ feature, whereby the free BW can be used by the
> > Thunderbolt protocol for other purposes than for the given display
> > stream for which Panel Replay is enabled. IOW, it looks to me a valid
> > configuration to enable Panel Replay on a DP tunneled link without
> > enabling the Panel Replay BW optimization on it.
> 
> My original comment was about DP spec:
> 
> "
> The DP Source device may optionally enable PR optimization with DP
> tunneling. The device
> shall query the Tunneling Bridge’s PR tunneling optimization capability
> by way of the
> Panel_Replay_Tunneling_Optimization_Support bit in the
> DP_TUNNELING_CAPABILITIES
> register (DPCD E000Dh[6]), and then enable PR only when the Tunneling
> Bridge is capable.
> "
> 
> That sounds like PR can be enabled only when Panel Replay Tunneling
> Optimization is supported?

The Standard refers to the _optimization_ of the Panel Replay
functionality over a tunnel. This optimization can be either enabled by
the source when enabling the Panel Replay functionality over a tunnel or
the optimization can be left disabled by the source when enabling the
Panel Replay functionality over a tunnel.

The optimization means that the BW of the stream, not otherwise used for
transferring active pixels or other data (i.e. dummy pixels) can be used
by the Thunderbolt protocol to transfer non-display traffic. If the
Panel Replay is enabled over a tunnel without this optimization, then
the Thunderbolt protocol is not allowed to use this BW for other
purposes (i.e. it just transfers all the display traffic it receives
from the source as-is).

> 
> BR,
> Jouni Högander
> 
> > 
> > > This patch would just add:
> > > 
> > > if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) {
> > > 	drm_dbg_kms(display->drm,
> > > 		    "Panel Replay is disabled as DP tunneling
> > > enabled\n");
> > > 	return false;
> > > }
> > > 
> > > into _panel_replay_compute_config. this could be first patch in
> > > your
> > > set. What do you think?
> > > 
> > > BR,
> > > Jouni Högander
> > > 
> > > > 
> > > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > > 
> > > > Animesh Manna (3):
> > > >   drm/i915/display: Add drm helper to check pr optimization
> > > > support
> > > >   drm/i915/display: Panel Replay BW optimization for DP2.0
> > > > tunneling
> > > >   drm/i915/display: Disable Panel Replay for DP-tunneling without
> > > >     optimization
> > > > 
> > > >  drivers/gpu/drm/display/drm_dp_tunnel.c       | 17 ++++++++++
> > > >  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
> > > >  .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
> > > >  .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
> > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 31
> > > > +++++++++++++++++--
> > > >  include/drm/display/drm_dp_tunnel.h           |  6 ++++
> > > >  6 files changed, 73 insertions(+), 2 deletions(-)
> > > > 
> > > 
> 

Re: [PATCH v7 0/3] Panel Replay BW optimization

[Hogander, Jouni]

On Fri, 2026-03-13 at 09:51 +0200, Imre Deak wrote:
> On Fri, Mar 13, 2026 at 07:20:24AM +0200, Hogander, Jouni wrote:
> > On Thu, 2026-03-12 at 17:18 +0200, Imre Deak wrote:
> > > On Thu, Mar 12, 2026 at 10:05:35AM +0200, Hogander, Jouni wrote:
> > > > On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote:
> > > > > Unused bandwidth can be used by external display agents for
> > > > > Panel
> > > > > Replay
> > > > > enabled DP panel during idleness with link on. This patch
> > > > > series
> > > > > enabling the same.
> > > > 
> > > > Generic comment on this patch set. Maybe we should add one more
> > > > patch
> > > > with "Fixes" tag:
> > > > 
> > > > Fixes: e60cff453b82 ("drm/i915/dp: Enable DP tunnel BW
> > > > allocation
> > > > mode")
> > > > Cc: Imre Deak <imre.deak@intel.com>
> > > > Cc: <stable@vger.kernel.org> # v6.9+
> > > 
> > > Why? As I understand the Panel Replay BW optimization on a DP
> > > tunneled
> > > link is an _optional_ feature, whereby the free BW can be used by
> > > the
> > > Thunderbolt protocol for other purposes than for the given
> > > display
> > > stream for which Panel Replay is enabled. IOW, it looks to me a
> > > valid
> > > configuration to enable Panel Replay on a DP tunneled link
> > > without
> > > enabling the Panel Replay BW optimization on it.
> > 
> > My original comment was about DP spec:
> > 
> > "
> > The DP Source device may optionally enable PR optimization with DP
> > tunneling. The device
> > shall query the Tunneling Bridge’s PR tunneling optimization
> > capability
> > by way of the
> > Panel_Replay_Tunneling_Optimization_Support bit in the
> > DP_TUNNELING_CAPABILITIES
> > register (DPCD E000Dh[6]), and then enable PR only when the
> > Tunneling
> > Bridge is capable.
> > "
> > 
> > That sounds like PR can be enabled only when Panel Replay Tunneling
> > Optimization is supported?
> 
> The Standard refers to the _optimization_ of the Panel Replay
> functionality over a tunnel. This optimization can be either enabled
> by
> the source when enabling the Panel Replay functionality over a tunnel
> or
> the optimization can be left disabled by the source when enabling the
> Panel Replay functionality over a tunnel.
> 
> The optimization means that the BW of the stream, not otherwise used
> for
> transferring active pixels or other data (i.e. dummy pixels) can be
> used
> by the Thunderbolt protocol to transfer non-display traffic. If the
> Panel Replay is enabled over a tunnel without this optimization, then
> the Thunderbolt protocol is not allowed to use this BW for other
> purposes (i.e. it just transfers all the display traffic it receives
> from the source as-is).

Ok, then my original comment wasn't valid at all.

Sorry Animesh for steering into wrong direction here. Based on comment
from Imre I think you can drop patch 3.

BR,
Jouni Högander

> 
> > 
> > BR,
> > Jouni Högander
> > 
> > > 
> > > > This patch would just add:
> > > > 
> > > > if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) {
> > > > 	drm_dbg_kms(display->drm,
> > > > 		    "Panel Replay is disabled as DP tunneling
> > > > enabled\n");
> > > > 	return false;
> > > > }
> > > > 
> > > > into _panel_replay_compute_config. this could be first patch in
> > > > your
> > > > set. What do you think?
> > > > 
> > > > BR,
> > > > Jouni Högander
> > > > 
> > > > > 
> > > > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > > > 
> > > > > Animesh Manna (3):
> > > > >   drm/i915/display: Add drm helper to check pr optimization
> > > > > support
> > > > >   drm/i915/display: Panel Replay BW optimization for DP2.0
> > > > > tunneling
> > > > >   drm/i915/display: Disable Panel Replay for DP-tunneling
> > > > > without
> > > > >     optimization
> > > > > 
> > > > >  drivers/gpu/drm/display/drm_dp_tunnel.c       | 17
> > > > > ++++++++++
> > > > >  .../gpu/drm/i915/display/intel_display_regs.h |  1 +
> > > > >  .../gpu/drm/i915/display/intel_dp_tunnel.c    | 14 +++++++++
> > > > >  .../gpu/drm/i915/display/intel_dp_tunnel.h    |  6 ++++
> > > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 31
> > > > > +++++++++++++++++--
> > > > >  include/drm/display/drm_dp_tunnel.h           |  6 ++++
> > > > >  6 files changed, 73 insertions(+), 2 deletions(-)
> > > > > 
> > > > 
> >