* Re: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
2026-04-17 8:01 [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle Suraj Kandpal
@ 2026-04-17 8:27 ` Jani Nikula
2026-04-17 12:00 ` Jani Nikula
2026-04-17 15:35 ` Ville Syrjälä
` (3 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2026-04-17 8:27 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx, intel-gfx-trybot
Cc: ankit.k.nautiyal, swati2.sharma, Suraj Kandpal
On Fri, 17 Apr 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> When we are enable/disable DPLL cycle there are chances the connected
> monitors is still sending us HPD signals. This causes us to handle them
> which require DPCD read. These sometimes race with the DPLL getting
> disabled in between causing AUX failures via Timeout.
> Introduce atomic variable link_teardown which is used to track if
> we are in DPLL enable/disable cycle. We ignore HPDs during this time.
> Re-enable after DPLL is up so that we can avoid populating logs
> with expected logs AUX timeout failures.
How is this not racy?
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 5 +++++
> drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
> 3 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 178074316a2c..4a523eb56bc4 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2086,8 +2086,12 @@ static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
> void intel_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> + struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> +
> if (encoder->enable_clock)
> encoder->enable_clock(encoder, crtc_state);
> +
> + atomic_set(&dig_port->link_teardown, 0);
> }
>
> void intel_ddi_disable_clock(struct intel_encoder *encoder)
> @@ -3181,6 +3185,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
> dig_port->ddi_io_power_domain,
> wakeref);
>
> + atomic_set(&dig_port->link_teardown, 1);
> intel_ddi_disable_clock(encoder);
>
> /* De-select Thunderbolt */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c81916761850..f59bbb2fb260 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1985,6 +1985,7 @@ struct intel_digital_port {
> enum intel_display_power_domain ddi_io_power_domain;
> struct ref_tracker *ddi_io_wakeref;
> struct ref_tracker *aux_wakeref;
> + atomic_t link_teardown;
>
> struct intel_tc_port *tc;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 35b8fb5740aa..9177fe9b3e84 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6889,6 +6889,11 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
> struct intel_dp *intel_dp = &dig_port->dp;
> u8 dpcd[DP_RECEIVER_CAP_SIZE];
>
> + if (atomic_read(&dig_port->link_teardown)) {
> + drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
> + return IRQ_NONE;
> + }
> +
> if (dig_port->base.type == INTEL_OUTPUT_EDP &&
> (long_hpd ||
> intel_display_rpm_suspended(display) ||
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
2026-04-17 8:27 ` Jani Nikula
@ 2026-04-17 12:00 ` Jani Nikula
2026-04-17 14:42 ` Kandpal, Suraj
0 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2026-04-17 12:00 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx
Cc: ankit.k.nautiyal, swati2.sharma, Suraj Kandpal
On Fri, 17 Apr 2026, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Fri, 17 Apr 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
>> When we are enable/disable DPLL cycle there are chances the connected
>> monitors is still sending us HPD signals. This causes us to handle them
>> which require DPCD read. These sometimes race with the DPLL getting
>> disabled in between causing AUX failures via Timeout.
>> Introduce atomic variable link_teardown which is used to track if
>> we are in DPLL enable/disable cycle. We ignore HPDs during this time.
>> Re-enable after DPLL is up so that we can avoid populating logs
>> with expected logs AUX timeout failures.
>
> How is this not racy?
Oh, please don't cross-post trybot list with other lists.
>
>>
>> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_ddi.c | 5 +++++
>> drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
>> drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
>> 3 files changed, 11 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>> index 178074316a2c..4a523eb56bc4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> @@ -2086,8 +2086,12 @@ static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
>> void intel_ddi_enable_clock(struct intel_encoder *encoder,
>> const struct intel_crtc_state *crtc_state)
>> {
>> + struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>> +
>> if (encoder->enable_clock)
>> encoder->enable_clock(encoder, crtc_state);
>> +
>> + atomic_set(&dig_port->link_teardown, 0);
>> }
>>
>> void intel_ddi_disable_clock(struct intel_encoder *encoder)
>> @@ -3181,6 +3185,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
>> dig_port->ddi_io_power_domain,
>> wakeref);
>>
>> + atomic_set(&dig_port->link_teardown, 1);
>> intel_ddi_disable_clock(encoder);
>>
>> /* De-select Thunderbolt */
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index c81916761850..f59bbb2fb260 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -1985,6 +1985,7 @@ struct intel_digital_port {
>> enum intel_display_power_domain ddi_io_power_domain;
>> struct ref_tracker *ddi_io_wakeref;
>> struct ref_tracker *aux_wakeref;
>> + atomic_t link_teardown;
>>
>> struct intel_tc_port *tc;
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 35b8fb5740aa..9177fe9b3e84 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -6889,6 +6889,11 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
>> struct intel_dp *intel_dp = &dig_port->dp;
>> u8 dpcd[DP_RECEIVER_CAP_SIZE];
>>
>> + if (atomic_read(&dig_port->link_teardown)) {
>> + drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
>> + return IRQ_NONE;
>> + }
>> +
>> if (dig_port->base.type == INTEL_OUTPUT_EDP &&
>> (long_hpd ||
>> intel_display_rpm_suspended(display) ||
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread* RE: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
2026-04-17 12:00 ` Jani Nikula
@ 2026-04-17 14:42 ` Kandpal, Suraj
0 siblings, 0 replies; 8+ messages in thread
From: Kandpal, Suraj @ 2026-04-17 14:42 UTC (permalink / raw)
To: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Sharma, Swati2
> Subject: Re: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable
> cycle
>
> On Fri, 17 Apr 2026, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > On Fri, 17 Apr 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> >> When we are enable/disable DPLL cycle there are chances the connected
> >> monitors is still sending us HPD signals. This causes us to handle
> >> them which require DPCD read. These sometimes race with the DPLL
> >> getting disabled in between causing AUX failures via Timeout.
> >> Introduce atomic variable link_teardown which is used to track if we
> >> are in DPLL enable/disable cycle. We ignore HPDs during this time.
> >> Re-enable after DPLL is up so that we can avoid populating logs with
> >> expected logs AUX timeout failures.
> >
> > How is this not racy?
Idea I want implement here is that we atomically set this variable for each individual dig port when the PLL is going down to avoid
Intel_dp_hpd comes into picture so that we can check this atomic variale and return early avoiding all the DPCD read/writes there.
These will anyway result in AUX timeouts which create noise in CI.
But I really wanted to get this tested before comments but I messed up with the mailing lists.
>
> Oh, please don't cross-post trybot list with other lists.
>
Yes that was never the intention wanted to send this just to trybot to get this tested. Then move it here fumbled with my commands a little cause of that Friday energy and then here we are.
Regards,
Suraj Kandpal
> >
> >>
> >> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_ddi.c | 5 +++++
> >> drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> >> drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
> >> 3 files changed, 11 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> >> b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> index 178074316a2c..4a523eb56bc4 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> @@ -2086,8 +2086,12 @@ static struct intel_dpll
> >> *hsw_ddi_get_pll(struct intel_encoder *encoder) void
> intel_ddi_enable_clock(struct intel_encoder *encoder,
> >> const struct intel_crtc_state *crtc_state) {
> >> + struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> >> +
> >> if (encoder->enable_clock)
> >> encoder->enable_clock(encoder, crtc_state);
> >> +
> >> + atomic_set(&dig_port->link_teardown, 0);
> >> }
> >>
> >> void intel_ddi_disable_clock(struct intel_encoder *encoder) @@
> >> -3181,6 +3185,7 @@ static void intel_ddi_post_disable_dp(struct
> intel_atomic_state *state,
> >> dig_port->ddi_io_power_domain,
> >> wakeref);
> >>
> >> + atomic_set(&dig_port->link_teardown, 1);
> >> intel_ddi_disable_clock(encoder);
> >>
> >> /* De-select Thunderbolt */
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> >> b/drivers/gpu/drm/i915/display/intel_display_types.h
> >> index c81916761850..f59bbb2fb260 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> >> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> >> @@ -1985,6 +1985,7 @@ struct intel_digital_port {
> >> enum intel_display_power_domain ddi_io_power_domain;
> >> struct ref_tracker *ddi_io_wakeref;
> >> struct ref_tracker *aux_wakeref;
> >> + atomic_t link_teardown;
> >>
> >> struct intel_tc_port *tc;
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> >> b/drivers/gpu/drm/i915/display/intel_dp.c
> >> index 35b8fb5740aa..9177fe9b3e84 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> @@ -6889,6 +6889,11 @@ intel_dp_hpd_pulse(struct intel_digital_port
> *dig_port, bool long_hpd)
> >> struct intel_dp *intel_dp = &dig_port->dp;
> >> u8 dpcd[DP_RECEIVER_CAP_SIZE];
> >>
> >> + if (atomic_read(&dig_port->link_teardown)) {
> >> + drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
> >> + return IRQ_NONE;
> >> + }
> >> +
> >> if (dig_port->base.type == INTEL_OUTPUT_EDP &&
> >> (long_hpd ||
> >> intel_display_rpm_suspended(display) ||
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
2026-04-17 8:01 [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle Suraj Kandpal
2026-04-17 8:27 ` Jani Nikula
@ 2026-04-17 15:35 ` Ville Syrjälä
2026-04-20 16:17 ` ✗ Fi.CI.BUILD: failure for " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Ville Syrjälä @ 2026-04-17 15:35 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, intel-gfx-trybot, ankit.k.nautiyal,
swati2.sharma
On Fri, Apr 17, 2026 at 01:31:18PM +0530, Suraj Kandpal wrote:
> When we are enable/disable DPLL cycle there are chances the connected
> monitors is still sending us HPD signals. This causes us to handle them
> which require DPCD read. These sometimes race with the DPLL getting
> disabled in between causing AUX failures via Timeout.
What does the DPLL have to do with AUX?
> Introduce atomic variable link_teardown which is used to track if
> we are in DPLL enable/disable cycle. We ignore HPDs during this time.
> Re-enable after DPLL is up so that we can avoid populating logs
> with expected logs AUX timeout failures.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 5 +++++
> drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
> 3 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 178074316a2c..4a523eb56bc4 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2086,8 +2086,12 @@ static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
> void intel_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> + struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> +
> if (encoder->enable_clock)
> encoder->enable_clock(encoder, crtc_state);
> +
> + atomic_set(&dig_port->link_teardown, 0);
> }
>
> void intel_ddi_disable_clock(struct intel_encoder *encoder)
> @@ -3181,6 +3185,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
> dig_port->ddi_io_power_domain,
> wakeref);
>
> + atomic_set(&dig_port->link_teardown, 1);
> intel_ddi_disable_clock(encoder);
>
> /* De-select Thunderbolt */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c81916761850..f59bbb2fb260 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1985,6 +1985,7 @@ struct intel_digital_port {
> enum intel_display_power_domain ddi_io_power_domain;
> struct ref_tracker *ddi_io_wakeref;
> struct ref_tracker *aux_wakeref;
> + atomic_t link_teardown;
>
> struct intel_tc_port *tc;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 35b8fb5740aa..9177fe9b3e84 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6889,6 +6889,11 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
> struct intel_dp *intel_dp = &dig_port->dp;
> u8 dpcd[DP_RECEIVER_CAP_SIZE];
>
> + if (atomic_read(&dig_port->link_teardown)) {
> + drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
> + return IRQ_NONE;
> + }
> +
> if (dig_port->base.type == INTEL_OUTPUT_EDP &&
> (long_hpd ||
> intel_display_rpm_suspended(display) ||
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 8+ messages in thread* ✗ Fi.CI.BUILD: failure for drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
2026-04-17 8:01 [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle Suraj Kandpal
2026-04-17 8:27 ` Jani Nikula
2026-04-17 15:35 ` Ville Syrjälä
@ 2026-04-20 16:17 ` Patchwork
2026-04-22 2:03 ` [PATCH] " kernel test robot
2026-04-22 2:46 ` kernel test robot
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-04-20 16:17 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
URL : https://patchwork.freedesktop.org/series/165052/
State : failure
== Summary ==
Error: make failed
CALL scripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M] drivers/gpu/drm/i915/display/intel_dp.o
drivers/gpu/drm/i915/display/intel_dp.c: In function ‘intel_dp_hpd_pulse’:
drivers/gpu/drm/i915/display/intel_dp.c:6893:76: error: macro "drm_dbg_kms" requires 3 arguments, but only 1 given
6893 | drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
| ^
In file included from drivers/gpu/drm/i915/display/intel_dp.c:50:
./include/drm/drm_print.h:652: note: macro "drm_dbg_kms" defined here
652 | #define drm_dbg_kms(drm, fmt, ...) \
|
drivers/gpu/drm/i915/display/intel_dp.c:6893:17: error: ‘drm_dbg_kms’ undeclared (first use in this function)
6893 | drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
| ^~~~~~~~~~~
drivers/gpu/drm/i915/display/intel_dp.c:6893:17: note: each undeclared identifier is reported only once for each function it appears in
make[6]: *** [scripts/Makefile.build:289: drivers/gpu/drm/i915/display/intel_dp.o] Error 1
make[5]: *** [scripts/Makefile.build:549: drivers/gpu/drm/i915] Error 2
make[4]: *** [scripts/Makefile.build:549: drivers/gpu/drm] Error 2
make[3]: *** [scripts/Makefile.build:549: drivers/gpu] Error 2
make[2]: *** [scripts/Makefile.build:549: drivers] Error 2
make[1]: *** [/home/kbuild2/kernel/Makefile:2105: .] Error 2
make: *** [Makefile:248: __sub-make] Error 2
Build failed, no error log produced
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
2026-04-17 8:01 [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle Suraj Kandpal
` (2 preceding siblings ...)
2026-04-20 16:17 ` ✗ Fi.CI.BUILD: failure for " Patchwork
@ 2026-04-22 2:03 ` kernel test robot
2026-04-22 2:46 ` kernel test robot
4 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2026-04-22 2:03 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx, intel-gfx-trybot
Cc: llvm, oe-kbuild-all, ankit.k.nautiyal, swati2.sharma,
Suraj Kandpal
Hi Suraj,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-i915/for-linux-next]
[also build test ERROR on drm-i915/for-linux-next-fixes drm-tip/drm-tip linus/master v7.0 next-20260421]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Suraj-Kandpal/drm-i915-dp-Ignore-HPD-when-in-DPLL-enable-disable-cycle/20260422-031647
base: https://gitlab.freedesktop.org/drm/i915/kernel.git for-linux-next
patch link: https://lore.kernel.org/r/20260417080118.2352283-1-suraj.kandpal%40intel.com
patch subject: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
config: x86_64-rhel-9.4-rust (https://download.01.org/0day-ci/archive/20260422/202604220938.18Kkm7Pt-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
rustc: rustc 1.88.0 (6b00bc388 2025-06-23)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260422/202604220938.18Kkm7Pt-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604220938.18Kkm7Pt-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/i915/display/intel_dp.c:6834:62: error: too few arguments provided to function-like macro invocation
6834 | drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
| ^
include/drm/drm_print.h:652:9: note: macro 'drm_dbg_kms' defined here
652 | #define drm_dbg_kms(drm, fmt, ...) \
| ^
>> drivers/gpu/drm/i915/display/intel_dp.c:6834:3: error: use of undeclared identifier 'drm_dbg_kms'
6834 | drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
| ^
2 errors generated.
vim +6834 drivers/gpu/drm/i915/display/intel_dp.c
6825
6826 enum irqreturn
6827 intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
6828 {
6829 struct intel_display *display = to_intel_display(dig_port);
6830 struct intel_dp *intel_dp = &dig_port->dp;
6831 u8 dpcd[DP_RECEIVER_CAP_SIZE];
6832
6833 if (atomic_read(&dig_port->link_teardown)) {
> 6834 drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
6835 return IRQ_NONE;
6836 }
6837
6838 if (dig_port->base.type == INTEL_OUTPUT_EDP &&
6839 (long_hpd ||
6840 intel_display_rpm_suspended(display) ||
6841 !intel_pps_have_panel_power_or_vdd(intel_dp))) {
6842 /*
6843 * vdd off can generate a long/short pulse on eDP which
6844 * would require vdd on to handle it, and thus we
6845 * would end up in an endless cycle of
6846 * "vdd off -> long/short hpd -> vdd on -> detect -> vdd off -> ..."
6847 */
6848 drm_dbg_kms(display->drm,
6849 "ignoring %s hpd on eDP [ENCODER:%d:%s]\n",
6850 long_hpd ? "long" : "short",
6851 dig_port->base.base.base.id,
6852 dig_port->base.base.name);
6853 return IRQ_HANDLED;
6854 }
6855
6856 drm_dbg_kms(display->drm, "got hpd irq on [ENCODER:%d:%s] - %s\n",
6857 dig_port->base.base.base.id,
6858 dig_port->base.base.name,
6859 long_hpd ? "long" : "short");
6860
6861 /*
6862 * TBT DP tunnels require the GFX driver to read out the DPRX caps in
6863 * response to long HPD pulses. The DP hotplug handler does that,
6864 * however the hotplug handler may be blocked by another
6865 * connector's/encoder's hotplug handler. Since the TBT CM may not
6866 * complete the DP tunnel BW request for the latter connector/encoder
6867 * waiting for this encoder's DPRX read, perform a dummy read here.
6868 */
6869 if (long_hpd) {
6870 intel_dp_dpcd_set_probe(intel_dp, true);
6871
6872 intel_dp_read_dprx_caps(intel_dp, dpcd);
6873
6874 intel_dp->reset_link_params = true;
6875 intel_dp_invalidate_source_oui(intel_dp);
6876
6877 return IRQ_NONE;
6878 }
6879
6880 if (intel_dp->is_mst) {
6881 if (!intel_dp_check_mst_status(intel_dp))
6882 return IRQ_NONE;
6883 } else if (!intel_dp_short_pulse(intel_dp)) {
6884 return IRQ_NONE;
6885 }
6886
6887 return IRQ_HANDLED;
6888 }
6889
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
2026-04-17 8:01 [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle Suraj Kandpal
` (3 preceding siblings ...)
2026-04-22 2:03 ` [PATCH] " kernel test robot
@ 2026-04-22 2:46 ` kernel test robot
4 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2026-04-22 2:46 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx, intel-gfx-trybot
Cc: oe-kbuild-all, ankit.k.nautiyal, swati2.sharma, Suraj Kandpal
Hi Suraj,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-i915/for-linux-next]
[also build test ERROR on drm-i915/for-linux-next-fixes drm-tip/drm-tip linus/master v7.0 next-20260421]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Suraj-Kandpal/drm-i915-dp-Ignore-HPD-when-in-DPLL-enable-disable-cycle/20260422-031647
base: https://gitlab.freedesktop.org/drm/i915/kernel.git for-linux-next
patch link: https://lore.kernel.org/r/20260417080118.2352283-1-suraj.kandpal%40intel.com
patch subject: [PATCH] drm/i915/dp: Ignore HPD when in DPLL enable/disable cycle
config: parisc-allmodconfig (https://download.01.org/0day-ci/archive/20260422/202604221040.Im5y9Mk0-lkp@intel.com/config)
compiler: hppa-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260422/202604221040.Im5y9Mk0-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604221040.Im5y9Mk0-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/display/intel_dp.c: In function 'intel_dp_hpd_pulse':
>> drivers/gpu/drm/i915/display/intel_dp.c:6834:76: error: macro 'drm_dbg_kms' requires 3 arguments, but only 1 given
6834 | drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
| ^
In file included from drivers/gpu/drm/i915/display/intel_dp.c:50:
include/drm/drm_print.h:652:9: note: macro 'drm_dbg_kms' defined here
652 | #define drm_dbg_kms(drm, fmt, ...) \
| ^~~~~~~~~~~
>> drivers/gpu/drm/i915/display/intel_dp.c:6834:17: error: 'drm_dbg_kms' undeclared (first use in this function)
6834 | drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
| ^~~~~~~~~~~
drivers/gpu/drm/i915/display/intel_dp.c:6834:17: note: each undeclared identifier is reported only once for each function it appears in
vim +/drm_dbg_kms +6834 drivers/gpu/drm/i915/display/intel_dp.c
6825
6826 enum irqreturn
6827 intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
6828 {
6829 struct intel_display *display = to_intel_display(dig_port);
6830 struct intel_dp *intel_dp = &dig_port->dp;
6831 u8 dpcd[DP_RECEIVER_CAP_SIZE];
6832
6833 if (atomic_read(&dig_port->link_teardown)) {
> 6834 drm_dbg_kms("Ignoring HPD since DPLL is getting disabled\n");
6835 return IRQ_NONE;
6836 }
6837
6838 if (dig_port->base.type == INTEL_OUTPUT_EDP &&
6839 (long_hpd ||
6840 intel_display_rpm_suspended(display) ||
6841 !intel_pps_have_panel_power_or_vdd(intel_dp))) {
6842 /*
6843 * vdd off can generate a long/short pulse on eDP which
6844 * would require vdd on to handle it, and thus we
6845 * would end up in an endless cycle of
6846 * "vdd off -> long/short hpd -> vdd on -> detect -> vdd off -> ..."
6847 */
6848 drm_dbg_kms(display->drm,
6849 "ignoring %s hpd on eDP [ENCODER:%d:%s]\n",
6850 long_hpd ? "long" : "short",
6851 dig_port->base.base.base.id,
6852 dig_port->base.base.name);
6853 return IRQ_HANDLED;
6854 }
6855
6856 drm_dbg_kms(display->drm, "got hpd irq on [ENCODER:%d:%s] - %s\n",
6857 dig_port->base.base.base.id,
6858 dig_port->base.base.name,
6859 long_hpd ? "long" : "short");
6860
6861 /*
6862 * TBT DP tunnels require the GFX driver to read out the DPRX caps in
6863 * response to long HPD pulses. The DP hotplug handler does that,
6864 * however the hotplug handler may be blocked by another
6865 * connector's/encoder's hotplug handler. Since the TBT CM may not
6866 * complete the DP tunnel BW request for the latter connector/encoder
6867 * waiting for this encoder's DPRX read, perform a dummy read here.
6868 */
6869 if (long_hpd) {
6870 intel_dp_dpcd_set_probe(intel_dp, true);
6871
6872 intel_dp_read_dprx_caps(intel_dp, dpcd);
6873
6874 intel_dp->reset_link_params = true;
6875 intel_dp_invalidate_source_oui(intel_dp);
6876
6877 return IRQ_NONE;
6878 }
6879
6880 if (intel_dp->is_mst) {
6881 if (!intel_dp_check_mst_status(intel_dp))
6882 return IRQ_NONE;
6883 } else if (!intel_dp_short_pulse(intel_dp)) {
6884 return IRQ_NONE;
6885 }
6886
6887 return IRQ_HANDLED;
6888 }
6889
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 8+ messages in thread