* [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling
@ 2026-05-18 11:24 Imre Deak
2026-05-18 11:24 ` [PATCH 1/5] drm/i915/dp: Add helpers to reset link params Imre Deak
` (7 more replies)
0 siblings, 8 replies; 21+ messages in thread
From: Imre Deak @ 2026-05-18 11:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Ville Syrjälä, Jani Nikula
Sanitize link capability change handling via long HPD pulse /
RX_CAP_CHANGED HPD IRQ events and the connector detect paths by making
all of them consistently reset the link training/recovery and MST link
probe state after a link capability change.
This also prepares for the refactoring of the DP link capability logic
in patch [1], simplifying the handling of link capability changes in
that patchset based on the above.
[1] https://lore.kernel.org/all/20260428125233.1664668-1-imre.deak@intel.com
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Imre Deak (5):
drm/i915/dp: Add helpers to reset link params
drm/i915/dp: Reset link params after a DPRX capability change
drm/i915/dp: Add helper to set common link params
drm/i915/dp: Cache max common lane count
drm/i915/dp: Detect changes in common link parameters
drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 103 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
.../drm/i915/display/intel_dp_link_training.c | 4 +-
6 files changed, 94 insertions(+), 21 deletions(-)
--
2.49.1
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
@ 2026-05-18 11:24 ` Imre Deak
2026-05-21 21:36 ` Ville Syrjälä
2026-05-18 11:24 ` [PATCH 2/5] drm/i915/dp: Reset link params after a DPRX capability change Imre Deak
` (6 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Imre Deak @ 2026-05-18 11:24 UTC (permalink / raw)
To: intel-gfx, intel-xe
Add helpers to defer and handle link params resets instead of
open-coding the same. Rename intel_dp_reset_link_params() to
intel_dp_reset_link_params_force() to align its name with the new
deferred reset helpers.
When deferring a reset, return whether a new reset was queued, used by a
follow-up change.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
.../drm/i915/display/intel_dp_link_training.c | 4 +-
5 files changed, 38 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 5ff1cdf4581a5..c20a97e21419b 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
- intel_dp->reset_link_params = true;
+ intel_dp_reset_link_params_defer(intel_dp);
intel_dp_invalidate_source_oui(intel_dp);
if (display->platform.valleyview || display->platform.cherryview)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 86520848892e0..77819aaeccb76 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
- intel_dp->reset_link_params = true;
+ intel_dp_reset_link_params_defer(intel_dp);
intel_dp_invalidate_source_oui(intel_dp);
intel_pps_encoder_reset(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 1920d2f026665..13163dd085e91 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
intel_dp->lane_count = lane_count;
}
-void intel_dp_reset_link_params(struct intel_dp *intel_dp)
+/*
+ * Reset link params now, preserving any deferred connector
+ * detect-time reset request.
+ */
+void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
{
intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
@@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
intel_dp->link.seq_train_failures = 0;
}
+/*
+ * Reset link params during the next connector detect.
+ * Return %true if a new reset was queued.
+ */
+bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
+{
+ bool reset_was_pending = intel_dp->reset_link_params;
+
+ intel_dp->reset_link_params = true;
+
+ return !reset_was_pending;
+}
+
+static void intel_dp_handle_deferred_link_params_reset(struct intel_dp *intel_dp)
+{
+ if (!intel_dp->reset_link_params)
+ return;
+
+ intel_dp->reset_link_params = false;
+ intel_dp_reset_link_params_force(intel_dp);
+}
+
/* Enable backlight PWM and backlight PP control. */
void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
@@ -4066,7 +4092,7 @@ void intel_dp_sync_state(struct intel_encoder *encoder,
intel_dp_tunnel_resume(intel_dp, crtc_state, dpcd_updated);
if (crtc_state) {
- intel_dp_reset_link_params(intel_dp);
+ intel_dp_reset_link_params_force(intel_dp);
intel_dp_set_link_params(intel_dp, crtc_state->port_clock, crtc_state->lane_count);
intel_dp->link.active = true;
}
@@ -6487,10 +6513,7 @@ intel_dp_detect(struct drm_connector *_connector,
intel_dp_detect_sdp_caps(intel_dp);
- if (intel_dp->reset_link_params) {
- intel_dp_reset_link_params(intel_dp);
- intel_dp->reset_link_params = false;
- }
+ intel_dp_handle_deferred_link_params_reset(intel_dp);
intel_dp_mst_configure(intel_dp);
@@ -6944,7 +6967,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
intel_dp_read_dprx_caps(intel_dp, dpcd);
- intel_dp->reset_link_params = true;
+ intel_dp_reset_link_params_defer(intel_dp);
intel_dp_invalidate_source_oui(intel_dp);
return IRQ_NONE;
@@ -7252,7 +7275,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
encoder->base.name))
return false;
- intel_dp->reset_link_params = true;
+ intel_dp_reset_link_params_defer(intel_dp);
/* Preserve the current hw state. */
intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
@@ -7317,7 +7340,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
intel_dp_set_source_rates(intel_dp);
intel_dp_set_common_rates(intel_dp);
- intel_dp_reset_link_params(intel_dp);
+ intel_dp_reset_link_params_force(intel_dp);
/* init MST on ports that can support it */
intel_dp_mst_encoder_init(dig_port, connector->base.base.id);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index f41480d247142..7c24d3dbb6983 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -114,7 +114,8 @@ int intel_dp_rate_index(const int *rates, int len, int rate);
int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lane_count);
void intel_dp_link_config_get(struct intel_dp *intel_dp, int idx, int *link_rate, int *lane_count);
void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
-void intel_dp_reset_link_params(struct intel_dp *intel_dp);
+void intel_dp_reset_link_params_force(struct intel_dp *intel_dp);
+bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp);
void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
u8 *link_bw, u8 *rate_select);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index a26094223f780..b7075060e7bd3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1935,7 +1935,7 @@ static ssize_t i915_dp_force_link_rate_write(struct file *file,
if (err)
return err;
- intel_dp_reset_link_params(intel_dp);
+ intel_dp_reset_link_params_force(intel_dp);
intel_dp->link.force_rate = rate;
drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
@@ -2037,7 +2037,7 @@ static ssize_t i915_dp_force_lane_count_write(struct file *file,
if (err)
return err;
- intel_dp_reset_link_params(intel_dp);
+ intel_dp_reset_link_params_force(intel_dp);
intel_dp->link.force_lane_count = lane_count;
drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
--
2.49.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/5] drm/i915/dp: Reset link params after a DPRX capability change
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
2026-05-18 11:24 ` [PATCH 1/5] drm/i915/dp: Add helpers to reset link params Imre Deak
@ 2026-05-18 11:24 ` Imre Deak
2026-05-18 11:24 ` [PATCH 3/5] drm/i915/dp: Add helper to set common link params Imre Deak
` (5 subsequent siblings)
7 siblings, 0 replies; 21+ messages in thread
From: Imre Deak @ 2026-05-18 11:24 UTC (permalink / raw)
To: intel-gfx, intel-xe
There is no reason to distinguish between DPRX capability changes
signaled via a long HPD and via an RX_CAP_CHANGED HPD IRQ.
Both cases result in reading out the DPRX capabilities and updating the
corresponding sink and common capabilities cached in intel_dp, however
only the long HPD resets the link training/recovery state and MST link
probe parameters correspondingly. The link training/recovery state may
contain reduced maximum link rate/lane count values left over from a
previous link training failure.
Based on the above after an RX_CAP_CHANGED increased the link rate, lane
count parameters the maximum link rate/lane count in the link
training/recovery state may remain below these, leaving the newly added
valid configurations unavailable for subsequent modesets in an
inconsistent way.
Handle RX_CAP_CHANGED IRQs the same way as long HPDs and reset the link
recovery state and MST link probe parameters in that case as well.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 13163dd085e91..9c530ef12b7cc 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6026,8 +6026,10 @@ static bool intel_dp_handle_link_service_irq(struct intel_dp *intel_dp, u8 irq_m
drm_WARN_ON(display->drm, irq_mask & ~(INTEL_DP_LINK_SERVICE_IRQ_MASK_SST |
INTEL_DP_LINK_SERVICE_IRQ_MASK_MST));
- if (irq_mask & RX_CAP_CHANGED)
+ if (irq_mask & RX_CAP_CHANGED) {
+ intel_dp_reset_link_params_defer(intel_dp);
reprobe_needed = true;
+ }
if (irq_mask & LINK_STATUS_CHANGED)
intel_dp_check_link_state(intel_dp);
--
2.49.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 3/5] drm/i915/dp: Add helper to set common link params
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
2026-05-18 11:24 ` [PATCH 1/5] drm/i915/dp: Add helpers to reset link params Imre Deak
2026-05-18 11:24 ` [PATCH 2/5] drm/i915/dp: Reset link params after a DPRX capability change Imre Deak
@ 2026-05-18 11:24 ` Imre Deak
2026-05-22 7:20 ` Hogander, Jouni
2026-05-18 11:24 ` [PATCH 4/5] drm/i915/dp: Cache max common lane count Imre Deak
` (4 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Imre Deak @ 2026-05-18 11:24 UTC (permalink / raw)
To: intel-gfx, intel-xe
Add intel_dp_set_common_link_params() to prepare for updating the
maximum common lane count together with the common rates.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9c530ef12b7cc..06bf1fb23faff 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -805,7 +805,11 @@ static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
intel_dp->common_rates[0] = 162000;
intel_dp->num_common_rates = 1;
}
+}
+static void intel_dp_set_common_link_params(struct intel_dp *intel_dp)
+{
+ intel_dp_set_common_rates(intel_dp);
intel_dp_link_config_init(intel_dp);
}
@@ -4903,7 +4907,7 @@ void intel_dp_update_sink_caps(struct intel_dp *intel_dp)
{
intel_dp_set_sink_rates(intel_dp);
intel_dp_set_max_sink_lane_count(intel_dp);
- intel_dp_set_common_rates(intel_dp);
+ intel_dp_set_common_link_params(intel_dp);
}
static bool
@@ -7341,7 +7345,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
}
intel_dp_set_source_rates(intel_dp);
- intel_dp_set_common_rates(intel_dp);
+ intel_dp_set_common_link_params(intel_dp);
intel_dp_reset_link_params_force(intel_dp);
/* init MST on ports that can support it */
--
2.49.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 4/5] drm/i915/dp: Cache max common lane count
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
` (2 preceding siblings ...)
2026-05-18 11:24 ` [PATCH 3/5] drm/i915/dp: Add helper to set common link params Imre Deak
@ 2026-05-18 11:24 ` Imre Deak
2026-05-22 7:21 ` Hogander, Jouni
2026-05-18 11:24 ` [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters Imre Deak
` (3 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Imre Deak @ 2026-05-18 11:24 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cache the maximum common lane count together with the common link
rates.
This is safe because the cached value is updated:
- during driver probe, before the connector is registered and can be
used for mode validation or modesetting
- during resume, before output HW state readout can query it
- during connector detection, right after updating the sink/link
capabilities
Caching the value allows detecting max common lane count changes in
a follow-up change and keeps the tracking of max common lane count
aligned with that of common rates.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index f44be5c689aef..c3811242310c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1820,6 +1820,7 @@ struct intel_dp {
/* intersection of source and sink rates */
int num_common_rates;
int common_rates[DP_MAX_SUPPORTED_RATES];
+ int max_common_lane_count;
struct {
/* TODO: move the rest of link specific fields to here */
bool active;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 06bf1fb23faff..6c4dadfc35806 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -363,7 +363,7 @@ int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port)
}
/* Theoretical max between source and sink */
-int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
+static void intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
int source_max = intel_dp_max_source_lane_count(dig_port);
@@ -374,7 +374,12 @@ int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
if (lttpr_max)
sink_max = min(sink_max, lttpr_max);
- return min3(source_max, sink_max, lane_max);
+ intel_dp->max_common_lane_count = min3(source_max, sink_max, lane_max);
+}
+
+int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
+{
+ return intel_dp->max_common_lane_count;
}
static int forced_lane_count(struct intel_dp *intel_dp)
@@ -810,6 +815,7 @@ static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
static void intel_dp_set_common_link_params(struct intel_dp *intel_dp)
{
intel_dp_set_common_rates(intel_dp);
+ intel_dp_set_max_common_lane_count(intel_dp);
intel_dp_link_config_init(intel_dp);
}
--
2.49.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
` (3 preceding siblings ...)
2026-05-18 11:24 ` [PATCH 4/5] drm/i915/dp: Cache max common lane count Imre Deak
@ 2026-05-18 11:24 ` Imre Deak
2026-05-21 21:43 ` Ville Syrjälä
2026-05-18 14:09 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Sanitize link capability change handling Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Imre Deak @ 2026-05-18 11:24 UTC (permalink / raw)
To: intel-gfx, intel-xe
Detect DPRX capability changes without a long HPD or RX_CAP_CHANGED
signal and queue a corresponding link params reset.
Besides detecting the above unexpected capability changes, this also
avoids races between queuing and handling a deferred link params reset.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 50 +++++++++++++++++++++----
1 file changed, 43 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 6c4dadfc35806..dd968c2d9fa64 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -362,19 +362,25 @@ int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port)
return max_lanes;
}
-/* Theoretical max between source and sink */
-static void intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
+/*
+ * Theoretical max between source and sink.
+ * Return %true if the max common lane count changed.
+ */
+static bool intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
int source_max = intel_dp_max_source_lane_count(dig_port);
int sink_max = intel_dp->max_sink_lane_count;
int lane_max = intel_tc_port_max_lane_count(dig_port);
int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
+ int old_max_common_lane_count = intel_dp->max_common_lane_count;
if (lttpr_max)
sink_max = min(sink_max, lttpr_max);
intel_dp->max_common_lane_count = min3(source_max, sink_max, lane_max);
+
+ return intel_dp->max_common_lane_count != old_max_common_lane_count;
}
int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
@@ -792,13 +798,20 @@ int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lan
return -1;
}
-static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
+/* Return %true if the common rates changed. */
+static bool intel_dp_set_common_rates(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
+ int num_old_common_rates = intel_dp->num_common_rates;
+ int old_common_rates[DP_MAX_SUPPORTED_RATES];
drm_WARN_ON(display->drm,
!intel_dp->num_source_rates || !intel_dp->num_sink_rates);
+ static_assert(sizeof(old_common_rates) == sizeof(intel_dp->common_rates));
+ memcpy(old_common_rates, intel_dp->common_rates,
+ num_old_common_rates * sizeof(old_common_rates[0]));
+
intel_dp->num_common_rates = intersect_rates(intel_dp->source_rates,
intel_dp->num_source_rates,
intel_dp->sink_rates,
@@ -810,13 +823,26 @@ static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
intel_dp->common_rates[0] = 162000;
intel_dp->num_common_rates = 1;
}
+
+ return num_old_common_rates != intel_dp->num_common_rates ||
+ memcmp(old_common_rates, intel_dp->common_rates,
+ num_old_common_rates * sizeof(old_common_rates[0]));
}
-static void intel_dp_set_common_link_params(struct intel_dp *intel_dp)
+/* Return %true if any common link param changed. */
+static bool intel_dp_set_common_link_params(struct intel_dp *intel_dp)
{
- intel_dp_set_common_rates(intel_dp);
- intel_dp_set_max_common_lane_count(intel_dp);
+ bool params_changed = false;
+
+ if (intel_dp_set_common_rates(intel_dp))
+ params_changed = true;
+
+ if (intel_dp_set_max_common_lane_count(intel_dp))
+ params_changed = true;
+
intel_dp_link_config_init(intel_dp);
+
+ return params_changed;
}
bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
@@ -4911,9 +4937,19 @@ intel_dp_has_sink_count(struct intel_dp *intel_dp)
void intel_dp_update_sink_caps(struct intel_dp *intel_dp)
{
+ struct intel_display *display = to_intel_display(intel_dp);
+
intel_dp_set_sink_rates(intel_dp);
intel_dp_set_max_sink_lane_count(intel_dp);
- intel_dp_set_common_link_params(intel_dp);
+ /*
+ * Handle unexpected sink cap changes, or a race between setting
+ * the deferred link params flag in the HPD IRQ handler and
+ * clearing the flag during connector detect.
+ */
+ if (intel_dp_set_common_link_params(intel_dp) &&
+ intel_dp_reset_link_params_defer(intel_dp))
+ drm_dbg_kms(display->drm,
+ "DPRX capabilities changed before long HPD or RX_CAP_CHANGED signal\n");
}
static bool
--
2.49.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* ✗ i915.CI.BAT: failure for drm/i915/dp: Sanitize link capability change handling
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
` (4 preceding siblings ...)
2026-05-18 11:24 ` [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters Imre Deak
@ 2026-05-18 14:09 ` Patchwork
2026-05-18 16:52 ` ✓ i915.CI.BAT: success for drm/i915/dp: Sanitize link capability change handling (rev2) Patchwork
2026-05-19 5:53 ` ✓ i915.CI.Full: " Patchwork
7 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2026-05-18 14:09 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3593 bytes --]
== Series Details ==
Series: drm/i915/dp: Sanitize link capability change handling
URL : https://patchwork.freedesktop.org/series/166770/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_18505 -> Patchwork_166770v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_166770v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_166770v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v1/index.html
Participating hosts (42 -> 40)
------------------------------
Missing (2): bat-dg2-13 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_166770v1:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@basic-flip-vs-modeset:
- fi-bsw-n3050: [PASS][1] -> [DMESG-WARN][2] +3 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-modeset.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v1/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-modeset.html
Known issues
------------
Here are the changes found in Patchwork_166770v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@workarounds:
- bat-dg2-9: [PASS][3] -> [DMESG-FAIL][4] ([i915#12061]) +1 other test dmesg-fail
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/bat-dg2-9/igt@i915_selftest@live@workarounds.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v1/bat-dg2-9/igt@i915_selftest@live@workarounds.html
- bat-mtlp-9: [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v1/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-dg2-8: [DMESG-FAIL][7] ([i915#12061]) -> [PASS][8] +1 other test pass
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/bat-dg2-8/igt@i915_selftest@live.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v1/bat-dg2-8/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [DMESG-FAIL][9] ([i915#12061]) -> [PASS][10] +1 other test pass
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
Build changes
-------------
* Linux: CI_DRM_18505 -> Patchwork_166770v1
CI-20190529: 20190529
CI_DRM_18505: 4a64e92e2b244c93c99832a0850204ed2ddca5b2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_166770v1: 4a64e92e2b244c93c99832a0850204ed2ddca5b2 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v1/index.html
[-- Attachment #2: Type: text/html, Size: 4517 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/dp: Sanitize link capability change handling (rev2)
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
` (5 preceding siblings ...)
2026-05-18 14:09 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Sanitize link capability change handling Patchwork
@ 2026-05-18 16:52 ` Patchwork
2026-05-19 5:53 ` ✓ i915.CI.Full: " Patchwork
7 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2026-05-18 16:52 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 1682 bytes --]
== Series Details ==
Series: drm/i915/dp: Sanitize link capability change handling (rev2)
URL : https://patchwork.freedesktop.org/series/166770/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_18509 -> Patchwork_166770v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/index.html
Participating hosts (42 -> 39)
------------------------------
Missing (3): bat-dg2-13 bat-rpls-4 fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_166770v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@workarounds:
- bat-dg2-9: [PASS][1] -> [DMESG-FAIL][2] ([i915#12061]) +1 other test dmesg-fail
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/bat-dg2-9/igt@i915_selftest@live@workarounds.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/bat-dg2-9/igt@i915_selftest@live@workarounds.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
Build changes
-------------
* Linux: CI_DRM_18509 -> Patchwork_166770v2
CI-20190529: 20190529
CI_DRM_18509: f05be6b9858836632ce6b4839e1bda3a470278b9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_166770v2: f05be6b9858836632ce6b4839e1bda3a470278b9 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/index.html
[-- Attachment #2: Type: text/html, Size: 2267 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✓ i915.CI.Full: success for drm/i915/dp: Sanitize link capability change handling (rev2)
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
` (6 preceding siblings ...)
2026-05-18 16:52 ` ✓ i915.CI.BAT: success for drm/i915/dp: Sanitize link capability change handling (rev2) Patchwork
@ 2026-05-19 5:53 ` Patchwork
7 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2026-05-19 5:53 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 91131 bytes --]
== Series Details ==
Series: drm/i915/dp: Sanitize link capability change handling (rev2)
URL : https://patchwork.freedesktop.org/series/166770/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_18509_full -> Patchwork_166770v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between CI_DRM_18509_full and Patchwork_166770v2_full:
### New IGT tests (1) ###
* igt@perf@stress-open-close@1-vcs0:
- Statuses : 1 pass(s)
- Exec time: [2.17] s
Known issues
------------
Here are the changes found in Patchwork_166770v2_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@device_reset@cold-reset-bound:
- shard-tglu: NOTRUN -> [SKIP][1] ([i915#11078])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@device_reset@cold-reset-bound.html
* igt@dmabuf@all-tests:
- shard-dg2: NOTRUN -> [SKIP][2] ([i915#15931])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@dmabuf@all-tests.html
* igt@drm_buddy@drm_buddy:
- shard-tglu-1: NOTRUN -> [SKIP][3] ([i915#15678])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@drm_buddy@drm_buddy.html
* igt@gem_basic@multigpu-create-close:
- shard-tglu-1: NOTRUN -> [SKIP][4] ([i915#7697]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@gem_basic@multigpu-create-close.html
* igt@gem_ccs@block-copy-compressed:
- shard-rkl: NOTRUN -> [SKIP][5] ([i915#3555] / [i915#9323])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@gem_ccs@block-copy-compressed.html
* igt@gem_ccs@suspend-resume:
- shard-dg2: NOTRUN -> [INCOMPLETE][6] ([i915#13356]) +1 other test incomplete
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@gem_ccs@suspend-resume.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-tglu: NOTRUN -> [SKIP][7] ([i915#7697])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: NOTRUN -> [FAIL][8] ([i915#15454])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_create@create-ext-cpu-access-big.html
- shard-rkl: NOTRUN -> [SKIP][9] ([i915#6335])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2: NOTRUN -> [SKIP][10] ([i915#4812])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@gem_exec_balancer@bonded-false-hang.html
* igt@gem_exec_balancer@parallel:
- shard-tglu-1: NOTRUN -> [SKIP][11] ([i915#4525])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_balancer@parallel-contexts:
- shard-rkl: NOTRUN -> [SKIP][12] ([i915#4525]) +1 other test skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@gem_exec_balancer@parallel-contexts.html
* igt@gem_exec_capture@capture-invisible:
- shard-glk11: NOTRUN -> [SKIP][13] ([i915#6334]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-tglu-1: NOTRUN -> [SKIP][14] ([i915#6334]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_capture@capture-recoverable:
- shard-rkl: NOTRUN -> [SKIP][15] ([i915#6344])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_flush@basic-uc-pro-default:
- shard-dg2: NOTRUN -> [SKIP][16] ([i915#3539] / [i915#4852])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_exec_flush@basic-uc-pro-default.html
* igt@gem_exec_flush@basic-uc-prw-default:
- shard-dg2: NOTRUN -> [SKIP][17] ([i915#3539])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@gem_exec_flush@basic-uc-prw-default.html
* igt@gem_exec_reloc@basic-wc-cpu-active:
- shard-dg2: NOTRUN -> [SKIP][18] ([i915#3281]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@gem_exec_reloc@basic-wc-cpu-active.html
* igt@gem_exec_reloc@basic-write-cpu:
- shard-rkl: NOTRUN -> [SKIP][19] ([i915#3281]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@gem_exec_reloc@basic-write-cpu.html
* igt@gem_exec_schedule@preempt-queue-contexts:
- shard-dg2: NOTRUN -> [SKIP][20] ([i915#4537] / [i915#4812])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_exec_schedule@preempt-queue-contexts.html
* igt@gem_exec_suspend@basic-s3:
- shard-glk10: NOTRUN -> [INCOMPLETE][21] ([i915#13196] / [i915#13356]) +1 other test incomplete
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk10/igt@gem_exec_suspend@basic-s3.html
* igt@gem_fenced_exec_thrash@too-many-fences:
- shard-dg2: NOTRUN -> [SKIP][22] ([i915#4860]) +2 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_fenced_exec_thrash@too-many-fences.html
* igt@gem_lmem_swapping@massive:
- shard-rkl: NOTRUN -> [SKIP][23] ([i915#4613])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@gem_lmem_swapping@massive.html
* igt@gem_lmem_swapping@massive-random:
- shard-glk: NOTRUN -> [SKIP][24] ([i915#4613])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@parallel-random:
- shard-tglu: NOTRUN -> [SKIP][25] ([i915#4613]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][26] ([i915#4613]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_media_vme:
- shard-tglu: NOTRUN -> [SKIP][27] ([i915#284])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@gem_media_vme.html
* igt@gem_mmap@short-mmap:
- shard-dg2: NOTRUN -> [SKIP][28] ([i915#4083]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_mmap@short-mmap.html
* igt@gem_partial_pwrite_pread@reads:
- shard-rkl: NOTRUN -> [SKIP][29] ([i915#3282]) +2 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@gem_partial_pwrite_pread@reads.html
* igt@gem_pwrite_snooped:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#3282])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@gem_pwrite_snooped.html
* igt@gem_pxp@hw-rejects-pxp-buffer:
- shard-tglu-1: NOTRUN -> [SKIP][31] ([i915#13398])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@gem_pxp@hw-rejects-pxp-buffer.html
* igt@gem_pxp@protected-raw-src-copy-not-readible:
- shard-dg2: NOTRUN -> [SKIP][32] ([i915#4270]) +2 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_pxp@protected-raw-src-copy-not-readible.html
* igt@gem_pxp@verify-pxp-stale-ctx-execution:
- shard-glk11: NOTRUN -> [SKIP][33] +174 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@gem_pxp@verify-pxp-stale-ctx-execution.html
* igt@gem_render_copy@y-tiled-to-vebox-y-tiled:
- shard-dg2: NOTRUN -> [SKIP][34] ([i915#5190] / [i915#8428]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html
* igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
- shard-glk10: NOTRUN -> [SKIP][35] +121 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk10/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_set_tiling_vs_blt@untiled-to-tiled:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#4079])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
* igt@gem_tiled_blits@basic:
- shard-dg2: NOTRUN -> [SKIP][37] ([i915#4077]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@gem_tiled_blits@basic.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-rkl: NOTRUN -> [SKIP][38] ([i915#3297])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#3297] / [i915#4880])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-tglu-1: NOTRUN -> [SKIP][40] ([i915#3297]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@gem_userptr_blits@unsync-unmap-after-close.html
* igt@gen9_exec_parse@batch-invalid-length:
- shard-tglu-1: NOTRUN -> [SKIP][41] ([i915#2527] / [i915#2856]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@gen9_exec_parse@batch-invalid-length.html
* igt@gen9_exec_parse@bb-large:
- shard-tglu: NOTRUN -> [SKIP][42] ([i915#2527] / [i915#2856]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@gen9_exec_parse@bb-large.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-rkl: NOTRUN -> [SKIP][43] ([i915#2527])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@gen9_exec_parse@bb-start-cmd.html
* igt@gen9_exec_parse@unaligned-jump:
- shard-dg2: NOTRUN -> [SKIP][44] ([i915#2856]) +2 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@gen9_exec_parse@unaligned-jump.html
* igt@i915_drm_fdinfo@most-busy-check-all@vecs0:
- shard-dg2: NOTRUN -> [SKIP][45] ([i915#14073]) +7 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@i915_drm_fdinfo@most-busy-check-all@vecs0.html
* igt@i915_drm_fdinfo@virtual-busy-hang-all:
- shard-dg2: NOTRUN -> [SKIP][46] ([i915#14118])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@i915_drm_fdinfo@virtual-busy-hang-all.html
* igt@i915_module_load@fault-injection@__uc_init:
- shard-tglu-1: NOTRUN -> [SKIP][47] ([i915#15479]) +4 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@i915_module_load@fault-injection@__uc_init.html
* igt@i915_module_load@fault-injection@intel_connector_register:
- shard-tglu-1: NOTRUN -> [ABORT][48] ([i915#15342]) +1 other test abort
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@i915_module_load@fault-injection@intel_connector_register.html
* igt@i915_pm_freq_api@freq-reset:
- shard-tglu-1: NOTRUN -> [SKIP][49] ([i915#8399])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@i915_pm_freq_api@freq-reset.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-tglu: NOTRUN -> [SKIP][50] ([i915#8399])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-rkl: NOTRUN -> [SKIP][51] ([i915#6590]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_rc6_residency@media-rc6-accuracy:
- shard-tglu-1: NOTRUN -> [SKIP][52] ([i915#16080])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@i915_pm_rc6_residency@media-rc6-accuracy.html
* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-dg2: NOTRUN -> [SKIP][53] +6 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-glk11: NOTRUN -> [INCOMPLETE][54] ([i915#13356] / [i915#15172])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@i915_pm_rpm@system-suspend-execbuf.html
- shard-rkl: [PASS][55] -> [INCOMPLETE][56] ([i915#13356])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@i915_pm_rpm@system-suspend-execbuf.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@i915_pm_rps@thresholds-idle:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#11681])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@i915_pm_rps@thresholds-idle.html
* igt@i915_query@test-query-geometry-subslices:
- shard-tglu: NOTRUN -> [SKIP][58] ([i915#5723])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@i915_query@test-query-geometry-subslices.html
* igt@i915_selftest@live:
- shard-mtlp: [PASS][59] -> [DMESG-FAIL][60] ([i915#12061] / [i915#15560])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-mtlp-2/igt@i915_selftest@live.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-mtlp-8/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- shard-mtlp: [PASS][61] -> [DMESG-FAIL][62] ([i915#12061])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-mtlp-2/igt@i915_selftest@live@workarounds.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-mtlp-8/igt@i915_selftest@live@workarounds.html
* igt@i915_suspend@sysfs-reader:
- shard-glk: NOTRUN -> [INCOMPLETE][63] ([i915#4817])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk5/igt@i915_suspend@sysfs-reader.html
* igt@intel_hwmon@hwmon-read:
- shard-tglu-1: NOTRUN -> [SKIP][64] ([i915#7707])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@intel_hwmon@hwmon-read.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- shard-dg2: NOTRUN -> [SKIP][65] ([i915#4215] / [i915#5190])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- shard-dg2: NOTRUN -> [SKIP][66] ([i915#4212])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-rkl: NOTRUN -> [SKIP][67] ([i915#12454] / [i915#12712])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-glk: NOTRUN -> [INCOMPLETE][68] ([i915#12761]) +1 other test incomplete
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-tglu: NOTRUN -> [SKIP][69] ([i915#1769] / [i915#3555])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][70] ([i915#5286]) +1 other test skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-tglu-1: NOTRUN -> [SKIP][71] ([i915#5286]) +2 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-tglu: NOTRUN -> [SKIP][72] ([i915#5286]) +1 other test skip
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
- shard-rkl: NOTRUN -> [SKIP][73] ([i915#3828])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
- shard-tglu-1: NOTRUN -> [SKIP][74] ([i915#3828]) +1 other test skip
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][75] ([i915#3638]) +2 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-dg2: NOTRUN -> [SKIP][76] ([i915#4538] / [i915#5190]) +5 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2:
- shard-glk: NOTRUN -> [SKIP][77] +126 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][78] ([i915#14544] / [i915#6095]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][79] ([i915#14098] / [i915#14544] / [i915#6095]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-2.html
* igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs:
- shard-tglu: NOTRUN -> [SKIP][80] ([i915#6095]) +29 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][81] ([i915#12313]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-dg2: NOTRUN -> [SKIP][82] ([i915#12313]) +1 other test skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
- shard-rkl: NOTRUN -> [SKIP][83] ([i915#12313])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][84] ([i915#6095]) +203 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-13/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][85] ([i915#6095]) +51 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][86] ([i915#12805])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][87] ([i915#6095]) +54 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2:
- shard-glk: NOTRUN -> [INCOMPLETE][88] ([i915#14694] / [i915#15582])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2:
- shard-glk: NOTRUN -> [INCOMPLETE][89] ([i915#15582])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk2/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][90] ([i915#6095]) +3 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-tglu: NOTRUN -> [SKIP][91] ([i915#12313])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][92] ([i915#10307] / [i915#6095]) +46 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][93] ([i915#14098] / [i915#6095]) +29 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][94] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-rkl: NOTRUN -> [SKIP][95] ([i915#3742])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@plane-scaling:
- shard-tglu-1: NOTRUN -> [SKIP][96] ([i915#3742])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_cdclk@plane-scaling.html
* igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][97] ([i915#13783]) +3 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-1/igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3.html
* igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
- shard-tglu-1: NOTRUN -> [SKIP][98] ([i915#11151] / [i915#7828]) +5 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode:
- shard-dg2: NOTRUN -> [SKIP][99] ([i915#11151] / [i915#7828]) +3 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-rkl: NOTRUN -> [SKIP][100] ([i915#11151] / [i915#7828]) +3 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
- shard-tglu: NOTRUN -> [SKIP][101] ([i915#11151] / [i915#7828]) +3 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-tglu: NOTRUN -> [SKIP][102] ([i915#15865]) +1 other test skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_content_protection@dp-mst-type-0-suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][103] ([i915#15330])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
* igt@kms_content_protection@lic-type-0-hdcp14:
- shard-dg2: NOTRUN -> [SKIP][104] ([i915#15865]) +1 other test skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_content_protection@lic-type-0-hdcp14.html
* igt@kms_content_protection@mei-interface:
- shard-rkl: NOTRUN -> [SKIP][105] ([i915#15865]) +1 other test skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@uevent-hdcp14:
- shard-tglu-1: NOTRUN -> [SKIP][106] ([i915#15865])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_content_protection@uevent-hdcp14.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-tglu: NOTRUN -> [SKIP][107] ([i915#3555])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-rkl: NOTRUN -> [SKIP][108] ([i915#13049])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-dg2: NOTRUN -> [SKIP][109] ([i915#13049]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-tglu-1: NOTRUN -> [SKIP][110] ([i915#13049])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-tglu: NOTRUN -> [SKIP][111] ([i915#13049]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-2:
- shard-rkl: [PASS][112] -> [FAIL][113] ([i915#13566]) +1 other test fail
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-2.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-2.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-dg2: NOTRUN -> [SKIP][114] ([i915#3555])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-rkl: NOTRUN -> [SKIP][115] ([i915#4103]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#13046] / [i915#5354]) +3 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-rkl: NOTRUN -> [SKIP][117] ([i915#9067])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-tglu: NOTRUN -> [SKIP][118] ([i915#4103])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_display_modes@extended-mode-basic:
- shard-tglu-1: NOTRUN -> [SKIP][119] ([i915#13691])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-tglu: NOTRUN -> [SKIP][120] ([i915#1769] / [i915#3555] / [i915#3804])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][121] ([i915#3804])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][122] ([i915#3804])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html
* igt@kms_dp_aux_dev@basic:
- shard-tglu-1: NOTRUN -> [SKIP][123] ([i915#1257])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_dp_aux_dev@basic.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-dg2: NOTRUN -> [SKIP][124] ([i915#13748])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#8812])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-tglu-1: NOTRUN -> [SKIP][126] ([i915#3840])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-bpc:
- shard-tglu: NOTRUN -> [SKIP][127] ([i915#3555] / [i915#3840])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-dg2: NOTRUN -> [SKIP][128] ([i915#3555] / [i915#3840])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-rkl: NOTRUN -> [SKIP][129] ([i915#3840] / [i915#9053])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_feature_discovery@dp-mst:
- shard-dg2: NOTRUN -> [SKIP][130] ([i915#9337])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_feature_discovery@dp-mst.html
* igt@kms_feature_discovery@psr1:
- shard-tglu: NOTRUN -> [SKIP][131] ([i915#658])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-tglu: NOTRUN -> [SKIP][132] ([i915#3637] / [i915#9934]) +6 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-dg2: NOTRUN -> [SKIP][133] ([i915#8381])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_flip@2x-flip-vs-fences-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][134] ([i915#12314] / [i915#12745] / [i915#4839])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk8/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2:
- shard-glk: NOTRUN -> [INCOMPLETE][135] ([i915#12314] / [i915#12745])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk8/igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#9934]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_flip@2x-modeset-vs-vblank-race.html
- shard-rkl: NOTRUN -> [SKIP][137] ([i915#9934]) +3 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-tglu-1: NOTRUN -> [SKIP][138] ([i915#3637] / [i915#9934]) +1 other test skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-dg2: [PASS][139] -> [FAIL][140] ([i915#13027])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg2-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1:
- shard-glk: [PASS][141] -> [FAIL][142] ([i915#13027]) +1 other test fail
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a3:
- shard-dg2: [PASS][143] -> [FAIL][144] ([i915#15718])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg2-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a3.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a3.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1:
- shard-tglu: [PASS][145] -> [FAIL][146] ([i915#13027])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-tglu-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-dg2: NOTRUN -> [SKIP][147] ([i915#15643])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][148] ([i915#15643]) +3 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
- shard-rkl: NOTRUN -> [SKIP][149] ([i915#15643])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling:
- shard-dg2: NOTRUN -> [SKIP][150] ([i915#15643] / [i915#5190])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#15990] / [i915#8708]) +9 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][152] ([i915#15991] / [i915#5354]) +18 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-tglu-1: NOTRUN -> [SKIP][153] +74 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-rkl: [PASS][154] -> [ABORT][155] ([i915#15132])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-suspend.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-plflip-blt:
- shard-rkl: [PASS][156] -> [SKIP][157] ([i915#15989]) +4 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-plflip-blt.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-msflip-blt:
- shard-tglu: NOTRUN -> [SKIP][158] +46 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-farfromfence-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][159] ([i915#15989]) +11 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_frontbuffer_tracking@fbchdr-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbchdr-tiling-4:
- shard-tglu: NOTRUN -> [SKIP][160] ([i915#5439])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
- shard-rkl: NOTRUN -> [SKIP][161] ([i915#15102] / [i915#3023]) +13 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
* igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary:
- shard-dg2: NOTRUN -> [SKIP][162] ([i915#10433] / [i915#15102])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-tglu-1: NOTRUN -> [SKIP][163] ([i915#15102]) +25 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-rte:
- shard-rkl: NOTRUN -> [SKIP][164] ([i915#15102]) +12 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-rte.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-rgb565-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][165] ([i915#15990]) +9 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-rgb565-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-stridechange:
- shard-dg2: NOTRUN -> [SKIP][166] ([i915#15102]) +15 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-stridechange.html
* igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][167] ([i915#15989]) +9 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-pwrite.html
- shard-rkl: NOTRUN -> [SKIP][168] ([i915#15989]) +9 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-shrfb-plflip-blt:
- shard-tglu-1: NOTRUN -> [SKIP][169] ([i915#15989]) +12 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-glk: [PASS][170] -> [SKIP][171] +7 other tests skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-glk8/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk2/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-dg2: NOTRUN -> [SKIP][172] ([i915#9766])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-fullscreen:
- shard-tglu: NOTRUN -> [SKIP][173] ([i915#15102]) +23 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move:
- shard-rkl: NOTRUN -> [SKIP][174] +40 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-shrfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][175] ([i915#15991]) +19 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_hdr@bpc-switch:
- shard-tglu-1: NOTRUN -> [SKIP][176] ([i915#16012] / [i915#3555] / [i915#8228])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2: NOTRUN -> [SKIP][177] ([i915#16012] / [i915#3555] / [i915#8228]) +1 other test skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb2101010:
- shard-dg2: NOTRUN -> [SKIP][178] ([i915#16012]) +3 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@bpc-switch@pipe-a-hdmi-a-1-xrgb2101010:
- shard-tglu-1: NOTRUN -> [SKIP][179] ([i915#16012]) +1 other test skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_hdr@bpc-switch@pipe-a-hdmi-a-1-xrgb2101010.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-4-xrgb2101010:
- shard-dg1: NOTRUN -> [SKIP][180] ([i915#16012]) +5 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-17/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-4-xrgb2101010.html
* igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-1-xrgb16161616f:
- shard-dg1: NOTRUN -> [SKIP][181] ([i915#16011]) +7 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-15/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-1-xrgb16161616f.html
* igt@kms_hdr@static-toggle-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][182] ([i915#16011] / [i915#3555] / [i915#8228])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-1-xrgb2101010:
- shard-tglu-1: NOTRUN -> [SKIP][183] ([i915#16011]) +1 other test skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-1-xrgb2101010.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-1-xrgb16161616f:
- shard-rkl: NOTRUN -> [SKIP][184] ([i915#16011]) +5 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-5/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-1-xrgb16161616f.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-dg2: NOTRUN -> [SKIP][185] ([i915#16011]) +1 other test skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-5/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-dg2: NOTRUN -> [SKIP][186] ([i915#15460])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-tglu: NOTRUN -> [SKIP][187] ([i915#15458])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][188] ([i915#15458])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][189] ([i915#15638] / [i915#15722])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-tglu: NOTRUN -> [SKIP][190] ([i915#15815])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-tglu-1: NOTRUN -> [SKIP][191] ([i915#6301])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-tglu-1: NOTRUN -> [SKIP][192] ([i915#14712])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
- shard-tglu: NOTRUN -> [SKIP][193] ([i915#15709]) +2 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier:
- shard-rkl: NOTRUN -> [SKIP][194] ([i915#15709]) +1 other test skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier.html
* igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-7:
- shard-tglu-1: NOTRUN -> [SKIP][195] ([i915#15608]) +1 other test skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-7.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-dg2: NOTRUN -> [SKIP][196] ([i915#15709]) +1 other test skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_plane@pixel-format-y-tiled-modifier@pipe-b-plane-7:
- shard-tglu: NOTRUN -> [SKIP][197] ([i915#15608]) +1 other test skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_plane@pixel-format-y-tiled-modifier@pipe-b-plane-7.html
* igt@kms_plane@pixel-format-yf-tiled-modifier:
- shard-tglu-1: NOTRUN -> [SKIP][198] ([i915#15709]) +1 other test skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_plane@pixel-format-yf-tiled-modifier.html
* igt@kms_plane_lowres@tiling-yf:
- shard-rkl: NOTRUN -> [SKIP][199] ([i915#3555]) +1 other test skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-dg2: NOTRUN -> [SKIP][200] ([i915#13958])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_pm_backlight@bad-brightness:
- shard-tglu-1: NOTRUN -> [SKIP][201] ([i915#12343] / [i915#9812])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][202] ([i915#12343])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-rkl: NOTRUN -> [SKIP][203] ([i915#12343] / [i915#5354])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc6-psr:
- shard-tglu-1: NOTRUN -> [SKIP][204] ([i915#15948])
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-tglu: NOTRUN -> [SKIP][205] ([i915#15739])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-rkl: [PASS][206] -> [SKIP][207] ([i915#15073])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-3/igt@kms_pm_rpm@dpms-non-lpsp.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-dg1: [PASS][208] -> [SKIP][209] ([i915#15073]) +2 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-17/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-rkl: NOTRUN -> [SKIP][210] ([i915#15073])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-tglu-1: NOTRUN -> [SKIP][211] ([i915#15073]) +1 other test skip
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@package-g7:
- shard-tglu-1: NOTRUN -> [SKIP][212] ([i915#15403])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_pm_rpm@package-g7.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-rkl: NOTRUN -> [SKIP][213] ([i915#6524])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
- shard-glk: NOTRUN -> [SKIP][214] ([i915#11520]) +2 other tests skip
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
- shard-dg2: NOTRUN -> [SKIP][215] ([i915#11520]) +3 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area:
- shard-tglu-1: NOTRUN -> [SKIP][216] ([i915#11520]) +4 other tests skip
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-tglu: NOTRUN -> [SKIP][217] ([i915#11520]) +4 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf:
- shard-glk11: NOTRUN -> [SKIP][218] ([i915#11520]) +2 other tests skip
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
- shard-rkl: NOTRUN -> [SKIP][219] ([i915#11520]) +2 other tests skip
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
- shard-glk10: NOTRUN -> [SKIP][220] ([i915#11520]) +2 other tests skip
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk10/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-tglu: NOTRUN -> [SKIP][221] ([i915#9683])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-pr-sprite-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][222] ([i915#1072] / [i915#9732]) +9 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_psr@fbc-pr-sprite-mmap-gtt.html
* igt@kms_psr@psr-basic:
- shard-tglu: NOTRUN -> [SKIP][223] ([i915#9732]) +9 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_psr@psr-basic.html
* igt@kms_psr@psr-cursor-render:
- shard-tglu-1: NOTRUN -> [SKIP][224] ([i915#9732]) +11 other tests skip
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_psr@psr-cursor-render.html
* igt@kms_psr@psr-sprite-plane-onoff:
- shard-rkl: NOTRUN -> [SKIP][225] ([i915#1072] / [i915#9732]) +9 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-tglu-1: NOTRUN -> [SKIP][226] ([i915#15949])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-glk11: NOTRUN -> [INCOMPLETE][227] ([i915#15500])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-tglu: NOTRUN -> [SKIP][228] ([i915#5289])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-tglu-1: NOTRUN -> [SKIP][229] ([i915#3555]) +1 other test skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_selftest@drm_framebuffer:
- shard-glk11: NOTRUN -> [ABORT][230] ([i915#13179]) +1 other test abort
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@kms_selftest@drm_framebuffer.html
* igt@kms_setmode@basic:
- shard-rkl: [PASS][231] -> [FAIL][232] ([i915#15106])
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-7/igt@kms_setmode@basic.html
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-5/igt@kms_setmode@basic.html
* igt@kms_setmode@basic@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][233] ([i915#15106])
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-5/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-tglu-1: NOTRUN -> [SKIP][234] ([i915#8623])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@kms_tiled_display@basic-test-pattern.html
- shard-glk11: NOTRUN -> [FAIL][235] ([i915#10959])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-2:
- shard-glk: NOTRUN -> [INCOMPLETE][236] ([i915#12276])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk2/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-2.html
* igt@kms_vrr@negative-basic:
- shard-tglu: NOTRUN -> [SKIP][237] ([i915#3555] / [i915#9906])
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-10/igt@kms_vrr@negative-basic.html
* igt@perf_pmu@module-unload:
- shard-tglu-1: NOTRUN -> [ABORT][238] ([i915#13029] / [i915#15778])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@perf_pmu@module-unload.html
- shard-glk11: NOTRUN -> [ABORT][239] ([i915#15778])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk11/igt@perf_pmu@module-unload.html
* igt@perf_pmu@rc6@other-idle-gt0:
- shard-dg2: NOTRUN -> [SKIP][240] ([i915#8516])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-8/igt@perf_pmu@rc6@other-idle-gt0.html
* igt@prime_vgem@fence-read-hang:
- shard-dg2: NOTRUN -> [SKIP][241] ([i915#3708]) +2 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-3/igt@prime_vgem@fence-read-hang.html
* igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-7:
- shard-tglu-1: NOTRUN -> [SKIP][242] ([i915#16066]) +9 other tests skip
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-1/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-7.html
#### Possible fixes ####
* igt@gem_ctx_freq@sysfs@gt0:
- shard-dg2: [FAIL][243] ([i915#9561]) -> [PASS][244] +1 other test pass
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg2-8/igt@gem_ctx_freq@sysfs@gt0.html
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-5/igt@gem_ctx_freq@sysfs@gt0.html
* igt@gem_eio@in-flight-suspend:
- shard-dg1: [DMESG-WARN][245] ([i915#4391] / [i915#4423]) -> [PASS][246]
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg1-12/igt@gem_eio@in-flight-suspend.html
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-13/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_suspend@basic-s0:
- shard-dg2: [INCOMPLETE][247] ([i915#13356]) -> [PASS][248] +1 other test pass
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg2-7/igt@gem_exec_suspend@basic-s0.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@gem_exec_suspend@basic-s0.html
* igt@i915_selftest@live@late_gt_pm:
- shard-dg1: [FAIL][249] -> [PASS][250] +1 other test pass
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg1-14/igt@i915_selftest@live@late_gt_pm.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-17/igt@i915_selftest@live@late_gt_pm.html
* igt@i915_suspend@debugfs-reader:
- shard-rkl: [INCOMPLETE][251] ([i915#4817]) -> [PASS][252] +1 other test pass
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-3/igt@i915_suspend@debugfs-reader.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-3/igt@i915_suspend@debugfs-reader.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-dg1: [FAIL][253] ([i915#14888]) -> [PASS][254] +1 other test pass
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg1-16/igt@kms_async_flips@alternate-sync-async-flip.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-16/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [FAIL][255] ([i915#15733] / [i915#5138]) -> [PASS][256]
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1:
- shard-glk: [INCOMPLETE][257] ([i915#14694] / [i915#15582]) -> [PASS][258]
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-glk1/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-glk: [INCOMPLETE][259] ([i915#15582]) -> [PASS][260]
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-glk8/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk2/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-tglu: [FAIL][261] ([i915#13566]) -> [PASS][262] +1 other test pass
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-tglu-9/igt@kms_cursor_crc@cursor-onscreen-128x42.html
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-5/igt@kms_cursor_crc@cursor-onscreen-128x42.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible@ab-vga1-hdmi-a1:
- shard-snb: [FAIL][263] ([i915#10826]) -> [PASS][264] +1 other test pass
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-snb6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible@ab-vga1-hdmi-a1.html
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-snb7/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible@ab-vga1-hdmi-a1.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [FAIL][265] ([i915#13027]) -> [PASS][266] +1 other test pass
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1:
- shard-snb: [FAIL][267] ([i915#13027]) -> [PASS][268] +1 other test pass
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-snb4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1.html
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-snb5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a1:
- shard-tglu: [FAIL][269] ([i915#13027]) -> [PASS][270]
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-tglu-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a1.html
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-tglu-9/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a1.html
* igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-render:
- shard-glk: [SKIP][271] -> [PASS][272] +3 other tests pass
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-glk9/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-render.html
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk8/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@hdr-indfb-scaledprimary:
- shard-rkl: [SKIP][273] ([i915#15989]) -> [PASS][274]
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_frontbuffer_tracking@hdr-indfb-scaledprimary.html
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_frontbuffer_tracking@hdr-indfb-scaledprimary.html
* igt@kms_hdmi_inject@inject-4k:
- shard-mtlp: [SKIP][275] ([i915#15725]) -> [PASS][276]
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-mtlp-1/igt@kms_hdmi_inject@inject-4k.html
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-mtlp-3/igt@kms_hdmi_inject@inject-4k.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-rkl: [SKIP][277] ([i915#6953]) -> [PASS][278]
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_plane_scaling@intel-max-src-size.html
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-dg1: [SKIP][279] ([i915#15073]) -> [PASS][280]
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg1-19/igt@kms_pm_rpm@dpms-lpsp.html
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-15/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-rkl: [SKIP][281] ([i915#15073]) -> [PASS][282]
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp.html
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [SKIP][283] ([i915#15073]) -> [PASS][284]
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-rkl: [ABORT][285] ([i915#15132]) -> [PASS][286] +1 other test pass
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-1/igt@kms_vblank@ts-continuation-dpms-suspend.html
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-1:
- shard-glk: [INCOMPLETE][287] ([i915#12276]) -> [PASS][288]
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-glk8/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-1.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-glk2/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-1.html
#### Warnings ####
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-rkl: [SKIP][289] ([i915#14544] / [i915#8411]) -> [SKIP][290] ([i915#8411])
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-rkl: [SKIP][291] ([i915#3638]) -> [SKIP][292] ([i915#14544] / [i915#3638])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-rkl: [SKIP][293] -> [SKIP][294] ([i915#14544]) +7 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs:
- shard-rkl: [SKIP][295] ([i915#14098] / [i915#6095]) -> [SKIP][296] ([i915#14098] / [i915#14544] / [i915#6095]) +1 other test skip
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
* igt@kms_content_protection@mei-interface:
- shard-dg1: [SKIP][297] ([i915#9433]) -> [SKIP][298] ([i915#15865])
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg1-13/igt@kms_content_protection@mei-interface.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-18/igt@kms_content_protection@mei-interface.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-rkl: [SKIP][299] ([i915#4103]) -> [SKIP][300] ([i915#14544] / [i915#4103])
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-rkl: [SKIP][301] ([i915#9934]) -> [SKIP][302] ([i915#14544] / [i915#9934])
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_flip@2x-plain-flip-interruptible.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-dg1: [SKIP][303] ([i915#15990] / [i915#4423]) -> [SKIP][304] ([i915#15990])
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg1-18/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg1-19/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-shrfb-draw-render:
- shard-rkl: [SKIP][305] ([i915#14544]) -> [SKIP][306] +1 other test skip
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-shrfb-draw-render.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-dg2: [SKIP][307] ([i915#10433] / [i915#15102]) -> [SKIP][308] ([i915#15102])
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-rkl: [SKIP][309] ([i915#15102] / [i915#3023]) -> [SKIP][310] ([i915#14544] / [i915#15102] / [i915#3023]) +1 other test skip
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][311] ([i915#15102]) -> [SKIP][312] ([i915#14544] / [i915#15102])
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt:
- shard-dg2: [SKIP][313] ([i915#15102]) -> [SKIP][314] ([i915#10433] / [i915#15102])
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-rkl: [SKIP][315] ([i915#3555] / [i915#8228]) -> [SKIP][316] ([i915#16012] / [i915#3555] / [i915#8228])
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-1/igt@kms_hdr@invalid-hdr.html
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-2-xrgb2101010:
- shard-rkl: [SKIP][317] ([i915#16025]) -> [SKIP][318] ([i915#16012]) +1 other test skip
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-1/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-2-xrgb2101010.html
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-7/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-2-xrgb2101010.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
- shard-rkl: [SKIP][319] ([i915#15709]) -> [SKIP][320] ([i915#14544] / [i915#15709])
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-8/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-rkl: [SKIP][321] ([i915#11520] / [i915#14544]) -> [SKIP][322] ([i915#11520])
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-6/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@pr-sprite-plane-onoff:
- shard-rkl: [SKIP][323] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][324] ([i915#1072] / [i915#9732])
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18509/shard-rkl-6/igt@kms_psr@pr-sprite-plane-onoff.html
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/shard-rkl-8/igt@kms_psr@pr-sprite-plane-onoff.html
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
[i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
[i915#13029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
[i915#13196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13196
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
[i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
[i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106
[i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
[i915#15172]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15172
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
[i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
[i915#15454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15454
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
[i915#15479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15479
[i915#15500]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15500
[i915#15560]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15560
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
[i915#15638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15638
[i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
[i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
[i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
[i915#15718]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15718
[i915#15722]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15722
[i915#15725]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15725
[i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733
[i915#15739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15739
[i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778
[i915#15815]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15815
[i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
[i915#15931]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15931
[i915#15948]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15948
[i915#15949]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15949
[i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989
[i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990
[i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991
[i915#16011]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16011
[i915#16012]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16012
[i915#16025]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16025
[i915#16066]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16066
[i915#16080]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16080
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
[i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
[i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
[i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
[i915#9561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9561
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_18509 -> Patchwork_166770v2
CI-20190529: 20190529
CI_DRM_18509: f05be6b9858836632ce6b4839e1bda3a470278b9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_166770v2: f05be6b9858836632ce6b4839e1bda3a470278b9 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166770v2/index.html
[-- Attachment #2: Type: text/html, Size: 112953 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-18 11:24 ` [PATCH 1/5] drm/i915/dp: Add helpers to reset link params Imre Deak
@ 2026-05-21 21:36 ` Ville Syrjälä
2026-05-22 7:36 ` Hogander, Jouni
2026-05-22 7:47 ` Imre Deak
0 siblings, 2 replies; 21+ messages in thread
From: Ville Syrjälä @ 2026-05-21 21:36 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, intel-xe
On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
> Add helpers to defer and handle link params resets instead of
> open-coding the same. Rename intel_dp_reset_link_params() to
> intel_dp_reset_link_params_force() to align its name with the new
> deferred reset helpers.
>
> When deferring a reset, return whether a new reset was queued, used by a
> follow-up change.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
> drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
> .../drm/i915/display/intel_dp_link_training.c | 4 +-
> 5 files changed, 38 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 5ff1cdf4581a5..c20a97e21419b 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
>
> intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
>
> - intel_dp->reset_link_params = true;
> + intel_dp_reset_link_params_defer(intel_dp);
> intel_dp_invalidate_source_oui(intel_dp);
>
> if (display->platform.valleyview || display->platform.cherryview)
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 86520848892e0..77819aaeccb76 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
> struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
> struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
>
> - intel_dp->reset_link_params = true;
> + intel_dp_reset_link_params_defer(intel_dp);
> intel_dp_invalidate_source_oui(intel_dp);
>
> intel_pps_encoder_reset(intel_dp);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 1920d2f026665..13163dd085e91 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
> intel_dp->lane_count = lane_count;
> }
>
> -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> +/*
> + * Reset link params now, preserving any deferred connector
> + * detect-time reset request.
> + */
> +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
> {
> intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
> intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
> @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> intel_dp->link.seq_train_failures = 0;
> }
>
> +/*
> + * Reset link params during the next connector detect.
> + * Return %true if a new reset was queued.
> + */
> +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
I find the intel_dp_reset_link_params_defer() vs.
intel_dp_reset_link_params_force() naming rather confusing.
Can't immediately think of a really good name for
intel_dp_reset_link_params_defer() so maybe it's better to not
have a function for it at all (ie. just drop this patch)? Then
you at least see that it's just setting the flag. AFAICS you
only have a single place (in the last patch) that uses this
return value for anything, so could just do the check+set
dance there on the spot.
> +{
> + bool reset_was_pending = intel_dp->reset_link_params;
> +
> + intel_dp->reset_link_params = true;
> +
> + return !reset_was_pending;
> +}
> +
> +static void intel_dp_handle_deferred_link_params_reset(struct intel_dp *intel_dp)
> +{
> + if (!intel_dp->reset_link_params)
> + return;
> +
> + intel_dp->reset_link_params = false;
> + intel_dp_reset_link_params_force(intel_dp);
> +}
> +
> /* Enable backlight PWM and backlight PP control. */
> void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> @@ -4066,7 +4092,7 @@ void intel_dp_sync_state(struct intel_encoder *encoder,
> intel_dp_tunnel_resume(intel_dp, crtc_state, dpcd_updated);
>
> if (crtc_state) {
> - intel_dp_reset_link_params(intel_dp);
> + intel_dp_reset_link_params_force(intel_dp);
> intel_dp_set_link_params(intel_dp, crtc_state->port_clock, crtc_state->lane_count);
> intel_dp->link.active = true;
> }
> @@ -6487,10 +6513,7 @@ intel_dp_detect(struct drm_connector *_connector,
>
> intel_dp_detect_sdp_caps(intel_dp);
>
> - if (intel_dp->reset_link_params) {
> - intel_dp_reset_link_params(intel_dp);
> - intel_dp->reset_link_params = false;
> - }
> + intel_dp_handle_deferred_link_params_reset(intel_dp);
>
> intel_dp_mst_configure(intel_dp);
>
> @@ -6944,7 +6967,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
>
> intel_dp_read_dprx_caps(intel_dp, dpcd);
>
> - intel_dp->reset_link_params = true;
> + intel_dp_reset_link_params_defer(intel_dp);
> intel_dp_invalidate_source_oui(intel_dp);
>
> return IRQ_NONE;
> @@ -7252,7 +7275,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
> encoder->base.name))
> return false;
>
> - intel_dp->reset_link_params = true;
> + intel_dp_reset_link_params_defer(intel_dp);
>
> /* Preserve the current hw state. */
> intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
> @@ -7317,7 +7340,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
>
> intel_dp_set_source_rates(intel_dp);
> intel_dp_set_common_rates(intel_dp);
> - intel_dp_reset_link_params(intel_dp);
> + intel_dp_reset_link_params_force(intel_dp);
>
> /* init MST on ports that can support it */
> intel_dp_mst_encoder_init(dig_port, connector->base.base.id);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index f41480d247142..7c24d3dbb6983 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -114,7 +114,8 @@ int intel_dp_rate_index(const int *rates, int len, int rate);
> int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lane_count);
> void intel_dp_link_config_get(struct intel_dp *intel_dp, int idx, int *link_rate, int *lane_count);
> void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
> -void intel_dp_reset_link_params(struct intel_dp *intel_dp);
> +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp);
> +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp);
>
> void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
> u8 *link_bw, u8 *rate_select);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index a26094223f780..b7075060e7bd3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -1935,7 +1935,7 @@ static ssize_t i915_dp_force_link_rate_write(struct file *file,
> if (err)
> return err;
>
> - intel_dp_reset_link_params(intel_dp);
> + intel_dp_reset_link_params_force(intel_dp);
> intel_dp->link.force_rate = rate;
>
> drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
> @@ -2037,7 +2037,7 @@ static ssize_t i915_dp_force_lane_count_write(struct file *file,
> if (err)
> return err;
>
> - intel_dp_reset_link_params(intel_dp);
> + intel_dp_reset_link_params_force(intel_dp);
> intel_dp->link.force_lane_count = lane_count;
>
> drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
> --
> 2.49.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters
2026-05-18 11:24 ` [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters Imre Deak
@ 2026-05-21 21:43 ` Ville Syrjälä
2026-05-22 7:54 ` Imre Deak
0 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjälä @ 2026-05-21 21:43 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, intel-xe
On Mon, May 18, 2026 at 02:24:26PM +0300, Imre Deak wrote:
> Detect DPRX capability changes without a long HPD or RX_CAP_CHANGED
> signal and queue a corresponding link params reset.
>
> Besides detecting the above unexpected capability changes, this also
> avoids races between queuing and handling a deferred link params reset.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 50 +++++++++++++++++++++----
> 1 file changed, 43 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 6c4dadfc35806..dd968c2d9fa64 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -362,19 +362,25 @@ int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port)
> return max_lanes;
> }
>
> -/* Theoretical max between source and sink */
> -static void intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
> +/*
> + * Theoretical max between source and sink.
> + * Return %true if the max common lane count changed.
> + */
> +static bool intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
> {
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> int source_max = intel_dp_max_source_lane_count(dig_port);
> int sink_max = intel_dp->max_sink_lane_count;
> int lane_max = intel_tc_port_max_lane_count(dig_port);
> int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
> + int old_max_common_lane_count = intel_dp->max_common_lane_count;
>
> if (lttpr_max)
> sink_max = min(sink_max, lttpr_max);
>
> intel_dp->max_common_lane_count = min3(source_max, sink_max, lane_max);
> +
> + return intel_dp->max_common_lane_count != old_max_common_lane_count;
> }
>
> int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> @@ -792,13 +798,20 @@ int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lan
> return -1;
> }
>
> -static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
> +/* Return %true if the common rates changed. */
> +static bool intel_dp_set_common_rates(struct intel_dp *intel_dp)
> {
> struct intel_display *display = to_intel_display(intel_dp);
> + int num_old_common_rates = intel_dp->num_common_rates;
> + int old_common_rates[DP_MAX_SUPPORTED_RATES];
>
> drm_WARN_ON(display->drm,
> !intel_dp->num_source_rates || !intel_dp->num_sink_rates);
>
> + static_assert(sizeof(old_common_rates) == sizeof(intel_dp->common_rates));
Could also assert the element size/type match. Maybe (as a followup
later) introduce a proper type for this rates[]+num construct and then
we could just copy the darn thing with a normal assignment and not have
to worry about this kind of stuff at all...
> + memcpy(old_common_rates, intel_dp->common_rates,
> + num_old_common_rates * sizeof(old_common_rates[0]));
> +
> intel_dp->num_common_rates = intersect_rates(intel_dp->source_rates,
> intel_dp->num_source_rates,
> intel_dp->sink_rates,
> @@ -810,13 +823,26 @@ static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
> intel_dp->common_rates[0] = 162000;
> intel_dp->num_common_rates = 1;
> }
> +
> + return num_old_common_rates != intel_dp->num_common_rates ||
> + memcmp(old_common_rates, intel_dp->common_rates,
> + num_old_common_rates * sizeof(old_common_rates[0]));
> }
>
> -static void intel_dp_set_common_link_params(struct intel_dp *intel_dp)
> +/* Return %true if any common link param changed. */
> +static bool intel_dp_set_common_link_params(struct intel_dp *intel_dp)
> {
> - intel_dp_set_common_rates(intel_dp);
> - intel_dp_set_max_common_lane_count(intel_dp);
> + bool params_changed = false;
> +
> + if (intel_dp_set_common_rates(intel_dp))
> + params_changed = true;
> +
> + if (intel_dp_set_max_common_lane_count(intel_dp))
> + params_changed = true;
> +
> intel_dp_link_config_init(intel_dp);
> +
> + return params_changed;
> }
>
> bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
> @@ -4911,9 +4937,19 @@ intel_dp_has_sink_count(struct intel_dp *intel_dp)
>
> void intel_dp_update_sink_caps(struct intel_dp *intel_dp)
> {
> + struct intel_display *display = to_intel_display(intel_dp);
> +
> intel_dp_set_sink_rates(intel_dp);
> intel_dp_set_max_sink_lane_count(intel_dp);
> - intel_dp_set_common_link_params(intel_dp);
> + /*
> + * Handle unexpected sink cap changes, or a race between setting
> + * the deferred link params flag in the HPD IRQ handler and
> + * clearing the flag during connector detect.
> + */
> + if (intel_dp_set_common_link_params(intel_dp) &&
> + intel_dp_reset_link_params_defer(intel_dp))
> + drm_dbg_kms(display->drm,
> + "DPRX capabilities changed before long HPD or RX_CAP_CHANGED signal\n");
> }
>
> static bool
> --
> 2.49.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/5] drm/i915/dp: Add helper to set common link params
2026-05-18 11:24 ` [PATCH 3/5] drm/i915/dp: Add helper to set common link params Imre Deak
@ 2026-05-22 7:20 ` Hogander, Jouni
0 siblings, 0 replies; 21+ messages in thread
From: Hogander, Jouni @ 2026-05-22 7:20 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Deak, Imre
On Mon, 2026-05-18 at 14:24 +0300, Imre Deak wrote:
> Add intel_dp_set_common_link_params() to prepare for updating the
> maximum common lane count together with the common rates.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9c530ef12b7cc..06bf1fb23faff 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -805,7 +805,11 @@ static void intel_dp_set_common_rates(struct
> intel_dp *intel_dp)
> intel_dp->common_rates[0] = 162000;
> intel_dp->num_common_rates = 1;
> }
> +}
>
> +static void intel_dp_set_common_link_params(struct intel_dp
> *intel_dp)
> +{
> + intel_dp_set_common_rates(intel_dp);
> intel_dp_link_config_init(intel_dp);
> }
>
> @@ -4903,7 +4907,7 @@ void intel_dp_update_sink_caps(struct intel_dp
> *intel_dp)
> {
> intel_dp_set_sink_rates(intel_dp);
> intel_dp_set_max_sink_lane_count(intel_dp);
> - intel_dp_set_common_rates(intel_dp);
> + intel_dp_set_common_link_params(intel_dp);
> }
>
> static bool
> @@ -7341,7 +7345,7 @@ intel_dp_init_connector(struct
> intel_digital_port *dig_port,
> }
>
> intel_dp_set_source_rates(intel_dp);
> - intel_dp_set_common_rates(intel_dp);
> + intel_dp_set_common_link_params(intel_dp);
> intel_dp_reset_link_params_force(intel_dp);
>
> /* init MST on ports that can support it */
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 4/5] drm/i915/dp: Cache max common lane count
2026-05-18 11:24 ` [PATCH 4/5] drm/i915/dp: Cache max common lane count Imre Deak
@ 2026-05-22 7:21 ` Hogander, Jouni
0 siblings, 0 replies; 21+ messages in thread
From: Hogander, Jouni @ 2026-05-22 7:21 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Deak, Imre
On Mon, 2026-05-18 at 14:24 +0300, Imre Deak wrote:
> Cache the maximum common lane count together with the common link
> rates.
>
> This is safe because the cached value is updated:
> - during driver probe, before the connector is registered and can be
> used for mode validation or modesetting
> - during resume, before output HW state readout can query it
> - during connector detection, right after updating the sink/link
> capabilities
>
> Caching the value allows detecting max common lane count changes in
> a follow-up change and keeps the tracking of max common lane count
> aligned with that of common rates.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++--
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index f44be5c689aef..c3811242310c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1820,6 +1820,7 @@ struct intel_dp {
> /* intersection of source and sink rates */
> int num_common_rates;
> int common_rates[DP_MAX_SUPPORTED_RATES];
> + int max_common_lane_count;
> struct {
> /* TODO: move the rest of link specific fields to
> here */
> bool active;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 06bf1fb23faff..6c4dadfc35806 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -363,7 +363,7 @@ int intel_dp_max_source_lane_count(struct
> intel_digital_port *dig_port)
> }
>
> /* Theoretical max between source and sink */
> -int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> +static void intel_dp_set_max_common_lane_count(struct intel_dp
> *intel_dp)
> {
> struct intel_digital_port *dig_port =
> dp_to_dig_port(intel_dp);
> int source_max = intel_dp_max_source_lane_count(dig_port);
> @@ -374,7 +374,12 @@ int intel_dp_max_common_lane_count(struct
> intel_dp *intel_dp)
> if (lttpr_max)
> sink_max = min(sink_max, lttpr_max);
>
> - return min3(source_max, sink_max, lane_max);
> + intel_dp->max_common_lane_count = min3(source_max, sink_max,
> lane_max);
> +}
> +
> +int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> +{
> + return intel_dp->max_common_lane_count;
> }
>
> static int forced_lane_count(struct intel_dp *intel_dp)
> @@ -810,6 +815,7 @@ static void intel_dp_set_common_rates(struct
> intel_dp *intel_dp)
> static void intel_dp_set_common_link_params(struct intel_dp
> *intel_dp)
> {
> intel_dp_set_common_rates(intel_dp);
> + intel_dp_set_max_common_lane_count(intel_dp);
> intel_dp_link_config_init(intel_dp);
> }
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-21 21:36 ` Ville Syrjälä
@ 2026-05-22 7:36 ` Hogander, Jouni
2026-05-22 7:47 ` Imre Deak
1 sibling, 0 replies; 21+ messages in thread
From: Hogander, Jouni @ 2026-05-22 7:36 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, Deak, Imre
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
On Fri, 2026-05-22 at 00:36 +0300, Ville Syrjälä wrote:
> On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
> > Add helpers to defer and handle link params resets instead of
> > open-coding the same. Rename intel_dp_reset_link_params() to
> > intel_dp_reset_link_params_force() to align its name with the new
> > deferred reset helpers.
> >
> > When deferring a reset, return whether a new reset was queued, used
> > by a
> > follow-up change.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_dp.c | 41
> > +++++++++++++++----
> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
> > .../drm/i915/display/intel_dp_link_training.c | 4 +-
> > 5 files changed, 38 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> > b/drivers/gpu/drm/i915/display/g4x_dp.c
> > index 5ff1cdf4581a5..c20a97e21419b 100644
> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> > @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct
> > drm_encoder *encoder)
> >
> > intel_dp->DP = intel_de_read(display, intel_dp-
> > >output_reg);
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> > intel_dp_invalidate_source_oui(intel_dp);
> >
> > if (display->platform.valleyview || display-
> > >platform.cherryview)
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 86520848892e0..77819aaeccb76 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct
> > drm_encoder *encoder)
> > struct intel_dp *intel_dp =
> > enc_to_intel_dp(to_intel_encoder(encoder));
> > struct intel_digital_port *dig_port =
> > enc_to_dig_port(to_intel_encoder(encoder));
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> > intel_dp_invalidate_source_oui(intel_dp);
> >
> > intel_pps_encoder_reset(intel_dp);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 1920d2f026665..13163dd085e91 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct
> > intel_dp *intel_dp,
> > intel_dp->lane_count = lane_count;
> > }
> >
> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> > +/*
> > + * Reset link params now, preserving any deferred connector
> > + * detect-time reset request.
> > + */
> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
> > {
> > intel_dp->link.max_lane_count =
> > intel_dp_max_common_lane_count(intel_dp);
> > intel_dp->link.max_rate =
> > intel_dp_max_common_rate(intel_dp);
> > @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct
> > intel_dp *intel_dp)
> > intel_dp->link.seq_train_failures = 0;
> > }
> >
> > +/*
> > + * Reset link params during the next connector detect.
> > + * Return %true if a new reset was queued.
> > + */
> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
>
> I find the intel_dp_reset_link_params_defer() vs.
> intel_dp_reset_link_params_force() naming rather confusing.
>
> Can't immediately think of a really good name for
> intel_dp_reset_link_params_defer() so maybe it's better to not
> have a function for it at all (ie. just drop this patch)? Then
> you at least see that it's just setting the flag. AFAICS you
> only have a single place (in the last patch) that uses this
> return value for anything, so could just do the check+set
> dance there on the spot.
I found naming here also a bit confusing. Maybe:
intel_dp_link_params_reset
intel_dp_link_params_reset_request
intel_dp_handle_link_params_reset_request
BR,
Jouni Högander
>
> > +{
> > + bool reset_was_pending = intel_dp->reset_link_params;
> > +
> > + intel_dp->reset_link_params = true;
> > +
> > + return !reset_was_pending;
> > +}
> > +
> > +static void intel_dp_handle_deferred_link_params_reset(struct
> > intel_dp *intel_dp)
> > +{
> > + if (!intel_dp->reset_link_params)
> > + return;
> > +
> > + intel_dp->reset_link_params = false;
> > + intel_dp_reset_link_params_force(intel_dp);
> > +}
> > +
> > /* Enable backlight PWM and backlight PP control. */
> > void intel_edp_backlight_on(const struct intel_crtc_state
> > *crtc_state,
> > const struct drm_connector_state
> > *conn_state)
> > @@ -4066,7 +4092,7 @@ void intel_dp_sync_state(struct intel_encoder
> > *encoder,
> > intel_dp_tunnel_resume(intel_dp, crtc_state,
> > dpcd_updated);
> >
> > if (crtc_state) {
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> > intel_dp_set_link_params(intel_dp, crtc_state-
> > >port_clock, crtc_state->lane_count);
> > intel_dp->link.active = true;
> > }
> > @@ -6487,10 +6513,7 @@ intel_dp_detect(struct drm_connector
> > *_connector,
> >
> > intel_dp_detect_sdp_caps(intel_dp);
> >
> > - if (intel_dp->reset_link_params) {
> > - intel_dp_reset_link_params(intel_dp);
> > - intel_dp->reset_link_params = false;
> > - }
> > + intel_dp_handle_deferred_link_params_reset(intel_dp);
> >
> > intel_dp_mst_configure(intel_dp);
> >
> > @@ -6944,7 +6967,7 @@ intel_dp_hpd_pulse(struct intel_digital_port
> > *dig_port, bool long_hpd)
> >
> > intel_dp_read_dprx_caps(intel_dp, dpcd);
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> > intel_dp_invalidate_source_oui(intel_dp);
> >
> > return IRQ_NONE;
> > @@ -7252,7 +7275,7 @@ intel_dp_init_connector(struct
> > intel_digital_port *dig_port,
> > encoder->base.name))
> > return false;
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> >
> > /* Preserve the current hw state. */
> > intel_dp->DP = intel_de_read(display, intel_dp-
> > >output_reg);
> > @@ -7317,7 +7340,7 @@ intel_dp_init_connector(struct
> > intel_digital_port *dig_port,
> >
> > intel_dp_set_source_rates(intel_dp);
> > intel_dp_set_common_rates(intel_dp);
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> >
> > /* init MST on ports that can support it */
> > intel_dp_mst_encoder_init(dig_port, connector-
> > >base.base.id);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> > b/drivers/gpu/drm/i915/display/intel_dp.h
> > index f41480d247142..7c24d3dbb6983 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -114,7 +114,8 @@ int intel_dp_rate_index(const int *rates, int
> > len, int rate);
> > int intel_dp_link_config_index(struct intel_dp *intel_dp, int
> > link_rate, int lane_count);
> > void intel_dp_link_config_get(struct intel_dp *intel_dp, int idx,
> > int *link_rate, int *lane_count);
> > void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp);
> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp);
> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp);
> >
> > void intel_dp_compute_rate(struct intel_dp *intel_dp, int
> > port_clock,
> > u8 *link_bw, u8 *rate_select);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > index a26094223f780..b7075060e7bd3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > @@ -1935,7 +1935,7 @@ static ssize_t
> > i915_dp_force_link_rate_write(struct file *file,
> > if (err)
> > return err;
> >
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> > intel_dp->link.force_rate = rate;
> >
> > drm_modeset_unlock(&display->drm-
> > >mode_config.connection_mutex);
> > @@ -2037,7 +2037,7 @@ static ssize_t
> > i915_dp_force_lane_count_write(struct file *file,
> > if (err)
> > return err;
> >
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> > intel_dp->link.force_lane_count = lane_count;
> >
> > drm_modeset_unlock(&display->drm-
> > >mode_config.connection_mutex);
> > --
> > 2.49.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-21 21:36 ` Ville Syrjälä
2026-05-22 7:36 ` Hogander, Jouni
@ 2026-05-22 7:47 ` Imre Deak
2026-05-22 10:29 ` Jani Nikula
1 sibling, 1 reply; 21+ messages in thread
From: Imre Deak @ 2026-05-22 7:47 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: Jouni Hogander, intel-gfx, intel-xe
On Fri, May 22, 2026 at 12:36:27AM +0300, Ville Syrjälä wrote:
> On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
> > Add helpers to defer and handle link params resets instead of
> > open-coding the same. Rename intel_dp_reset_link_params() to
> > intel_dp_reset_link_params_force() to align its name with the new
> > deferred reset helpers.
> >
> > When deferring a reset, return whether a new reset was queued, used by a
> > follow-up change.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
> > .../drm/i915/display/intel_dp_link_training.c | 4 +-
> > 5 files changed, 38 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> > index 5ff1cdf4581a5..c20a97e21419b 100644
> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> > @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
> >
> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> > intel_dp_invalidate_source_oui(intel_dp);
> >
> > if (display->platform.valleyview || display->platform.cherryview)
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 86520848892e0..77819aaeccb76 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
> > struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
> > struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> > intel_dp_invalidate_source_oui(intel_dp);
> >
> > intel_pps_encoder_reset(intel_dp);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 1920d2f026665..13163dd085e91 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
> > intel_dp->lane_count = lane_count;
> > }
> >
> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> > +/*
> > + * Reset link params now, preserving any deferred connector
> > + * detect-time reset request.
> > + */
> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
> > {
> > intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
> > intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
> > @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> > intel_dp->link.seq_train_failures = 0;
> > }
> >
> > +/*
> > + * Reset link params during the next connector detect.
> > + * Return %true if a new reset was queued.
> > + */
> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
>
> I find the intel_dp_reset_link_params_defer() vs.
> intel_dp_reset_link_params_force() naming rather confusing.
>
> Can't immediately think of a really good name for
> intel_dp_reset_link_params_defer() so maybe it's better to not
> have a function for it at all (ie. just drop this patch)?
The idea was to have an interface to reset the link params directly or
in a deferred way, instead of a direct access of the flag.
The names are not great yes. I could use what Jouni suggested instead,
or if the above argument is not good enough I can also drop this patch.
> Then you at least see that it's just setting the flag. AFAICS you only
> have a single place (in the last patch) that uses this return value
> for anything, so could just do the check+set dance there on the spot.
>
> > +{
> > + bool reset_was_pending = intel_dp->reset_link_params;
> > +
> > + intel_dp->reset_link_params = true;
> > +
> > + return !reset_was_pending;
> > +}
> > +
> > +static void intel_dp_handle_deferred_link_params_reset(struct intel_dp *intel_dp)
> > +{
> > + if (!intel_dp->reset_link_params)
> > + return;
> > +
> > + intel_dp->reset_link_params = false;
> > + intel_dp_reset_link_params_force(intel_dp);
> > +}
> > +
> > /* Enable backlight PWM and backlight PP control. */
> > void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state *conn_state)
> > @@ -4066,7 +4092,7 @@ void intel_dp_sync_state(struct intel_encoder *encoder,
> > intel_dp_tunnel_resume(intel_dp, crtc_state, dpcd_updated);
> >
> > if (crtc_state) {
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> > intel_dp_set_link_params(intel_dp, crtc_state->port_clock, crtc_state->lane_count);
> > intel_dp->link.active = true;
> > }
> > @@ -6487,10 +6513,7 @@ intel_dp_detect(struct drm_connector *_connector,
> >
> > intel_dp_detect_sdp_caps(intel_dp);
> >
> > - if (intel_dp->reset_link_params) {
> > - intel_dp_reset_link_params(intel_dp);
> > - intel_dp->reset_link_params = false;
> > - }
> > + intel_dp_handle_deferred_link_params_reset(intel_dp);
> >
> > intel_dp_mst_configure(intel_dp);
> >
> > @@ -6944,7 +6967,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
> >
> > intel_dp_read_dprx_caps(intel_dp, dpcd);
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> > intel_dp_invalidate_source_oui(intel_dp);
> >
> > return IRQ_NONE;
> > @@ -7252,7 +7275,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
> > encoder->base.name))
> > return false;
> >
> > - intel_dp->reset_link_params = true;
> > + intel_dp_reset_link_params_defer(intel_dp);
> >
> > /* Preserve the current hw state. */
> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
> > @@ -7317,7 +7340,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
> >
> > intel_dp_set_source_rates(intel_dp);
> > intel_dp_set_common_rates(intel_dp);
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> >
> > /* init MST on ports that can support it */
> > intel_dp_mst_encoder_init(dig_port, connector->base.base.id);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> > index f41480d247142..7c24d3dbb6983 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -114,7 +114,8 @@ int intel_dp_rate_index(const int *rates, int len, int rate);
> > int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lane_count);
> > void intel_dp_link_config_get(struct intel_dp *intel_dp, int idx, int *link_rate, int *lane_count);
> > void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp);
> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp);
> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp);
> >
> > void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
> > u8 *link_bw, u8 *rate_select);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > index a26094223f780..b7075060e7bd3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > @@ -1935,7 +1935,7 @@ static ssize_t i915_dp_force_link_rate_write(struct file *file,
> > if (err)
> > return err;
> >
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> > intel_dp->link.force_rate = rate;
> >
> > drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
> > @@ -2037,7 +2037,7 @@ static ssize_t i915_dp_force_lane_count_write(struct file *file,
> > if (err)
> > return err;
> >
> > - intel_dp_reset_link_params(intel_dp);
> > + intel_dp_reset_link_params_force(intel_dp);
> > intel_dp->link.force_lane_count = lane_count;
> >
> > drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
> > --
> > 2.49.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters
2026-05-21 21:43 ` Ville Syrjälä
@ 2026-05-22 7:54 ` Imre Deak
0 siblings, 0 replies; 21+ messages in thread
From: Imre Deak @ 2026-05-22 7:54 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe
On Fri, May 22, 2026 at 12:43:41AM +0300, Ville Syrjälä wrote:
> On Mon, May 18, 2026 at 02:24:26PM +0300, Imre Deak wrote:
> > Detect DPRX capability changes without a long HPD or RX_CAP_CHANGED
> > signal and queue a corresponding link params reset.
> >
> > Besides detecting the above unexpected capability changes, this also
> > avoids races between queuing and handling a deferred link params reset.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 50 +++++++++++++++++++++----
> > 1 file changed, 43 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 6c4dadfc35806..dd968c2d9fa64 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -362,19 +362,25 @@ int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port)
> > return max_lanes;
> > }
> >
> > -/* Theoretical max between source and sink */
> > -static void intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
> > +/*
> > + * Theoretical max between source and sink.
> > + * Return %true if the max common lane count changed.
> > + */
> > +static bool intel_dp_set_max_common_lane_count(struct intel_dp *intel_dp)
> > {
> > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > int source_max = intel_dp_max_source_lane_count(dig_port);
> > int sink_max = intel_dp->max_sink_lane_count;
> > int lane_max = intel_tc_port_max_lane_count(dig_port);
> > int lttpr_max = drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
> > + int old_max_common_lane_count = intel_dp->max_common_lane_count;
> >
> > if (lttpr_max)
> > sink_max = min(sink_max, lttpr_max);
> >
> > intel_dp->max_common_lane_count = min3(source_max, sink_max, lane_max);
> > +
> > + return intel_dp->max_common_lane_count != old_max_common_lane_count;
> > }
> >
> > int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> > @@ -792,13 +798,20 @@ int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lan
> > return -1;
> > }
> >
> > -static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
> > +/* Return %true if the common rates changed. */
> > +static bool intel_dp_set_common_rates(struct intel_dp *intel_dp)
> > {
> > struct intel_display *display = to_intel_display(intel_dp);
> > + int num_old_common_rates = intel_dp->num_common_rates;
> > + int old_common_rates[DP_MAX_SUPPORTED_RATES];
> >
> > drm_WARN_ON(display->drm,
> > !intel_dp->num_source_rates || !intel_dp->num_sink_rates);
> >
> > + static_assert(sizeof(old_common_rates) == sizeof(intel_dp->common_rates));
>
> Could also assert the element size/type match. Maybe (as a followup
> later) introduce a proper type for this rates[]+num construct and then
> we could just copy the darn thing with a normal assignment and not have
> to worry about this kind of stuff at all...
Yes, makes sense. I'd have to pass common rates to
intel_dp_link_config_init() later (in the link capability refactor
patchset), so could do what you suggest at that point.
The struct could be used then for source and sink rates as well.
>
> > + memcpy(old_common_rates, intel_dp->common_rates,
> > + num_old_common_rates * sizeof(old_common_rates[0]));
> > +
> > intel_dp->num_common_rates = intersect_rates(intel_dp->source_rates,
> > intel_dp->num_source_rates,
> > intel_dp->sink_rates,
> > @@ -810,13 +823,26 @@ static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
> > intel_dp->common_rates[0] = 162000;
> > intel_dp->num_common_rates = 1;
> > }
> > +
> > + return num_old_common_rates != intel_dp->num_common_rates ||
> > + memcmp(old_common_rates, intel_dp->common_rates,
> > + num_old_common_rates * sizeof(old_common_rates[0]));
> > }
> >
> > -static void intel_dp_set_common_link_params(struct intel_dp *intel_dp)
> > +/* Return %true if any common link param changed. */
> > +static bool intel_dp_set_common_link_params(struct intel_dp *intel_dp)
> > {
> > - intel_dp_set_common_rates(intel_dp);
> > - intel_dp_set_max_common_lane_count(intel_dp);
> > + bool params_changed = false;
> > +
> > + if (intel_dp_set_common_rates(intel_dp))
> > + params_changed = true;
> > +
> > + if (intel_dp_set_max_common_lane_count(intel_dp))
> > + params_changed = true;
> > +
> > intel_dp_link_config_init(intel_dp);
> > +
> > + return params_changed;
> > }
> >
> > bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
> > @@ -4911,9 +4937,19 @@ intel_dp_has_sink_count(struct intel_dp *intel_dp)
> >
> > void intel_dp_update_sink_caps(struct intel_dp *intel_dp)
> > {
> > + struct intel_display *display = to_intel_display(intel_dp);
> > +
> > intel_dp_set_sink_rates(intel_dp);
> > intel_dp_set_max_sink_lane_count(intel_dp);
> > - intel_dp_set_common_link_params(intel_dp);
> > + /*
> > + * Handle unexpected sink cap changes, or a race between setting
> > + * the deferred link params flag in the HPD IRQ handler and
> > + * clearing the flag during connector detect.
> > + */
> > + if (intel_dp_set_common_link_params(intel_dp) &&
> > + intel_dp_reset_link_params_defer(intel_dp))
> > + drm_dbg_kms(display->drm,
> > + "DPRX capabilities changed before long HPD or RX_CAP_CHANGED signal\n");
> > }
> >
> > static bool
> > --
> > 2.49.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-22 7:47 ` Imre Deak
@ 2026-05-22 10:29 ` Jani Nikula
2026-05-22 12:39 ` Ville Syrjälä
0 siblings, 1 reply; 21+ messages in thread
From: Jani Nikula @ 2026-05-22 10:29 UTC (permalink / raw)
To: imre.deak, Ville Syrjälä; +Cc: Jouni Hogander, intel-gfx, intel-xe
On Fri, 22 May 2026, Imre Deak <imre.deak@intel.com> wrote:
> On Fri, May 22, 2026 at 12:36:27AM +0300, Ville Syrjälä wrote:
>> On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
>> > Add helpers to defer and handle link params resets instead of
>> > open-coding the same. Rename intel_dp_reset_link_params() to
>> > intel_dp_reset_link_params_force() to align its name with the new
>> > deferred reset helpers.
>> >
>> > When deferring a reset, return whether a new reset was queued, used by a
>> > follow-up change.
>> >
>> > Signed-off-by: Imre Deak <imre.deak@intel.com>
>> > ---
>> > drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
>> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
>> > drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
>> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
>> > .../drm/i915/display/intel_dp_link_training.c | 4 +-
>> > 5 files changed, 38 insertions(+), 14 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
>> > index 5ff1cdf4581a5..c20a97e21419b 100644
>> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
>> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
>> > @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
>> >
>> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
>> >
>> > - intel_dp->reset_link_params = true;
>> > + intel_dp_reset_link_params_defer(intel_dp);
>> > intel_dp_invalidate_source_oui(intel_dp);
>> >
>> > if (display->platform.valleyview || display->platform.cherryview)
>> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>> > index 86520848892e0..77819aaeccb76 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> > @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
>> > struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
>> > struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
>> >
>> > - intel_dp->reset_link_params = true;
>> > + intel_dp_reset_link_params_defer(intel_dp);
>> > intel_dp_invalidate_source_oui(intel_dp);
>> >
>> > intel_pps_encoder_reset(intel_dp);
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> > index 1920d2f026665..13163dd085e91 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> > @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
>> > intel_dp->lane_count = lane_count;
>> > }
>> >
>> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
>> > +/*
>> > + * Reset link params now, preserving any deferred connector
>> > + * detect-time reset request.
>> > + */
>> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
>> > {
>> > intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
>> > intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
>> > @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
>> > intel_dp->link.seq_train_failures = 0;
>> > }
>> >
>> > +/*
>> > + * Reset link params during the next connector detect.
>> > + * Return %true if a new reset was queued.
>> > + */
>> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
>>
>> I find the intel_dp_reset_link_params_defer() vs.
>> intel_dp_reset_link_params_force() naming rather confusing.
>>
>> Can't immediately think of a really good name for
>> intel_dp_reset_link_params_defer() so maybe it's better to not
>> have a function for it at all (ie. just drop this patch)?
>
> The idea was to have an interface to reset the link params directly or
> in a deferred way, instead of a direct access of the flag.
>
> The names are not great yes. I could use what Jouni suggested instead,
> or if the above argument is not good enough I can also drop this patch.
I suggest intel_dp_reset_link_params() keeps its name, or gets renamed
to intel_dp_link_params_reset(). It just does the thing, no "force".
Then the other two use something like:
- submit/process
- queue/process
- stage/handle
or some combination i.e. something like:
intel_dp_link_params_reset()
intel_dp_link_params_reset_submit()
intel_dp_link_params_reset_process()
BR,
Jani.
>
>> Then you at least see that it's just setting the flag. AFAICS you only
>> have a single place (in the last patch) that uses this return value
>> for anything, so could just do the check+set dance there on the spot.
>
>>
>> > +{
>> > + bool reset_was_pending = intel_dp->reset_link_params;
>> > +
>> > + intel_dp->reset_link_params = true;
>> > +
>> > + return !reset_was_pending;
>> > +}
>> > +
>> > +static void intel_dp_handle_deferred_link_params_reset(struct intel_dp *intel_dp)
>> > +{
>> > + if (!intel_dp->reset_link_params)
>> > + return;
>> > +
>> > + intel_dp->reset_link_params = false;
>> > + intel_dp_reset_link_params_force(intel_dp);
>> > +}
>> > +
>> > /* Enable backlight PWM and backlight PP control. */
>> > void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
>> > const struct drm_connector_state *conn_state)
>> > @@ -4066,7 +4092,7 @@ void intel_dp_sync_state(struct intel_encoder *encoder,
>> > intel_dp_tunnel_resume(intel_dp, crtc_state, dpcd_updated);
>> >
>> > if (crtc_state) {
>> > - intel_dp_reset_link_params(intel_dp);
>> > + intel_dp_reset_link_params_force(intel_dp);
>> > intel_dp_set_link_params(intel_dp, crtc_state->port_clock, crtc_state->lane_count);
>> > intel_dp->link.active = true;
>> > }
>> > @@ -6487,10 +6513,7 @@ intel_dp_detect(struct drm_connector *_connector,
>> >
>> > intel_dp_detect_sdp_caps(intel_dp);
>> >
>> > - if (intel_dp->reset_link_params) {
>> > - intel_dp_reset_link_params(intel_dp);
>> > - intel_dp->reset_link_params = false;
>> > - }
>> > + intel_dp_handle_deferred_link_params_reset(intel_dp);
>> >
>> > intel_dp_mst_configure(intel_dp);
>> >
>> > @@ -6944,7 +6967,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd)
>> >
>> > intel_dp_read_dprx_caps(intel_dp, dpcd);
>> >
>> > - intel_dp->reset_link_params = true;
>> > + intel_dp_reset_link_params_defer(intel_dp);
>> > intel_dp_invalidate_source_oui(intel_dp);
>> >
>> > return IRQ_NONE;
>> > @@ -7252,7 +7275,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
>> > encoder->base.name))
>> > return false;
>> >
>> > - intel_dp->reset_link_params = true;
>> > + intel_dp_reset_link_params_defer(intel_dp);
>> >
>> > /* Preserve the current hw state. */
>> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
>> > @@ -7317,7 +7340,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
>> >
>> > intel_dp_set_source_rates(intel_dp);
>> > intel_dp_set_common_rates(intel_dp);
>> > - intel_dp_reset_link_params(intel_dp);
>> > + intel_dp_reset_link_params_force(intel_dp);
>> >
>> > /* init MST on ports that can support it */
>> > intel_dp_mst_encoder_init(dig_port, connector->base.base.id);
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
>> > index f41480d247142..7c24d3dbb6983 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
>> > @@ -114,7 +114,8 @@ int intel_dp_rate_index(const int *rates, int len, int rate);
>> > int intel_dp_link_config_index(struct intel_dp *intel_dp, int link_rate, int lane_count);
>> > void intel_dp_link_config_get(struct intel_dp *intel_dp, int idx, int *link_rate, int *lane_count);
>> > void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
>> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp);
>> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp);
>> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp);
>> >
>> > void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
>> > u8 *link_bw, u8 *rate_select);
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> > index a26094223f780..b7075060e7bd3 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
>> > @@ -1935,7 +1935,7 @@ static ssize_t i915_dp_force_link_rate_write(struct file *file,
>> > if (err)
>> > return err;
>> >
>> > - intel_dp_reset_link_params(intel_dp);
>> > + intel_dp_reset_link_params_force(intel_dp);
>> > intel_dp->link.force_rate = rate;
>> >
>> > drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
>> > @@ -2037,7 +2037,7 @@ static ssize_t i915_dp_force_lane_count_write(struct file *file,
>> > if (err)
>> > return err;
>> >
>> > - intel_dp_reset_link_params(intel_dp);
>> > + intel_dp_reset_link_params_force(intel_dp);
>> > intel_dp->link.force_lane_count = lane_count;
>> >
>> > drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
>> > --
>> > 2.49.1
>>
>> --
>> Ville Syrjälä
>> Intel
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-22 10:29 ` Jani Nikula
@ 2026-05-22 12:39 ` Ville Syrjälä
2026-05-22 12:46 ` Jani Nikula
0 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjälä @ 2026-05-22 12:39 UTC (permalink / raw)
To: Jani Nikula; +Cc: imre.deak, Jouni Hogander, intel-gfx, intel-xe
On Fri, May 22, 2026 at 01:29:39PM +0300, Jani Nikula wrote:
> On Fri, 22 May 2026, Imre Deak <imre.deak@intel.com> wrote:
> > On Fri, May 22, 2026 at 12:36:27AM +0300, Ville Syrjälä wrote:
> >> On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
> >> > Add helpers to defer and handle link params resets instead of
> >> > open-coding the same. Rename intel_dp_reset_link_params() to
> >> > intel_dp_reset_link_params_force() to align its name with the new
> >> > deferred reset helpers.
> >> >
> >> > When deferring a reset, return whether a new reset was queued, used by a
> >> > follow-up change.
> >> >
> >> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> >> > ---
> >> > drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> >> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> >> > drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
> >> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
> >> > .../drm/i915/display/intel_dp_link_training.c | 4 +-
> >> > 5 files changed, 38 insertions(+), 14 deletions(-)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> >> > index 5ff1cdf4581a5..c20a97e21419b 100644
> >> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> >> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> >> > @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
> >> >
> >> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
> >> >
> >> > - intel_dp->reset_link_params = true;
> >> > + intel_dp_reset_link_params_defer(intel_dp);
> >> > intel_dp_invalidate_source_oui(intel_dp);
> >> >
> >> > if (display->platform.valleyview || display->platform.cherryview)
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> > index 86520848892e0..77819aaeccb76 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> > @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
> >> > struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
> >> > struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
> >> >
> >> > - intel_dp->reset_link_params = true;
> >> > + intel_dp_reset_link_params_defer(intel_dp);
> >> > intel_dp_invalidate_source_oui(intel_dp);
> >> >
> >> > intel_pps_encoder_reset(intel_dp);
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> > index 1920d2f026665..13163dd085e91 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> > @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
> >> > intel_dp->lane_count = lane_count;
> >> > }
> >> >
> >> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> >> > +/*
> >> > + * Reset link params now, preserving any deferred connector
> >> > + * detect-time reset request.
> >> > + */
> >> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
> >> > {
> >> > intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
> >> > intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
> >> > @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> >> > intel_dp->link.seq_train_failures = 0;
> >> > }
> >> >
> >> > +/*
> >> > + * Reset link params during the next connector detect.
> >> > + * Return %true if a new reset was queued.
> >> > + */
> >> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
> >>
> >> I find the intel_dp_reset_link_params_defer() vs.
> >> intel_dp_reset_link_params_force() naming rather confusing.
> >>
> >> Can't immediately think of a really good name for
> >> intel_dp_reset_link_params_defer() so maybe it's better to not
> >> have a function for it at all (ie. just drop this patch)?
> >
> > The idea was to have an interface to reset the link params directly or
> > in a deferred way, instead of a direct access of the flag.
> >
> > The names are not great yes. I could use what Jouni suggested instead,
> > or if the above argument is not good enough I can also drop this patch.
>
> I suggest intel_dp_reset_link_params() keeps its name, or gets renamed
> to intel_dp_link_params_reset(). It just does the thing, no "force".
>
> Then the other two use something like:
>
> - submit/process
> - queue/process
> - stage/handle
>
> or some combination i.e. something like:
>
> intel_dp_link_params_reset()
> intel_dp_link_params_reset_submit()
> intel_dp_link_params_reset_process()
All of it kinda leaves it a bit unclear how these things
are related, and then one probably has to read through
them to figure out what they're actually doing.
Hence why I think just setting/checking the flag on the
spot might be the clearest approach. You can immediately
find where it's set vs. checked.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-22 12:39 ` Ville Syrjälä
@ 2026-05-22 12:46 ` Jani Nikula
2026-05-22 12:50 ` Ville Syrjälä
0 siblings, 1 reply; 21+ messages in thread
From: Jani Nikula @ 2026-05-22 12:46 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: imre.deak, Jouni Hogander, intel-gfx, intel-xe
On Fri, 22 May 2026, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, May 22, 2026 at 01:29:39PM +0300, Jani Nikula wrote:
>> On Fri, 22 May 2026, Imre Deak <imre.deak@intel.com> wrote:
>> > On Fri, May 22, 2026 at 12:36:27AM +0300, Ville Syrjälä wrote:
>> >> On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
>> >> > Add helpers to defer and handle link params resets instead of
>> >> > open-coding the same. Rename intel_dp_reset_link_params() to
>> >> > intel_dp_reset_link_params_force() to align its name with the new
>> >> > deferred reset helpers.
>> >> >
>> >> > When deferring a reset, return whether a new reset was queued, used by a
>> >> > follow-up change.
>> >> >
>> >> > Signed-off-by: Imre Deak <imre.deak@intel.com>
>> >> > ---
>> >> > drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
>> >> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
>> >> > drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
>> >> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
>> >> > .../drm/i915/display/intel_dp_link_training.c | 4 +-
>> >> > 5 files changed, 38 insertions(+), 14 deletions(-)
>> >> >
>> >> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
>> >> > index 5ff1cdf4581a5..c20a97e21419b 100644
>> >> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
>> >> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
>> >> > @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
>> >> >
>> >> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
>> >> >
>> >> > - intel_dp->reset_link_params = true;
>> >> > + intel_dp_reset_link_params_defer(intel_dp);
>> >> > intel_dp_invalidate_source_oui(intel_dp);
>> >> >
>> >> > if (display->platform.valleyview || display->platform.cherryview)
>> >> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>> >> > index 86520848892e0..77819aaeccb76 100644
>> >> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> >> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> >> > @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
>> >> > struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
>> >> > struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
>> >> >
>> >> > - intel_dp->reset_link_params = true;
>> >> > + intel_dp_reset_link_params_defer(intel_dp);
>> >> > intel_dp_invalidate_source_oui(intel_dp);
>> >> >
>> >> > intel_pps_encoder_reset(intel_dp);
>> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> >> > index 1920d2f026665..13163dd085e91 100644
>> >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> >> > @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
>> >> > intel_dp->lane_count = lane_count;
>> >> > }
>> >> >
>> >> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
>> >> > +/*
>> >> > + * Reset link params now, preserving any deferred connector
>> >> > + * detect-time reset request.
>> >> > + */
>> >> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
>> >> > {
>> >> > intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
>> >> > intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
>> >> > @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
>> >> > intel_dp->link.seq_train_failures = 0;
>> >> > }
>> >> >
>> >> > +/*
>> >> > + * Reset link params during the next connector detect.
>> >> > + * Return %true if a new reset was queued.
>> >> > + */
>> >> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
>> >>
>> >> I find the intel_dp_reset_link_params_defer() vs.
>> >> intel_dp_reset_link_params_force() naming rather confusing.
>> >>
>> >> Can't immediately think of a really good name for
>> >> intel_dp_reset_link_params_defer() so maybe it's better to not
>> >> have a function for it at all (ie. just drop this patch)?
>> >
>> > The idea was to have an interface to reset the link params directly or
>> > in a deferred way, instead of a direct access of the flag.
>> >
>> > The names are not great yes. I could use what Jouni suggested instead,
>> > or if the above argument is not good enough I can also drop this patch.
>>
>> I suggest intel_dp_reset_link_params() keeps its name, or gets renamed
>> to intel_dp_link_params_reset(). It just does the thing, no "force".
>>
>> Then the other two use something like:
>>
>> - submit/process
>> - queue/process
>> - stage/handle
>>
>> or some combination i.e. something like:
>>
>> intel_dp_link_params_reset()
>> intel_dp_link_params_reset_submit()
>> intel_dp_link_params_reset_process()
>
> All of it kinda leaves it a bit unclear how these things
> are related, and then one probably has to read through
> them to figure out what they're actually doing.
>
> Hence why I think just setting/checking the flag on the
> spot might be the clearest approach. You can immediately
> find where it's set vs. checked.
Trouble is if you want to hide that flag in an opaque type in the
future.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-22 12:46 ` Jani Nikula
@ 2026-05-22 12:50 ` Ville Syrjälä
2026-05-22 15:32 ` Imre Deak
0 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjälä @ 2026-05-22 12:50 UTC (permalink / raw)
To: Jani Nikula; +Cc: imre.deak, Jouni Hogander, intel-gfx, intel-xe
On Fri, May 22, 2026 at 03:46:50PM +0300, Jani Nikula wrote:
> On Fri, 22 May 2026, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Fri, May 22, 2026 at 01:29:39PM +0300, Jani Nikula wrote:
> >> On Fri, 22 May 2026, Imre Deak <imre.deak@intel.com> wrote:
> >> > On Fri, May 22, 2026 at 12:36:27AM +0300, Ville Syrjälä wrote:
> >> >> On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
> >> >> > Add helpers to defer and handle link params resets instead of
> >> >> > open-coding the same. Rename intel_dp_reset_link_params() to
> >> >> > intel_dp_reset_link_params_force() to align its name with the new
> >> >> > deferred reset helpers.
> >> >> >
> >> >> > When deferring a reset, return whether a new reset was queued, used by a
> >> >> > follow-up change.
> >> >> >
> >> >> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> >> >> > ---
> >> >> > drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> >> >> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> >> >> > drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
> >> >> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
> >> >> > .../drm/i915/display/intel_dp_link_training.c | 4 +-
> >> >> > 5 files changed, 38 insertions(+), 14 deletions(-)
> >> >> >
> >> >> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> >> >> > index 5ff1cdf4581a5..c20a97e21419b 100644
> >> >> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> >> >> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> >> >> > @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
> >> >> >
> >> >> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
> >> >> >
> >> >> > - intel_dp->reset_link_params = true;
> >> >> > + intel_dp_reset_link_params_defer(intel_dp);
> >> >> > intel_dp_invalidate_source_oui(intel_dp);
> >> >> >
> >> >> > if (display->platform.valleyview || display->platform.cherryview)
> >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> >> > index 86520848892e0..77819aaeccb76 100644
> >> >> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> >> >> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> >> >> > @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
> >> >> > struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
> >> >> > struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
> >> >> >
> >> >> > - intel_dp->reset_link_params = true;
> >> >> > + intel_dp_reset_link_params_defer(intel_dp);
> >> >> > intel_dp_invalidate_source_oui(intel_dp);
> >> >> >
> >> >> > intel_pps_encoder_reset(intel_dp);
> >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> >> > index 1920d2f026665..13163dd085e91 100644
> >> >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> >> > @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
> >> >> > intel_dp->lane_count = lane_count;
> >> >> > }
> >> >> >
> >> >> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> >> >> > +/*
> >> >> > + * Reset link params now, preserving any deferred connector
> >> >> > + * detect-time reset request.
> >> >> > + */
> >> >> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
> >> >> > {
> >> >> > intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
> >> >> > intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
> >> >> > @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> >> >> > intel_dp->link.seq_train_failures = 0;
> >> >> > }
> >> >> >
> >> >> > +/*
> >> >> > + * Reset link params during the next connector detect.
> >> >> > + * Return %true if a new reset was queued.
> >> >> > + */
> >> >> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
> >> >>
> >> >> I find the intel_dp_reset_link_params_defer() vs.
> >> >> intel_dp_reset_link_params_force() naming rather confusing.
> >> >>
> >> >> Can't immediately think of a really good name for
> >> >> intel_dp_reset_link_params_defer() so maybe it's better to not
> >> >> have a function for it at all (ie. just drop this patch)?
> >> >
> >> > The idea was to have an interface to reset the link params directly or
> >> > in a deferred way, instead of a direct access of the flag.
> >> >
> >> > The names are not great yes. I could use what Jouni suggested instead,
> >> > or if the above argument is not good enough I can also drop this patch.
> >>
> >> I suggest intel_dp_reset_link_params() keeps its name, or gets renamed
> >> to intel_dp_link_params_reset(). It just does the thing, no "force".
> >>
> >> Then the other two use something like:
> >>
> >> - submit/process
> >> - queue/process
> >> - stage/handle
> >>
> >> or some combination i.e. something like:
> >>
> >> intel_dp_link_params_reset()
> >> intel_dp_link_params_reset_submit()
> >> intel_dp_link_params_reset_process()
> >
> > All of it kinda leaves it a bit unclear how these things
> > are related, and then one probably has to read through
> > them to figure out what they're actually doing.
> >
> > Hence why I think just setting/checking the flag on the
> > spot might be the clearest approach. You can immediately
> > find where it's set vs. checked.
>
> Trouble is if you want to hide that flag in an opaque type in the
> future.
Do we want that?
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/5] drm/i915/dp: Add helpers to reset link params
2026-05-22 12:50 ` Ville Syrjälä
@ 2026-05-22 15:32 ` Imre Deak
0 siblings, 0 replies; 21+ messages in thread
From: Imre Deak @ 2026-05-22 15:32 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: Jani Nikula, Jouni Hogander, intel-gfx, intel-xe
On Fri, May 22, 2026 at 03:50:38PM +0300, Ville Syrjälä wrote:
> On Fri, May 22, 2026 at 03:46:50PM +0300, Jani Nikula wrote:
> > On Fri, 22 May 2026, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > > On Fri, May 22, 2026 at 01:29:39PM +0300, Jani Nikula wrote:
> > >> On Fri, 22 May 2026, Imre Deak <imre.deak@intel.com> wrote:
> > >> > On Fri, May 22, 2026 at 12:36:27AM +0300, Ville Syrjälä wrote:
> > >> >> On Mon, May 18, 2026 at 02:24:22PM +0300, Imre Deak wrote:
> > >> >> > Add helpers to defer and handle link params resets instead of
> > >> >> > open-coding the same. Rename intel_dp_reset_link_params() to
> > >> >> > intel_dp_reset_link_params_force() to align its name with the new
> > >> >> > deferred reset helpers.
> > >> >> >
> > >> >> > When deferring a reset, return whether a new reset was queued, used by a
> > >> >> > follow-up change.
> > >> >> >
> > >> >> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > >> >> > ---
> > >> >> > drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> > >> >> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> > >> >> > drivers/gpu/drm/i915/display/intel_dp.c | 41 +++++++++++++++----
> > >> >> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
> > >> >> > .../drm/i915/display/intel_dp_link_training.c | 4 +-
> > >> >> > 5 files changed, 38 insertions(+), 14 deletions(-)
> > >> >> >
> > >> >> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> > >> >> > index 5ff1cdf4581a5..c20a97e21419b 100644
> > >> >> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> > >> >> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> > >> >> > @@ -1265,7 +1265,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
> > >> >> >
> > >> >> > intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
> > >> >> >
> > >> >> > - intel_dp->reset_link_params = true;
> > >> >> > + intel_dp_reset_link_params_defer(intel_dp);
> > >> >> > intel_dp_invalidate_source_oui(intel_dp);
> > >> >> >
> > >> >> > if (display->platform.valleyview || display->platform.cherryview)
> > >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > >> >> > index 86520848892e0..77819aaeccb76 100644
> > >> >> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > >> >> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > >> >> > @@ -4664,7 +4664,7 @@ static void intel_ddi_encoder_reset(struct drm_encoder *encoder)
> > >> >> > struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
> > >> >> > struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
> > >> >> >
> > >> >> > - intel_dp->reset_link_params = true;
> > >> >> > + intel_dp_reset_link_params_defer(intel_dp);
> > >> >> > intel_dp_invalidate_source_oui(intel_dp);
> > >> >> >
> > >> >> > intel_pps_encoder_reset(intel_dp);
> > >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > >> >> > index 1920d2f026665..13163dd085e91 100644
> > >> >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > >> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > >> >> > @@ -3710,7 +3710,11 @@ void intel_dp_set_link_params(struct intel_dp *intel_dp,
> > >> >> > intel_dp->lane_count = lane_count;
> > >> >> > }
> > >> >> >
> > >> >> > -void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> > >> >> > +/*
> > >> >> > + * Reset link params now, preserving any deferred connector
> > >> >> > + * detect-time reset request.
> > >> >> > + */
> > >> >> > +void intel_dp_reset_link_params_force(struct intel_dp *intel_dp)
> > >> >> > {
> > >> >> > intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp);
> > >> >> > intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
> > >> >> > @@ -3720,6 +3724,28 @@ void intel_dp_reset_link_params(struct intel_dp *intel_dp)
> > >> >> > intel_dp->link.seq_train_failures = 0;
> > >> >> > }
> > >> >> >
> > >> >> > +/*
> > >> >> > + * Reset link params during the next connector detect.
> > >> >> > + * Return %true if a new reset was queued.
> > >> >> > + */
> > >> >> > +bool intel_dp_reset_link_params_defer(struct intel_dp *intel_dp)
> > >> >>
> > >> >> I find the intel_dp_reset_link_params_defer() vs.
> > >> >> intel_dp_reset_link_params_force() naming rather confusing.
> > >> >>
> > >> >> Can't immediately think of a really good name for
> > >> >> intel_dp_reset_link_params_defer() so maybe it's better to not
> > >> >> have a function for it at all (ie. just drop this patch)?
> > >> >
> > >> > The idea was to have an interface to reset the link params directly or
> > >> > in a deferred way, instead of a direct access of the flag.
> > >> >
> > >> > The names are not great yes. I could use what Jouni suggested instead,
> > >> > or if the above argument is not good enough I can also drop this patch.
> > >>
> > >> I suggest intel_dp_reset_link_params() keeps its name, or gets renamed
> > >> to intel_dp_link_params_reset(). It just does the thing, no "force".
> > >>
> > >> Then the other two use something like:
> > >>
> > >> - submit/process
> > >> - queue/process
> > >> - stage/handle
> > >>
> > >> or some combination i.e. something like:
> > >>
> > >> intel_dp_link_params_reset()
> > >> intel_dp_link_params_reset_submit()
> > >> intel_dp_link_params_reset_process()
> > >
> > > All of it kinda leaves it a bit unclear how these things
> > > are related, and then one probably has to read through
> > > them to figure out what they're actually doing.
> > >
> > > Hence why I think just setting/checking the flag on the
> > > spot might be the clearest approach. You can immediately
> > > find where it's set vs. checked.
> >
> > Trouble is if you want to hide that flag in an opaque type in the
> > future.
>
> Do we want that?
There's a few property of the (active) link like intel_dp::link_rate,
lane_count, link.active, reset_link_params, which all could be tracked
in a separate link specific state. It could also make sense then to move
all the handlers of that state into a separate module, but not sure
about the details for that. For now I think it's better to drop this
patch and reconsider a suitable interface later. Will resend v2 with
that.
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2026-05-22 15:32 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-18 11:24 [PATCH 0/5] drm/i915/dp: Sanitize link capability change handling Imre Deak
2026-05-18 11:24 ` [PATCH 1/5] drm/i915/dp: Add helpers to reset link params Imre Deak
2026-05-21 21:36 ` Ville Syrjälä
2026-05-22 7:36 ` Hogander, Jouni
2026-05-22 7:47 ` Imre Deak
2026-05-22 10:29 ` Jani Nikula
2026-05-22 12:39 ` Ville Syrjälä
2026-05-22 12:46 ` Jani Nikula
2026-05-22 12:50 ` Ville Syrjälä
2026-05-22 15:32 ` Imre Deak
2026-05-18 11:24 ` [PATCH 2/5] drm/i915/dp: Reset link params after a DPRX capability change Imre Deak
2026-05-18 11:24 ` [PATCH 3/5] drm/i915/dp: Add helper to set common link params Imre Deak
2026-05-22 7:20 ` Hogander, Jouni
2026-05-18 11:24 ` [PATCH 4/5] drm/i915/dp: Cache max common lane count Imre Deak
2026-05-22 7:21 ` Hogander, Jouni
2026-05-18 11:24 ` [PATCH 5/5] drm/i915/dp: Detect changes in common link parameters Imre Deak
2026-05-21 21:43 ` Ville Syrjälä
2026-05-22 7:54 ` Imre Deak
2026-05-18 14:09 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Sanitize link capability change handling Patchwork
2026-05-18 16:52 ` ✓ i915.CI.BAT: success for drm/i915/dp: Sanitize link capability change handling (rev2) Patchwork
2026-05-19 5:53 ` ✓ i915.CI.Full: " Patchwork
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