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From: Peter Antoine <peter.antoine@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Widawsky, Benjamin" <benjamin.widawsky@intel.com>
Subject: Re: [PATCH] drm/i915/sysfs: Adding mocs_state
Date: Wed, 4 May 2016 15:51:21 +0100 (BST)	[thread overview]
Message-ID: <alpine.DEB.2.10.1605041550380.3052@peterant-linux2> (raw)
In-Reply-To: <20160504143841.GR4329@intel.com>

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Sorry Ville,

What is SRM?

Peter.

On Wed, 4 May 2016, Ville Syrjälä wrote:

> On Wed, May 04, 2016 at 02:23:35PM +0000, Antoine, Peter wrote:
>> No, It's not debug.
>> It's for syncing and aligning (and validating) the open-source userspace with the kernel cache policy.
>
> Why doesn't userspace just use SRM to read registers? The spec gives me
> the impression that SRM doesn't care whether the register is privileged
> or not.
>
>>
>> As for the name being wrong, I'll change that.
>>
>> As for the sysfs, would you prefer the following structure:
>>
>> mocs/size
>> mocs/control_state
>> mocs/l3cc_state
>>
>> for the different tables?
>>
>> Peter.
>>
>> -----Original Message-----
>> From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
>> Sent: Wednesday, May 4, 2016 2:47 PM
>> To: Antoine, Peter <peter.antoine@intel.com>
>> Cc: intel-gfx@lists.freedesktop.org; Widawsky, Benjamin <benjamin.widawsky@intel.com>
>> Subject: Re: [Intel-gfx] [PATCH] drm/i915/sysfs: Adding mocs_state
>>
>> On Wed, May 04, 2016 at 02:32:53PM +0100, Peter Antoine wrote:
>>> Will wait for more comments, then will respin with a different commit
>>> message. Is the rest of the patch ok?
>>
>> No, you've put debug information into sysfs. (Also sysfs is one value per
>> file.) sysfs does not match your goal of validation. And you exported an internal function (get_mocs...) without giving it a proper name.
>> -Chris
>>
>> --
>> Chris Wilson, Intel Open Source Technology Centre
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>

--
    Peter Antoine (Android Graphics Driver Software Engineer)
    ---------------------------------------------------------------------
    Intel Corporation (UK) Limited
    Registered No. 1134945 (England)
    Registered Office: Pipers Way, Swindon SN3 1RJ
    VAT No: 860 2173 47

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-05-04 14:51 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-04 13:16 [PATCH] drm/i915/sysfs: Adding mocs_state Peter Antoine
2016-05-04 13:23 ` Chris Wilson
2016-05-04 13:32   ` Peter Antoine
2016-05-04 13:47     ` Chris Wilson
2016-05-04 14:23       ` Antoine, Peter
2016-05-04 14:38         ` Ville Syrjälä
2016-05-04 14:51           ` Peter Antoine [this message]
2016-05-04 16:55             ` Ville Syrjälä
2016-05-05  7:17               ` Antoine, Peter
2016-05-06  8:57                 ` Antoine, Peter
2016-05-06 11:16                 ` Ville Syrjälä
2016-05-06 13:26                   ` Peter Antoine
2016-05-09  7:39                   ` Daniel Vetter
2016-05-04 14:57           ` Chris Wilson
2016-05-04 14:23 ` ✗ Fi.CI.BAT: failure for " Patchwork

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