Re: [PATCH 2/4] drm/i915/bios: Parse eDP fast link training params only if enabled

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Tue, Nov 10, 2026 at 11:54:30AM +0000, Lee Shawn C wrote:
> The VBT eDP fast link training params are parsed regardless of the
> per-panel fast link training enable bit (VBT 182+), which itself is not
> parsed. Parse the enable bit into panel->vbt.edp.fast_link_training and
> parse the params only if it is set.
> 
> VBT default fast link training lane count is 1, while hardly any
> eDP panel uses a single lane, so treat a lane count of 1 as not
> specified, like a rate of 0, leaving the selection to the driver.
> 
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c     | 34 +++++++++++++++++--
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  2 files changed, 33 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 6b2924c56cae..378f8b60b4a0 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1448,6 +1448,12 @@ parse_edp_fast_link_params(struct intel_display *display,
>  	const struct edp_fast_link_params *edp_link_params =
>  		&edp->fast_link_params[panel_type];
>  
> +	if (display->vbt.version < 182 ||
> +	    !panel_bool(edp->fast_link_training, panel_type))
> +		return;
> +
> +	panel->vbt.edp.fast_link_training = true;
> +
>  	if (display->vbt.version >= 224) {
>  		panel->vbt.edp.rate =
>  			edp->edp_fast_link_training_rate[panel_type] * 20;
> @@ -1526,6 +1532,29 @@ parse_edp_fast_link_params(struct intel_display *display,
>  			    edp_link_params->vswing);
>  		break;
>  	}
> +
> +	/*
> +	 * The fast link training rate is limited by the eDP max port link
> +	 * rate: FLT rate = min(FLT rate, eDP max port link rate).
> +	 */
> +	if (panel->vbt.edp.rate && panel->vbt.edp.max_link_rate)
> +		panel->vbt.edp.rate = min(panel->vbt.edp.rate,
> +					  panel->vbt.edp.max_link_rate);

The Windows driver discards the fast link training parameters
if the rate exceeds the max.

It also requires DP_NO_AUX_HANDSHAKE_LINK_TRAINING. Without that
it will not use the fast link training parameters, even for a full
link training.

> +
> +	/*
> +	 * The VBT default fast link training lane count is 1, while hardly
> +	 * any eDP panel uses a single lane. Treat a lane count of 1 as not
> +	 * specified, leaving the lane count selection to the driver, the
> +	 * same way as a fast link training rate of 0.
> +	 */
> +	if (panel->vbt.edp.lanes == 1)
> +		panel->vbt.edp.lanes = 0;
> +
> +	drm_dbg_kms(display->drm,
> +		    "VBT eDP fast link training enabled: rate %d, lanes %d, vswing %d, pre-emphasis %d\n",
> +		    panel->vbt.edp.rate, panel->vbt.edp.lanes,
> +		    panel->vbt.edp.vswing >> DP_TRAIN_VOLTAGE_SWING_SHIFT,
> +		    panel->vbt.edp.preemphasis >> DP_TRAIN_PRE_EMPHASIS_SHIFT);
>  }
>  
>  static void
> @@ -1555,8 +1584,6 @@ parse_edp(struct intel_display *display,
>  	vbt_edp_to_pps_delays(&panel->vbt.edp.pps,
>  			      &edp->power_seqs[panel_type]);
>  
> -	parse_edp_fast_link_params(display, panel, edp);
> -
>  	if (display->vbt.version >= 173) {
>  		u8 vswing;
>  
> @@ -1577,6 +1604,9 @@ parse_edp(struct intel_display *display,
>  		panel->vbt.edp.max_link_rate =
>  			edp->edp_max_port_link_rate[panel_type] * 20;
>  
> +	/* Depends on max_link_rate */
> +	parse_edp_fast_link_params(display, panel, edp);
> +
>  	if (display->vbt.version >= 251)
>  		panel->vbt.edp.dsc_disable =
>  			panel_bool(edp->edp_dsc_disable, panel_type);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 90a5d29169c6..11f90ab1654c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -354,6 +354,7 @@ struct intel_vbt_panel_data {
>  		int bpp;
>  		struct intel_pps_delays pps;
>  		u8 drrs_msa_timing_delay;
> +		bool fast_link_training;
>  		bool low_vswing;
>  		bool hobl;
>  		bool dsc_disable;
> -- 
> 2.53.0

-- 
Ville Syrjälä
Intel